d6bc5237d8
Add definitions of 64-bit extract and insert instrucions and make
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PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:26:34 +00:00
2bf08ec854
Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
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O32 with relocation-model=pic too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:03:03 +00:00
620db8947a
Lower 64-bit constant pool node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:44:38 +00:00
9b944a8da2
Lower 64-bit block address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 22:42:10 +00:00
160408546c
Simplify function PassByValArg64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:42:25 +00:00
6296ee3ee2
Unbreak Release builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 19:51:48 +00:00
4961709688
AnalyzeCallOperands function for N32/64.
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N32/64 places all variable arguments in integer registers (or on stack),
regardless of their types, but follows calling convention of non-vaarg function
when it handles fixed arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 19:02:54 +00:00
bad53f41c2
Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 19:01:09 +00:00
47a4ab84fe
Remove variable that keeps the size of area used to save byval or variable
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argument registers on the callee's stack frame, along with functions that set
and get it.
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 18:56:20 +00:00
7386612a16
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 02:38:12 +00:00
6df3e7b162
Implement Mips64's handling of byval arguments in LowerCall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 02:34:50 +00:00
3a5257de21
Implement Mips64's handling of byval arguments in LowerFormalArguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 02:29:58 +00:00
2c5d65202e
Function for handling byval arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 02:20:46 +00:00
47b92f3d83
Mips MC object code emission improvements:
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:58:42 +00:00
e184fec550
Do not try to detect DAG combine patterns for integer multiply-add/sub if value
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type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:18:21 +00:00
59068067cb
64-bit atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:14:30 +00:00
46ac4399b1
Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:11:56 +00:00
c742e4fc90
Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:06:38 +00:00
d752e0f7e6
Added invariant field to the DAG.getLoad method and changed all calls.
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When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 18:42:53 +00:00
feaa4c316f
Make changes necessary in LowerFormalArguments to support Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143218 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 19:55:48 +00:00
e42f33bd15
Make changes necessary in LowerCall to support Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 19:49:00 +00:00
2ec69faf26
Add variable IsO32 to MipsTargetLowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143213 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 18:47:24 +00:00
0851a29b6d
Fix misc warnings. Patch by Joe Abbey.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 03:17:34 +00:00
8ae330ac90
Add definitions of conditional moves with 64-bit operands. Comment out code for
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expanding conditional moves, which is not needed since architectures that lack
support for conditional moves have been removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:53:29 +00:00
a5903acd6b
Modify lowering of GlobalAddress so that correct code is emitted when target is
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Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:55:05 +00:00
7bd19bd519
Add definitions of 64-bit loads and stores. Add a patterns for unaligned
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zextloadi32 for which there is no corresponding pseudo or real instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:27:28 +00:00
dda4a07cd8
Add support for 64-bit divide instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:06:13 +00:00
c7bafe9241
Add definitions of Mips64 rotate instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30 18:51:46 +00:00
f40de9d287
Set register class of a register according to value of HasMips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:55:17 +00:00
8b4198da9d
Define variable HasMips64 in MipsTargetLowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:47:02 +00:00
09dd60feef
In single float mode, double precision FP arguments are passed in integer
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registers, so there is no need to check here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:37:50 +00:00
95934844e3
Preparation for adding simple Mips64 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 01:34:44 +00:00
792016bc22
Make FGR64RegisterClass available if target is Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 18:28:39 +00:00
373e3a4091
Do not rely on the enum values of argument registers A0-A3 being consecutive.
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Define function getNextIntArgReg, which takes a register as a parameter and
returns the next O32 argument integer register. Use this function when double
precision floating point arguments are passed in two integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 00:58:33 +00:00
c56f5ea4c3
Remove unnecessary condition check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 02:41:29 +00:00
5663344127
Change the names of functions isMips* to hasMips*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 23:53:09 +00:00
da7f5f1c1d
Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't
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yet legal according to comments in LegalizeDAG.cpp:227.
Memcpy nodes created for copying byval arguments are inserted before
CALLSEQ_START.
The two failing tests reported in PR10876 pass after applying this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 20:26:02 +00:00
28b77e968d
Add codegen support for vector select (in the IR this means a select
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with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 19:07:46 +00:00
4db5acaf48
Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:23:02 +00:00
854a7db117
Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not
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needed for Mips32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:59:00 +00:00
5ac8547a41
Use subword loads instead of a 4-byte load when the size of a structure (or a
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piece of it) that is being passed by value is smaller than a word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 23:39:37 +00:00
dbe9a31683
Make IsShiftedMask a static function rather than defining it in an
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anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:07:42 +00:00
667645f814
Changed definition of EXT and INS per Bruno's comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:59:46 +00:00
511961a44c
Add support for half-word unaligned loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:49:18 +00:00
77b85b6474
Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:45:08 +00:00
bb15e117d3
Add support for ext and ins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:05:42 +00:00
5c21c9e78e
Define unaligned load and store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:30:06 +00:00
26689ac37e
New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.
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I think this completes the basic CodeGen for atomicrmw and cmpxchg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-03 21:06:02 +00:00
1464846801
Code generation for 'fence' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:21:52 +00:00
db54826f20
Lower memory barriers to sync instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:30:50 +00:00
