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c680ac9003
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2701 Commits

Author SHA1 Message Date
Eli Friedman
c680ac9003 Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned 
value.  Adjust other code to deal with that correctly.  Make 
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of 
this new flexibility to simplify the code and make it deal with unusual 
vectors (like <4 x i1>) correctly.  Fixes PR3037.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:01:03 +00:00
Evan Cheng
910139f9ca Targets sometimes assign fixed stack object to spill certain callee-saved 
registers based on dynamic conditions. For example, X86 EBP/RBP, when used as
frame register has to be spilled in the first fixed object. It should inform
PEI this so it doesn't get allocated another stack object. Also, it should not
be spilled as other callee-saved registers but rather its spilling and restoring
are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75116 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 06:53:48 +00:00
Lang Hames
ffd1326ff8 Improved tracking of value number kills. VN kills are now represented 
as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.

A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test 
condition has been updated to reflect this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 03:57:02 +00:00
Chris Lattner
39f56b6d16 remove eh, convert to FileCheck style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75087 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 01:07:22 +00:00
Chris Lattner
f4a9774e2b we have no tests for dllimport/export. Add one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:53:44 +00:00
Chris Lattner
9f44b3a411 * add some assertions for sanity checking. 
* remove some old code that was needed when we'd put ESP in the scale instead of 
  the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75077 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:27:29 +00:00
Chris Lattner
600f175834 add a test for dale's recent change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75074 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:00:16 +00:00
Chris Lattner
ab711cc593 switch test to FileCheck-style and test the P and non-P cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75071 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:44:06 +00:00
Chris Lattner
e5646ccf66 rename a test to make it a feature test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75070 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:40:57 +00:00
David Goodwin
f1daf7d8ab Use common code for both ARM and Thumb-2 instruction and register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:10:31 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:32:02 +00:00
Chris Lattner
515cdbe49d add some more check for vector compares. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:51:25 +00:00
Chris Lattner
57e56cd72a convert a test to "FileCheck" style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75023 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:48:24 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:11:30 +00:00
David Goodwin
a928f27d23 Add rev16 test... xfail for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:15:06 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:09:28 +00:00
Chris Lattner
a47d9669b7 eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:49:35 +00:00
Chris Lattner
b2773e1ada Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No 
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:46:57 +00:00
Chris Lattner
2b7a271c71 dag combine sext(setcc) -> vsetcc before legalize. To make this safe, 
VSETCC must define all bits, which is different than it was documented
to before.  Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the 
documentation.  We now get nice code for vec_compare.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:31:33 +00:00
Chris Lattner
c2c27b3627 add support for legalizing an icmp where the result is illegal (4xi1) but 
the input is legal (4 x i32)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74964 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:03:54 +00:00
Chris Lattner
cb178c61e4 add a trivial test that vector compares work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74963 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:51:09 +00:00
Chris Lattner
5962ed0a36 implement support for spliting and scalarizing vector setcc's. This 
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74961 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:47:46 +00:00
Chris Lattner
33d6a3451b verify that the fcmp version of this works just as well as the 
vfcmp version.  We actually get better code for this silly testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:07:47 +00:00
Evan Cheng
e253c951b3 Add Thumb2 movcc instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:39:03 +00:00
Evan Cheng
35bd43da76 Add missing tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74945 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:38:08 +00:00
Evan Cheng
40289b041a Add Thumb2 pkhbt / pkhtb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e Add some more Thumb2 multiplication instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 01:17:28 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0 Added ARM::mls for armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:05:45 +00:00
Evan Cheng
2c4d96dfe9 Avoid adding a duplicate def. This fixes PR4478. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74857 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 21:34:05 +00:00
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 01:43:10 +00:00
Evan Cheng
6d94f11196 Added indexed stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad Sign extending pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 23:16:11 +00:00
Evan Cheng
e88d5cee9d Thumb2 pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 07:28:31 +00:00
Chris Lattner
cd714b12fc @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing. 
This fixes an llvm-gcc bootstrap problem I introduced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 04:22:01 +00:00
Chris Lattner
27598ec1e2 Fix yet-another bug I introduced into fastisel, this time handling 
constant pool references that weren't getting properly rip-relative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 03:14:25 +00:00
Chris Lattner
4fb75e5425 Fix codegen for references to available_externally symbols. This fixes 
PR4482.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74613 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 16:53:44 +00:00
Evan Cheng
498c2903e2 CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 08:29:08 +00:00
Evan Cheng
459a7c6b6a Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def. 
Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74601 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 08:19:36 +00:00
Chris Lattner
35c28eca62 Fix some fast-isel problems selecting global variable addressing in 
pic mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 03:27:19 +00:00
Evan Cheng
2578ba26e7 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:59:31 +00:00
David Goodwin
d1fa120aee Add PIC load and store patterns for Thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 00:01:13 +00:00
David Goodwin
73b8f16b36 Add thumb-2 store word, halfword, and byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:50:22 +00:00
Rafael Espindola
af5f6ba32d Fix PR4485. 
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 16:40:03 +00:00
Rafael Espindola
f55715c5c7 Fix PR4484. 
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 12:18:16 +00:00
Evan Cheng
50564ebc9e Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 09:19:42 +00:00
Evan Cheng
4784f1fc73 Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. 
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 08:49:04 +00:00
Evan Cheng
f3c21b857b A few more load instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 02:15:48 +00:00
David Goodwin
4ff863c257 Enhance tests to include shifted-register operand testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74490 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 01:02:20 +00:00