Commit Graph

73108 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
c75448c740 Mark ldrexd/strexd w/ volatile memory by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:11:32 +00:00
Jakub Staszak
12af5ff720 Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:01:17 +00:00
Justin Holewinski
e0aef2de81 PTX: Finish new calling convention implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:50:00 +00:00
Justin Holewinski
1b91bcddd5 PTX: Rename register classes for readability and combine int and fp registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:49:58 +00:00
Jakob Stoklund Olesen
79c890f64f Add TargetRegisterInfo::getRawAllocationOrder().
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.

Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:42:25 +00:00
Nick Lewycky
1e85ef645d Add testcase for r133050 which added support for printing and parsing escaped
names for named metadata nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133166 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:14:38 +00:00
Owen Anderson
23b0766b47 Fix formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 16:52:24 +00:00
Dan Gohman
129bd56eeb Document nonlazybind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 16:03:13 +00:00
Dan Gohman
a0697a7ef5 Add a comment describing why transforming (shl x, 1) to (add x, x) is to be
considered safe enough in this context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:55:48 +00:00
Justin Holewinski
ec3141b27f PTX: Fix whitespace errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 15:17:11 +00:00
Bruno Cardoso Lopes
d381a7a91e Add AVX suport for fpextend.
Original patch by Syoyo Fujita with more comments by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 07:03:21 +00:00
Jakob Stoklund Olesen
2559011a01 Prempt some obnoxious compiler from complaing about signed/unsigned
compares.

2^30 is actually the limit on the number of physical registers per
TargetRegisterInfo.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 03:07:40 +00:00
Jakob Stoklund Olesen
0cc0929efc Make sure to pass an unsigned to a printf format that is always %u.
This should unbreak the native ARM testers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:55:56 +00:00
Eli Friedman
e8e1e4444b FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cortex-a9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:36:32 +00:00
Eli Friedman
33b4f725ea Force a triple here so this test doesn't fail on EABI hosts (like clang-native-arm-cortex-a9).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:49:31 +00:00
Nick Lewycky
3cae396e03 Commit the right set of tests for r133124. Sorry 'bout that!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:35:45 +00:00
Andrew Trick
9b91a88f1d Reenabling this test with REQUIRES: Asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:34:41 +00:00
Andrew Trick
05c087d893 Add support to lit for build mode requirements. e.g.
REQUIRES: Asserts
REQUIRES: Debug

This required chaining test configuration properties. It seems like a
generally good thing to do.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:33:35 +00:00
Chad Rosier
6fce128dd1 Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:24:24 +00:00
Chad Rosier
689edc8b28 Revision r128665 added an optimization to make use of NEON multiplier
accumulator forwarding.  Specifically (from SVN log entry):

Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2

Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was
intended in the original revision.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:21:54 +00:00
Nick Lewycky
c06b5bf340 Add a DAGCombine for (ext (binop (load x), cst)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:15:49 +00:00
Bruno Cardoso Lopes
e0b5cfcae8 Silence warnings in non assert builds. Patch by David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:40:02 +00:00
Anna Zaks
589badd863 Rename the test. Thanks Cameron! Use shorter/generic names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:34:10 +00:00
Anna Zaks
3c397eb741 Function::getNumBlockIDs() should be used instead of Function::size() to set the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:03:21 +00:00
Eli Friedman
992205ac71 Add a limit to the number of instructions memdep will scan in a single block. This prevents (at least in some cases) O(N^2) runtime in passes like DSE.
The limit in this patch is probably too high, but it is enough to stop DSE from going completely insane on a testcase I have (which has a single block with around 50,000 non-aliasing stores in it).

rdar://9471075



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:59:25 +00:00
John McCall
9fbd318d36 The ARC language-specific optimizer. Credit to Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:37:01 +00:00
Dylan Noblesmith
5f36bb1759 unittests: add test for APInt::toString()
Follow up to r133032.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:36:34 +00:00
Owen Anderson
77b4b13c2a Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:35:18 +00:00
Jakob Stoklund Olesen
f28987b76e Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:28:14 +00:00
John McCall
f14bacc862 Update the Clang diagnostic emitter to emit IDs for diagnostic categories.
Patch by Argyrios Kyrtzidis.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:43:52 +00:00
Rafael Espindola
cff6193ebd Testcase for previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:18:51 +00:00
Eli Friedman
b53c7937c5 Simplify; no significant functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:08:25 +00:00
Rafael Espindola
0ad2dc46d9 Fix cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:03:04 +00:00
Rafael Espindola
aeb6da46ce Handle jump tables. Test to follow soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:00:28 +00:00
Argyrios Kyrtzidis
5cf34feb67 Try fixing http://google1.osuosl.org:8011/builders/clang-i686-freebsd/builds/3548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 20:39:05 +00:00
John McCall
3a3465b71d Add a new function attribute, nonlazybind, which inhibits lazy-loading
optimizations when emitting calls to the function;  instead those calls may
use faster relocations which require the function to be immediately resolved
upon loading the dynamic object featuring the call.  This is useful when it
is known that the function will be called frequently and pervasively and
therefore there is no merit in delaying binding of the function.

Currently only implemented for x86-64, where it turns into a call through
the global offset table.

Patch by Dan Gohman, who assures me that he's going to add LangRef documentation
for this once it's committed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 20:36:13 +00:00
Eli Friedman
e97c7da59d Remove unused code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 19:58:09 +00:00
Argyrios Kyrtzidis
81df089f86 Document ADT/PackedVector.h in "Programmer's Manual" doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133077 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 19:56:01 +00:00
Argyrios Kyrtzidis
0f5b687075 Add unit tests for ADT/PackedVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133075 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 19:19:09 +00:00
Argyrios Kyrtzidis
9fa7cb1ba6 Constify PackedVector::reference::operator T().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 19:18:13 +00:00
Jim Grosbach
e82b8eeaa2 Diagnostic for undefined assembler local symbols.
Re-apply 133010, with fixes for inline assembler.

Original commit message:
"When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect."

Added fix to only perform the check when finalizing, as otherwise we're not
done and undefined symbols may simply not have been encountered yet.

Passes "make check" and a self-host check on Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:33:28 +00:00
Andrew Trick
2f473cee28 Disabling this test until I can figure out the right lit flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:25:38 +00:00
Jakob Stoklund Olesen
b79e30cc9e Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.

- R12Q is now allocatable. I think it was omitted from the allocation
  order by mistake since it isn't reserved. It as apparently used as a
  GOT pointer sometimes, and it should probably be reserved if that is
  the case.

- The GR64 registers are allocated in a different order now. The
  register allocator will automatically put the CSRs last. There were
  other changes to the order that may have been significant.

The test fix is because r0 and r1 swapped places in the allocation order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:02:56 +00:00
Evan Cheng
f60ceac9cd Another revsh pattern. rdar://9609059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:17:48 +00:00
Andrew Trick
4cb971ce1c Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:16:12 +00:00
Chad Rosier
0e7f08bde5 TargetLoweringOpt is a struct used by DAGCombine, not a pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 16:48:02 +00:00
Roman Divacky
e355b80194 Make PPC64CompilationCallback compilable no non-darwin platforms.
Patch by Nathan Whitehorn!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 15:29:47 +00:00
Nadav Rotem
8e61432249 getZeroExtendInReg needs to get a scalar type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 14:37:18 +00:00
Nadav Rotem
6f2b85ddd4 This test was failing on X86 machines which do not have SSE4. Fixed the test by
specifying that the target CPU is corei7.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 12:26:53 +00:00
Nadav Rotem
baff46f192 Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).

Fix the a usage of getZeroExtendInReg which must also be done on scalar types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 11:19:12 +00:00