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c82c101147
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Author SHA1 Message Date
Jim Grosbach
c82c101147 Tidy up a bit. Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 17:59:31 +00:00
Craig Topper
581fe82c84 Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141007 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 17:28:23 +00:00
Eric Christopher
8cf5e74a9c Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141005 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 15:49:20 +00:00
Eric Christopher
1aeb7ac624 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141004 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 15:49:16 +00:00
Rafael Espindola
25456ef74c Add the returns_twice attribute to LLVM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141001 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 14:45:37 +00:00
Craig Topper
04c5be9f12 Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140997 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 08:14:29 +00:00
Craig Topper
04b0b34b3a Test updates that were supposed to go with r140993. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140994 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 07:53:59 +00:00
Craig Topper
7b22976de3 Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140993 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 07:51:09 +00:00
Nick Lewycky
1cbae18cf6 Reapply r140979 with fix! We never did get a testcase, but careful review of the 
logic by David Meyer revealed this bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 07:10:45 +00:00
Torok Edwin
48488a64fa attempt to fix ocaml bindings: landing pads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140991 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 06:41:46 +00:00
Nick Lewycky
4fcc80a486 Revert r140979 due to reports of bootstrap failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140980 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 05:14:59 +00:00
Nick Lewycky
8fde4f5842 Add one more case we compute a max trip count. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140979 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-03 01:03:57 +00:00
Craig Topper
82f131a017 Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 21:08:12 +00:00
Craig Topper
146c6d77f0 Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140971 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 16:56:09 +00:00
Nick Lewycky
11357d4f40 Add a new icmp+select optz'n. Also shows off the load(cst) folding added in 
r140966.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140969 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 10:37:37 +00:00
Nick Lewycky
267236ade3 Enhance a couple places where we were doing constant folding of instructions, 
but not load instructions. Noticed by inspection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140966 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 09:12:55 +00:00
Craig Topper
42fbe9aa06 Fix typo in r140954. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 04:54:26 +00:00
Ted Kremenek
4f101db885 Make canonicalization of ImmutableSetRef::asImmutableSet() semi-explicit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-02 01:47:07 +00:00
Craig Topper
846a2dcada Fix disassembling of INVEPT and INVVPID to take operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140955 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 21:20:14 +00:00
Craig Topper
e1b4a1a07e Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140954 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 19:54:56 +00:00
Chad Rosier
2bfaf521ae Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions." 
to appease nightly testers.  Not quite there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 19:30:36 +00:00
Nadav Rotem
cbf26e3b57 Moved type construction out of the loop and added an assert on the legality of the type. Formatted lines to the 80 char limit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140952 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 18:39:28 +00:00
Peter Collingbourne
7c78888887 Move TableGen's parser and entry point into a library 
This is the first step towards splitting LLVM and Clang's tblgen executables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 16:41:13 +00:00
Bill Wendling
2e6b97bbf8 No one should be using the method directly. Assert if they do. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 12:47:34 +00:00
Bill Wendling
405ca137a1 Add a convenience method to tell if two things are equal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 12:44:28 +00:00
Bill Wendling
3320f2a3bf Use the ARMConstantPoolMBB class to handle the MBB values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 09:30:42 +00:00
Bill Wendling
9c18f51daa Add ARMConstantPoolMBB to hold an MBB value in the constant pool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140942 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 09:19:10 +00:00
Bill Wendling
14a1a6b018 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140941 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 09:05:12 +00:00
Bill Wendling
9aca75c4f8 Remove now dead methods and ivar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140940 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 09:04:18 +00:00
Bill Wendling
fe31e67350 Use the new ARMConstantPoolSymbol class to handle external symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140939 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 08:58:29 +00:00
Bill Wendling
ff4a8023ec Add an ARMConstantPool class for external symbols. This will split out the support for external symbols from the base class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 08:36:59 +00:00
Bill Wendling
3f4e4592c3 Remove now dead methods and ivar from ARMConstantPoolValue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140937 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 08:02:05 +00:00
Bill Wendling
5bb779976a Switch over to using ARMConstantPoolConstant for global variables, functions, 
and block addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140936 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 08:00:54 +00:00
Bill Wendling
3e944e38ea Some more refactoring. 
* Add a couple of Create methods to the ARMConstantPoolConstant class,
* Add its own version of getExistingMachineCPValue, and
* Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140935 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 07:52:37 +00:00
Bill Wendling
029e93888d Add a Create method that accepts 'kind' and 'pcadj' arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140934 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 06:44:24 +00:00
Bill Wendling
f2b76aae2b Refactoring: Separate out the ARM constant pool Constant from the ARM constant 
pool value.

It's not used right now, but will be soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140933 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 06:40:33 +00:00
Bob Wilson
1cea66c3ba Subtarget getFeatureBits() returns a uint64_t, not unsigned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 02:47:54 +00:00
Chad Rosier
5249041125 Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact 
useful if an optimization assumes the stack has been realigned.  Credit to
Eli for his assistance.
rdar://10043857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140924 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 02:03:18 +00:00
Andrew Trick
b2ab2fa524 Inlining and unrolling heuristics should be aware of free truncs. 
We want heuristics to be based on accurate data, but more importantly
we don't want llvm to behave randomly. A benign trunc inserted by an
upstream pass should not cause a wild swings in optimization
level. See PR11034. It's a general problem with threshold-based
heuristics, but we can make it less bad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 01:39:05 +00:00
Andrew Trick
5c655413cf whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140916 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 01:27:56 +00:00
Michael J. Spencer
0bcd9c70b1 Add Windows x64 stack walking support. Patch by Aaron Ballman! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 00:05:20 +00:00
Jakob Stoklund Olesen
52e7dfadc6 Use precomputed BitVector for CodeGenRegisterClass::hasSubClass(). 
All the sub-class bit vectors are computed when first creating the
register bank.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140905 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:47:05 +00:00
Bill Wendling
0676d2a04c Filecheck-ize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:40:29 +00:00
Bill Wendling
127f410c3a Add new line at end of file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:21:11 +00:00
Bill Wendling
e09b2a0d49 When inferring the pointer alignment, if the global doesn't have an initializer 
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 23:19:55 +00:00
Nick Lewycky
8de34006cf Promote comment to doxycomment. Adjust whitespace. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:19:53 +00:00
Jakob Stoklund Olesen
c8e2bb68bb Store sub-class lists as a bit vector. 
This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes.  This makes it
cheap to add them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140898 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:19:07 +00:00
Jakob Stoklund Olesen
b7359e384f Extract a slightly more general BitVector printer. 
This one can also print 32-bit groups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:54 +00:00
Jakob Stoklund Olesen
e27e1ca3c9 Move getCommonSubClass() into TRI. 
It will soon need the context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:51 +00:00
Jakob Stoklund Olesen
f9a4bb78da Compute lists of super-classes in CodeGenRegisterClass. 
Use these lists instead of computing them on the fly in
RegisterInfoEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 22:18:45 +00:00