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Author SHA1 Message Date
Justin Holewinski
4c7ffb6a7e PTX: Continue to fix up the register mess. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 17:39:48 +00:00
Justin Holewinski
e37a83f66b PTX: Encode registers as unsigned values in the MC asm printer instead of using external symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 17:39:46 +00:00
Sebastian Pop
464f3a332f use space star instead of star space 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145944 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 17:34:16 +00:00
Sebastian Pop
f6f77e90a1 add missing point at the end of sentences 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 17:34:11 +00:00
Benjamin Kramer
88c09143b6 Simplify common predecessor finding. 
- Walking over pred_begin/pred_end is an expensive operation.
- PHINodes contain a value for each predecessor anyway.
- While it may look like we used to save a few iterations with the set,
  be aware that getIncomingValueForBlock does a linear search on
  the values of the phi node.
- Another -5% on ARMDisassembler.cpp (Release build). This was the last
  entry in the profile that was obviously wasting time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145937 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 16:14:29 +00:00
Benjamin Kramer
85dadecbd6 Push StringRefs through the metadata interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145934 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 11:50:26 +00:00
Craig Topper
fe03315925 Add X86ISD::HADD/HSUB to getTargetNodeName 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 09:31:36 +00:00
Craig Topper
cb6bd11bd6 Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other integer vector loads are promoted to those. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145927 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 09:04:59 +00:00
Craig Topper
34671b812a Merge floating point and integer UNPCK X86ISD node types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145926 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 08:21:25 +00:00
NAKAMURA Takumi
18851edbc4 test/MC: Introduce MC/MachO/ARM, and relocate relax-thumb2-branches.s into it. 
FIXME: Restore more other arch-dependent MachO tests. (eg. r126401 and r133856)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 06:48:26 +00:00
Craig Topper
3d8c2ce3e4 Clean up some of the shuffle decoding code for UNPCK instructions. Add instruction commenting for AVX/AVX2 forms for integer UNPCKs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145924 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 05:31:16 +00:00
Jim Grosbach
23261af193 ARM mode 'mul' operand ordering tweak. 
Same as r145922, just for ARM mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145923 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 05:28:00 +00:00
Jim Grosbach
cf9814ddd2 Thumb2: MUL two-operand form encoding operand order fix. 
Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we
match gas.

rdar://10532439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145922 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 05:03:45 +00:00
Craig Topper
1ff73d7a67 Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145921 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 04:59:07 +00:00
Jim Grosbach
df33e0d05e Thumb2 encoding choice correction for PLD. 
Using encoding T1 for offset of #0 and encoding T2 for #-0.

rdar://10532413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 04:49:29 +00:00
NAKAMURA Takumi
286ea03382 test/MC: Move relax-thumb2-branches.s from MC/MachO/ to MC/ARM. 
MC/MachO assumes x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145916 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:56:05 +00:00
Dan Gohman
e1a2984847 Fix a subtle semantic issue with poison values that came up in 
recent discussions. Poison can't make every value that depends on
it act in maximally undefined ways, because the optimizer may still
hoist code following the usual rules for undef. Make Poison invoke
its full undefined behavior only when it reaches an instruction with
externally visible side effects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145913 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:35:58 +00:00
Bruno Cardoso Lopes
ff452f5349 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes
a00a62acd0 Explicit symbols for gnu mimicing relocations. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145911 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:42 +00:00
Bruno Cardoso Lopes
2bcc789a9d Add register HWR29 numbering. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145910 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:36 +00:00
Dan Gohman
5cdc51ea7b Line up the comments in a code example. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145908 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:31:14 +00:00
Dan Gohman
bfb056dccf Rename "Trap Values" to "Poison Values", to better reflect their 
purpose, and to avoid ambiguity with other uses of the word "trap"
in LangRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145907 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:18:47 +00:00
Andrew Trick
8a5d792944 LSR: prune undesirable formulae early. 
It's always good to prune early, but formulae that are unsatisfactory
in their own right need to be removed before running any other pruning
heuristics. We easily avoid generating such formulae, but we need them
as an intermediate basis for forming other good formulae.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:13:31 +00:00
Evan Cheng
89dae971b1 Mix some minor misuse of MachineBasicBlock iterator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 02:49:06 +00:00
Pete Cooper
d3743fc092 Removed isWinToJoinCrossClass from the register coalescer. 
The new register allocator is much more able to split back up ranges too constrained by register classes.

Fixes <rdar://problem/10466609>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 02:06:50 +00:00
Chris Lattner
266451dd95 allow TinyPtrVector to implicitly convert to ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145898 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 02:00:33 +00:00
Lang Hames
bae56b4c21 Kill off the LoopSplitter. It's not being used or maintained. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:57:59 +00:00
Bill Wendling
80caf9c273 Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145896 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:57:48 +00:00
Jim Grosbach
cb86509e7a Tidy up value checking. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:53:17 +00:00
NAKAMURA Takumi
6482e91149 MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:48:32 +00:00
Lang Hames
9ad7e07a0f Update PBQP's analysis usage to reflect the requirements of the inline spiller. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145893 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:45:57 +00:00
Chad Rosier
ed42c5f778 [arm-fast-isel] Doublewords only require word-alignment. 
rdar://10528060

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:44:17 +00:00
Jakob Stoklund Olesen
3e572ac2fb Align ARM constant pool islands via their basic block. 
Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired
alignment of 4 bytes emitted by ARMAsmPrinter.  Now the same alignment
is set on the basic block.

This is in preparation of supporting ARM constant pool islands with
different alignments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145890 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:43:02 +00:00
Jakob Stoklund Olesen
8c741b8064 Use logarithmic units for basic block alignment. 
This was actually a bit of a mess. TLI.setPrefLoopAlignment was clearly
documented as taking log2(bytes) units, but the x86 target would still
set a preferred loop alignment of '16'.

CodePlacementOpt passed this number on to the basic block, and
AsmPrinter interpreted it as bytes.

Now both MachineFunction and MachineBasicBlock use logarithmic
alignments.

Obviously, MachineConstantPool still measures alignments in bytes, so we
can emulate the thrill of using as.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:26:19 +00:00
Bill Wendling
79df986c60 The compact encoding of the registers are 3-bits each. Make sure we shift the 
value over that much.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:26:14 +00:00
Jim Grosbach
d9a6e8978d Fix ARM handling of tBcc branch relaxation. 
rdar://10069056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:08:19 +00:00
Jakob Stoklund Olesen
e80fba0e6c Use an existing function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:51:12 +00:00
Jakob Stoklund Olesen
757a3179b2 Fix unclear wording. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145882 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:51:09 +00:00
Jim Grosbach
370b78d795 Move target-specific logic out of generic MCAssembler. 
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:47:03 +00:00
Nick Lewycky
7c06741004 Expose a switch for the new gcov format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145880 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:29:13 +00:00
Chad Rosier
dce42b75dc Probably not a good idea to convert a single vector load into a memcpy. We 
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:19:08 +00:00
Jim Grosbach
f68a26b5d8 Tidy up. Hard tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145878 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:13:09 +00:00
Jim Grosbach
91f2cce231 Tidy up. Hard tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145877 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:12:12 +00:00
Nick Lewycky
e229248cb1 All these arguments are default anyways. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:11:58 +00:00
Jim Grosbach
fdedd48624 Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:11:13 +00:00
Jim Grosbach
f77d5b14af Switch MCAssembler to method names starting w/ lower-case. 
per http://llvm.org/docs/CodingStandards.html#ll_naming

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145873 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:03:48 +00:00
Jim Grosbach
f503ef6800 Simple branch relaxation for Thumb2 Bcc instructions. 
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 23:45:46 +00:00
Jim Grosbach
5792051bfc Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145870 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 23:20:14 +00:00
Nick Lewycky
aa21e417f2 Silence tsan false-positives (tsan can't track things which are only safe due to 
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 23:07:05 +00:00
Chad Rosier
a4b6fd5be0 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145866 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 22:53:09 +00:00