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13733 Commits

Author SHA1 Message Date
Chris Lattner
97c2073270 Add a missing check, this fixes UnitTests/Vector/sumarray.c 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 17:29:28 +00:00
Chris Lattner
a4c5d8c6b4 Add a missing check, which broke a bunch of vector tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 17:21:50 +00:00
Chris Lattner
c461a51234 Add the full set of min/max instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 15:58:28 +00:00
Andrew Lenharth
f87e7931fd support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 04:19:17 +00:00
Andrew Lenharth
afe3f49815 mul by const conversion sequences. more coming soon 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 03:18:59 +00:00
Andrew Lenharth
cf4fb61f6c back this out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 03:16:50 +00:00
Andrew Lenharth
50a0d426e8 This should be a win of every arch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 21:42:45 +00:00
Andrew Lenharth
ccd9f98bcb This makes McCat/12-IOtest go 8x faster or so 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27363 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 21:08:39 +00:00
Andrew Lenharth
ed5d1afffb This will be needed soon 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27362 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 20:13:57 +00:00
Chris Lattner
220d2b89d6 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27360 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 07:20:00 +00:00
Chris Lattner
bbe77de450 Inform the dag combiner that the predicate compares only return a low bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:26:07 +00:00
Chris Lattner
1b5232a937 relax assertion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:19:46 +00:00
Chris Lattner
1482b5fc7a Allow targets to compute masked bits for intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:15:09 +00:00
Chris Lattner
350bec0fb9 Add a little dag combine to compile this: 
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
        %tmp1 = load <4 x float>* %in           ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 )           ; <int> [#uses=1]
        %tmp = seteq int %tmp, 0                ; <bool> [#uses=1]
        %tmp3 = cast bool %tmp to int           ; <int> [#uses=1]
        ret int %tmp3
}

into this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        mtspr 256, r2
        blr

instead of this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:11:11 +00:00
Chris Lattner
4132afb0d2 vector casts of casts are eliminable. Transform this: 
%tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]
        %tmp = cast <4 x int> %tmp to <4 x float>               ; <<4 x float>> [#uses=1]

into:

        %tmp = cast <4 x uint> %tmp to <4 x float>              ; <<4 x float>> [#uses=1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27355 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:43:13 +00:00
Chris Lattner
a3124a3d1e vector casts never reinterpret bits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27354 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:40:28 +00:00
Chris Lattner
a1c3538537 Allow transforming this: 
%tmp = cast <4 x uint>* %testData to <4 x int>*         ; <<4 x int>*> [#uses=1]
        %tmp = load <4 x int>* %tmp             ; <<4 x int>> [#uses=1]

to this:

        %tmp = load <4 x uint>* %testData               ; <<4 x uint>> [#uses=1]
        %tmp = cast <4 x uint> %tmp to <4 x int>                ; <<4 x int>> [#uses=1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27353 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:37:12 +00:00
Chris Lattner
82ed58f9c4 Turn altivec lvx/stvx intrinsics into loads and stores. This allows the 
elimination of one load from this:

int AreSecondAndThirdElementsBothNegative( vector float *in ) {
#define QNaN 0x7FC00000
const vector unsigned int testData = (vector unsigned int)( QNaN, 0, 0, QNaN );
vector float test = vec_ld( 0, (float*) &testData );
return ! vec_any_ge( test, *in );
}

Now generating:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        addi r6, r1, -16
        lvx v0, r5, r4
        stvx v0, 0, r6
        lvx v1, 0, r3
        vcmpgefp. v0, v0, v1
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27352 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:30:25 +00:00
Chris Lattner
02b72556d7 Remove done item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:28:54 +00:00
Chris Lattner
4aab2f4ab5 Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:06:04 +00:00
Chris Lattner
c55bfd0265 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:59:11 +00:00
Chris Lattner
bc70cf8be9 Implement the Expand action for binary vector operations to break the binop 
into elements and operate on each piece.  This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:57:31 +00:00
Chris Lattner
e58a780166 Intrinsics that just load from memory can be treated like loads: they don't 
have to serialize against each other.  This allows us to schedule lvx's
across each other, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:41:14 +00:00
Chris Lattner
7224f84c15 Adjust to change in Intrinsics.gen interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27344 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:35:01 +00:00
Chris Lattner
edab1b9133 Constant fold all of the vector binops. This allows us to compile this: 
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"

aka:

void %test2(<16 x sbyte>* %P) {
  store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
  ret void
}

into this:

_test2:
        mfspr r2, 256
        oris r4, r2, 32768
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        lvx v0, r5, r4
        stvx v0, 0, r3
        mtspr 256, r2
        blr

instead of this:

_test2:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        vspltisb v0, 8
        lvx v1, r5, r4
        vxor v0, v1, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:25:57 +00:00
Chris Lattner
5e46a19ec8 Add a new -view-legalize-dags command line option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:07:27 +00:00
Chris Lattner
6258fb2592 Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:53:43 +00:00
Chris Lattner
5e08a11039 These entries already exist 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:51:27 +00:00
Chris Lattner
97d23335ad Add some missing node names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:41:18 +00:00
Chris Lattner
5295122b0d New note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27337 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 01:47:20 +00:00
Chris Lattner
4460f4058f Constant fold casts from things like <4 x int> -> <4 x uint>, likewise int<->fp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 01:38:28 +00:00
Chris Lattner
541f91b17c Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into 
"vspltisb v0, 8" instead of a constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:43:36 +00:00
Chris Lattner
f8814cf8b8 Prefer larger register classes over smaller ones when a register occurs in 
multiple register classes.  This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:24:45 +00:00
Chris Lattner
3805dea3fe add valuemapper support for inline asm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27332 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 23:17:11 +00:00
Chris Lattner
c3837d4917 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:41:47 +00:00
Chris Lattner
ae1ab3989c Fix InstCombine/2006-04-01-InfLoop.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:05:01 +00:00
Chris Lattner
64daab56c2 Fold A^(B&A) -> (B&A)^A 
Fold (B&A)^A == ~B & A

This implements InstCombine/xor.ll:test2[56]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 08:03:55 +00:00
Chris Lattner
60a05cc118 Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll and 
PR726 by performing consistent signed division, not consistent unsigned
division when evaluating scev's.  Do not touch udivs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:48:52 +00:00
Chris Lattner
eaa7c06d86 ADd a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:08:29 +00:00
Chris Lattner
6e6b0da303 If we can look through vector operations to find the scalar version of an 
extract_element'd value, do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 23:01:56 +00:00
Chris Lattner
348ba3f9bf Shrinkify some more intrinsic definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:41:56 +00:00
Evan Cheng
67d3d4c085 An entry about packed type alignments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:35:14 +00:00
Chris Lattner
6cea814f2c Pull operand asm string into base class, shrinkifying intrinsic definitions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:34:05 +00:00
Evan Cheng
e668bdaa52 TargetData.cpp::getTypeInfo() was returning alignment of element type as the 
alignment of a packed type. This is obviously wrong. Added a workaround that
returns the size of the packed type as its alignment. The correct fix would
be to return a target dependent alignment value provided via TargetLowering
(or some other interface).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27319 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:33:42 +00:00
Chris Lattner
f1d0c623c6 Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:16:43 +00:00
Chris Lattner
b5c4d17a6c Fix 80 column violations :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:57:36 +00:00
Evan Cheng
653159f4aa Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed 
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:55:24 +00:00
Evan Cheng
4b1734f70b Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:29:33 +00:00
Chris Lattner
7376a5e129 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642 Add vperm support for all datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 20:00:35 +00:00
Chris Lattner
e3fea5a1c1 Rearrange code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:52:36 +00:00
Chris Lattner
32a988a095 Add, sub and shuffle are legal for all vector types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:48:58 +00:00
Evan Cheng
b067a1e7e6 Add support to use pextrw and pinsrw to extract and insert a word element 
from a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:22:53 +00:00
Evan Cheng
1eda6e7924 Add vector_extract and vector_insert nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:21:16 +00:00
Chris Lattner
9f7e127133 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:00:22 +00:00
Chris Lattner
6fa4cdf92e constant fold extractelement with undef operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27301 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:31:40 +00:00
Chris Lattner
1f13c88939 extractelement(undef,x) -> undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:25:14 +00:00
Chris Lattner
c741ea424a Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC. 
Now all UnitTests/Vector/* tests pass on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:22:37 +00:00
Chris Lattner
d9731af75b Do not endian swap the operands to a store if the operands came from a vector. 
This fixes UnitTests/Vector/simple.c with altivec.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:20:46 +00:00
Chris Lattner
29cd7db310 Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt 
to:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 12, r32
        ;;
        ldfs f8 = [r8]
        mov ar.pfs = r3
        br.ret.sptk.many rp

instead of:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 28, r32
        adds r9 = 24, r32
        adds r10 = 20, r32
        adds r11 = 16, r32
        ;;
        ldfs f6 = [r8]
        ;;
        ldfs f6 = [r9]
        adds r8 = 12, r32
        adds r9 = 8, r32
        adds r14 = 4, r32
        ;;
        ldfs f6 = [r10]
        ;;
        ldfs f6 = [r11]
        ldfs f8 = [r8]
        ;;
        ldfs f6 = [r9]
        ;;
        ldfs f6 = [r14]
        ;;
        ldfs f6 = [r32]
        mov ar.pfs = r3
        br.ret.sptk.many rp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:10:41 +00:00
Chris Lattner
e4b953939c Delete dead loads in the dag. This allows us to compile 
vector.ll:test_extract_elt2 into:

_test_extract_elt2:
        lfd f1, 32(r3)
        blr

instead of:

_test_extract_elt2:
        lfd f0, 56(r3)
        lfd f0, 48(r3)
        lfd f0, 40(r3)
        lfd f1, 32(r3)
        lfd f0, 24(r3)
        lfd f0, 16(r3)
        lfd f0, 8(r3)
        lfd f0, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:06:18 +00:00
Chris Lattner
1597221eac Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes 
Generic/vector.ll:test_extract_elt on non-sse X86 systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 17:55:51 +00:00
Chris Lattner
2ae2e98d4f Scalarized vector stores need not be legal, e.g. if the vector element type 
needs to be promoted or expanded.  Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 17:37:22 +00:00
Jeff Cohen
4c5701d271 Fix build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27292 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 07:22:05 +00:00
Chris Lattner
33497cc992 note to self: *save* file, then check it in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:04:53 +00:00
Chris Lattner
4468c22458 Implement an item from the readme, folding vcmp/vcmp. instructions with 
identical instructions into a single instruction.  For example, for:

void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}

we now generate:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

instead of:

_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

Testcase here: CodeGen/PowerPC/vcmp-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:02:07 +00:00
Chris Lattner
9492151e32 compactify some more instruction definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:38:32 +00:00
Chris Lattner
5f7b01963f Compactify comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27287 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:32:57 +00:00
Chris Lattner
a17b1557ad Lower vector compares to VCMP nodes, just like we lower vector comparison 
predicates to VCMPo nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:13:27 +00:00
Chris Lattner
8f5d316ff2 These are done 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 04:53:21 +00:00
Chris Lattner
536a9d5ea5 Add a new method to verify intrinsic function prototypes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27282 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 04:46:47 +00:00
Chris Lattner
7e02151ce2 Make sure to pass enough values to phi nodes when we are dealing with 
decimated vectors.  This fixes UnitTests/Vector/sumarray-dbl.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27280 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 02:12:18 +00:00
Chris Lattner
70c2a61e0a Significantly improve handling of vectors that are live across basic blocks, 
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 02:06:56 +00:00
Chris Lattner
a6c9de4293 Was returning the wrong type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:50:09 +00:00
Chris Lattner
36f4b0da9d Mark INSERT_VECTOR_ELT as expand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:48:55 +00:00
Evan Cheng
33e85ca7b6 Expand all INSERT_VECTOR_ELT (obviously bad) for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:30:39 +00:00
Evan Cheng
eb0b461cf4 Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp; 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:27:51 +00:00
Chris Lattner
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:46:36 +00:00
Evan Cheng
fb47a9b1c8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27272 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:33:57 +00:00
Evan Cheng
ef698ca30d Ok for vector_shuffle mask to contain undef elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27271 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:30:29 +00:00
Chris Lattner
dc87929609 Implement TargetLowering::getPackedTypeBreakdown 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:28:56 +00:00
Chris Lattner
8768bf6ee3 Add the rest of the vmul instructions and the vmulsum* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:39:06 +00:00
Chris Lattner
3c4f4e9f1b Use a new tblgen feature to significantly shrinkify instruction definitions that 
directly correspond to intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:21:27 +00:00
Chris Lattner
30a6abaef0 Add a bunch of new instructions for intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27265 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:07:36 +00:00
Chris Lattner
df084ff78b Fix Transforms/InstCombine/2006-03-30-ExtractElement.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 22:02:40 +00:00
Evan Cheng
7d9061e300 Make sure all possible shuffles are matched. 
Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27259 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 19:54:57 +00:00
Evan Cheng
1b32f22b0f More logical ops patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27257 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 07:33:32 +00:00
Evan Cheng
0876aa5178 Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27256 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 06:21:22 +00:00
Evan Cheng
c5fb2b14ca Add 128-bit pmovmskb intrinsic support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 00:33:26 +00:00
Evan Cheng
591f740a40 Change SSE pack operation definitions to fit what the intrinsics expected. 
For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 23:53:14 +00:00
Evan Cheng
506d3dfa90 - Added some SSE2 128-bit packed integer ops. 
- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 23:07:14 +00:00
Evan Cheng
691c923e47 Need to special case splat after all. Make the second operand of splat 
vector_shuffle undef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 19:02:40 +00:00
Evan Cheng
5aa97b200b Floating point logical operation patterns should match bit_convert. Or else 
integer vector logical operations would match andp{s|d} instead of pand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27248 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 18:47:40 +00:00
Evan Cheng
475aecf467 - More shuffle related bug fixes. 
- Whenever possible use ops of the right packed types for vector shuffles /
  splats.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 03:04:49 +00:00
Evan Cheng
c999c745c0 Another entry about shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 03:03:46 +00:00
Evan Cheng
4f5633883b - Only use pshufd for v4i32 vector shuffles. 
- Other shuffle related fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 01:30:51 +00:00
Chris Lattner
f3a627262c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 00:24:13 +00:00
Chris Lattner
2bbd81064a Bug fixes: handle constantexpr insert/extract element operations 
Handle constantpacked vectors with constantexpr elements.

This fixes CodeGen/Generic/vector-constantexpr.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 00:11:43 +00:00
Evan Cheng
c46349de29 Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics. 
The source operands type are v4sf with upper bits passes through.
Added matching code for these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 23:51:43 +00:00
Evan Cheng
36b27f3cde Fixing buggy code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 23:41:33 +00:00
Chris Lattner
cef896e50c When building a VVECTOR_SHUFFLE node from extract_element operations, make 
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).

The later is not canonical form, and prevents the PPC splat pattern from
matching.  For a particular splat, we go from generating this:

	li r10, lo16(LCPI1_0)
	lis r11, ha16(LCPI1_0)
	lvx v3, r11, r10
	vperm v3, v2, v2, v3

to generating:

	vspltw v3, v2, 3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 22:19:47 +00:00
Chris Lattner
66445d3e0a Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y') 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 22:11:53 +00:00
Chris Lattner
d7648c8934 Turn a series of extract_element's feeding a build_vector into a 
vector_shuffle node.  For this:

void test(__m128 *res, __m128 *A, __m128 *B) {
  *res = _mm_unpacklo_ps(*A, *B);
}

we now produce this code:

_test:
        movl 8(%esp), %eax
        movaps (%eax), %xmm0
        movl 12(%esp), %eax
        unpcklps (%eax), %xmm0
        movl 4(%esp), %eax
        movaps %xmm0, (%eax)
        ret

instead of this:

_test:
        subl $76, %esp
        movl 88(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, (%esp)
        movaps %xmm0, 32(%esp)
        movss 4(%esp), %xmm0
        movss 32(%esp), %xmm1
        unpcklps %xmm0, %xmm1
        movl 84(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, 16(%esp)
        movaps %xmm0, 48(%esp)
        movss 20(%esp), %xmm0
        movss 48(%esp), %xmm2
        unpcklps %xmm0, %xmm2
        unpcklps %xmm1, %xmm2
        movl 80(%esp), %eax
        movaps %xmm2, (%eax)
        addl $76, %esp
        ret

GCC produces this (with -fomit-frame-pointer):

_test:
        subl    $12, %esp
        movl    20(%esp), %eax
        movaps  (%eax), %xmm0
        movl    24(%esp), %eax
        unpcklps        (%eax), %xmm0
        movl    16(%esp), %eax
        movaps  %xmm0, (%eax)
        addl    $12, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 20:28:38 +00:00
Chris Lattner
5b2316e2b0 Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 20:24:43 +00:00
Chris Lattner
354cde9a7e new node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:54:42 +00:00
Chris Lattner
4fbdd59f4f Don't crash on X^X if X is a vector. Instead, produce a vector of zeros. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:11:05 +00:00
Chris Lattner
f35b29765b Add an assertion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:04:49 +00:00
Chris Lattner
d732a2915b add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27227 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 18:56:23 +00:00
Jim Laskey
b3e7be25be Refactor address attributes. Add base register to frame info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 14:58:32 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Jim Laskey
bf7637d590 More bulletproofing of llvm.dbg.declare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27224 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:45:20 +00:00
Jim Laskey
2d2a6131da Added missing paren on behalf of Ramana Radhakrishnan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27223 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 10:17:11 +00:00
Evan Cheng
ed4ca7f6c3 Missed X86::isUNPCKHMask 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27222 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 08:27:15 +00:00
Evan Cheng
9bbfd4f68c movlps and movlpd should be modeled as two address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27221 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 07:01:28 +00:00
Evan Cheng
6a6d354d4c Update 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27220 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:55:45 +00:00
Evan Cheng
be296ac5ca Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27219 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:53:49 +00:00
Evan Cheng
2064a2b47e * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. 
* Bug fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:50:32 +00:00
Nate Begeman
816cee2216 Fix a couple typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:18:18 +00:00
Nate Begeman
98e70cc124 Add a few more altivec intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:15:58 +00:00
Evan Cheng
4c4a2e2a0d Added a couple of entries about movhps and movlhps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27212 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:49:12 +00:00
Evan Cheng
000e4dd54b All unpack cases are now being handled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27211 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:44:05 +00:00
Evan Cheng
4fcb922c70 - Clean up / consoladate various shuffle masks. 
- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:43:26 +00:00
Chris Lattner
ecc219b8d4 implement a bunch more intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:29:37 +00:00
Chris Lattner
7f20b13518 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact 
same thing and we have a dag node for the former.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 01:43:22 +00:00
Jim Laskey
aaa80ebd10 More bulletproofing of DebugInfoDesc verify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27203 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 01:30:18 +00:00
Chris Lattner
48b61a729d Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:40:33 +00:00
Evan Cheng
0038e59803 Model unpack lower and interleave as vector_shuffle so we can lower the 
intrinsics as such.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:39:58 +00:00
Andrew Lenharth
79acb69a6f If adding a link to a collapsed, node, ignore offset. 
Fixes 2006-03-27-LinkedCollapsed.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27194 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 23:39:58 +00:00
Jim Laskey
8c39020359 Reactivate llvm.dbg.declare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 23:31:10 +00:00
Chris Lattner
67995340fb Disable dbg_declare, it currently breaks the CFE build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 21:36:03 +00:00
Chris Lattner
13fc2f1d27 Fix legalization of intrinsics with chain and result values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27181 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:28:29 +00:00
Jim Laskey
414e682bac Translate llvm target registers to dwarf register numbers properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:18:45 +00:00
Chris Lattner
749b758b2e unbreak the build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 16:52:45 +00:00
Chris Lattner
401ec7f6a9 Unbreak the build on non-apple compilers :-( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 16:10:59 +00:00
Evan Cheng
23cc8708c3 Try again 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 08:10:26 +00:00
Chris Lattner
3ee9ffb0e5 Add a bunch of notes from my journey thus far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27170 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:41:00 +00:00
Evan Cheng
f48b50a7ef Incorrect check for FP all one's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:26:17 +00:00
Chris Lattner
b86bd2cee2 Split out altivec notes into their own README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27168 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:04:16 +00:00
Evan Cheng
a0b3afbe14 Use pcmpeq to generate vector of all ones. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:00:16 +00:00
Evan Cheng
999f3b538f Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:59:32 +00:00
Evan Cheng
a8df166fbe Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for 
floating point cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:58:47 +00:00
Chris Lattner
70a248d284 Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:45:25 +00:00
Chris Lattner
49aaa6a8ee teach the inliner to work with packed constants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 05:50:18 +00:00
Chris Lattner
fb143ce459 Fix the JIT encoding of VSEL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27160 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:34:17 +00:00
Chris Lattner
eeaf72af39 Fix the JIT encoding of VSPLTI* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27159 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:28:57 +00:00
Jim Laskey
a8299deab7 Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27158 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 01:51:47 +00:00
Nate Begeman
f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 01:32:24 +00:00
Jim Laskey
fbcf23c3c1 Bullet proof against undefined args produced by upgrading ols-style debug info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:46:27 +00:00
Jim Laskey
98e0410f07 How to be dumb on $5/day. Need a tri-state to track valid debug descriptors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27154 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:45:20 +00:00
Chris Lattner
bd6be6f52d add vsel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27153 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:38:43 +00:00