Akira Hatanaka
db54826f20
Lower memory barriers to sync instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:30:50 +00:00
Evan Cheng
70955c2d12
Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:14:32 +00:00
Eli Friedman
3610604086
PR10386: Don't try to split an edge from an indirectbr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:59:41 +00:00
Benjamin Kramer
14c92467e7
Fix off-by-one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:59:25 +00:00
Jim Grosbach
b29b4dd988
Tweak ARM assembly parsing and printing of MSR instruction.
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The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:45:10 +00:00
Devang Patel
c8fcfc9cd9
Distinguish between two copies of one inlined variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135528 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:31:15 +00:00
Jim Grosbach
80d01dd3d1
ARM assembly parsing of MRS instruction.
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Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 21:59:29 +00:00
Owen Anderson
f1a0090073
Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 21:06:00 +00:00
Akira Hatanaka
bdd83fe382
Change variable name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:56:53 +00:00
Jim Grosbach
ccfd9313d1
ARM assembly parsing for MRC/MRC2/MRRC/MRRC2.
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Add range checking to the immediate operands. Update tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:35:35 +00:00
Akira Hatanaka
cc7ecc7290
Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or
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ANDi, when the instruction does not have any immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:34:00 +00:00
Jim Grosbach
2317fe1584
Move mr[r]c[2] ARM tests and tidy up a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:28:56 +00:00
Jim Grosbach
1a2be4db5b
ARM testcases for MOVT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:23:25 +00:00
Akira Hatanaka
4061da1403
Use descriptive variable names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:11:17 +00:00
Jim Grosbach
5f16057d1e
ARM assembly parsing for MOV (register).
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Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135513 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:10:31 +00:00
Jim Grosbach
558b66d3cd
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:47:11 +00:00
Jim Grosbach
731f209794
Tighten conditional for 'mov' cc_out.
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Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:45:44 +00:00
Devang Patel
23336b449e
Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:41:54 +00:00
Jim Grosbach
ffa3225e26
ARM assembly parsing for MOV (immediate).
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:13:28 +00:00
Jim Grosbach
0ec2aa21d0
Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135499 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:02:39 +00:00
Jim Grosbach
5a18700470
Remove unused code.
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cc_out and pred operands are added during parsing via custom C++ now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:32:48 +00:00
Akira Hatanaka
29af0918ce
Fix comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:19:40 +00:00
Akira Hatanaka
70564a9c19
Remove redundant instructions.
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- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
instruction being expanded, instead of masking it in thisMBB.
- Remove redundant Or in EmitAtomicCmpSwap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:14:26 +00:00
Akira Hatanaka
81b441151f
Separate code that modifies control flow from code that adds instruction to
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basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 17:09:53 +00:00
Jim Grosbach
6bc1dbc376
ARM range checking for so_imm operands in assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 16:50:30 +00:00
Bob Wilson
f51bb7cef8
Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block."
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This reverts commit 9fec5e346e
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 16:32:50 +00:00
Bob Wilson
66fc541abe
Revert "Update docs to reflect r135457."
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This reverts commit ba034c0a2e
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 16:31:58 +00:00
Jay Foad
7fc52e2d95
Convert ConstantFoldGetElementPtr to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 15:30:30 +00:00
Jay Foad
b9b54ebfed
Convert SimplifyGEPInst to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 15:07:52 +00:00
Jay Foad
ca12a2139e
Convert gep_type_begin and gep_type_end to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 14:42:50 +00:00
Jay Foad
8fbbb39807
Convert TargetData::getIndexedOffset to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 14:01:37 +00:00
Jay Foad
1d2f569c34
Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:32:40 +00:00
Richard Osborne
c8007ab582
Add intrinsics for the zext / sext instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:28:50 +00:00
Richard Osborne
829bef1a46
Add intrinsics for the testct, testwct instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:00:40 +00:00
Richard Osborne
dee3dd9129
Add intrinsics for the peek and endin instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 12:50:25 +00:00
Nick Lewycky
bb2518c716
Remove bogus test: for all possible inputs of %X, the 'sub nsw' is guaranteed
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to perform a signed wrap. Don't rely on any particular handling of that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 08:22:57 +00:00
Evan Cheng
439661395f
Introduce MCCodeGenInfo, which keeps information that can affect codegen
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(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 06:37:02 +00:00
Akira Hatanaka
939ece1b5c
Make EmitAtomic functions return the correct MachineBasicBlocks so that
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ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 03:42:13 +00:00
Akira Hatanaka
a308c670b4
Do not insert instructions in reverse order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 03:14:58 +00:00
Eli Friedman
9710f06d66
Make isLoadExtLegal and isTruncStoreLegal check what the name says. :) This might have some minor effect on CellSPU, but all other targets should be unaffected. Fixing per report from Damien Vincent on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 02:24:07 +00:00
Devang Patel
ba034c0a2e
Update docs to reflect r135457.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 01:04:39 +00:00
Devang Patel
9fec5e346e
Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 01:03:32 +00:00
Devang Patel
497a397f3e
Revert r135423.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:28:24 +00:00
Jeffrey Yasskin
343c3a5005
Document how to maintain a git-svn clone of the LLVM git repositories.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:20:54 +00:00
Bill Wendling
6c2f7e2398
Micro-opt: Only emit compact unwind if there is a compact unwind encoding to emit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:09:25 +00:00
Bill Wendling
e52e3f2c02
Use the CompactUnwindEncoding from the Frame, if it's defined.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:06:12 +00:00
Bill Wendling
e060a5cd06
Add a frame with the compact unwind encoding if it exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:02:51 +00:00
Bill Wendling
d967578a8c
Add a method to set compact unwind encoding information in a frame.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:01:42 +00:00
Bill Wendling
7d36534d22
Rename CompactEncoding to CompactUnwindEncoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:00:58 +00:00
Sean Callanan
c872143d6a
Fixed a bug where the MC subtarget information
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wasn't being initialized by the enhanced disassembler,
leading to assertion failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:00:41 +00:00