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Author SHA1 Message Date
Craig Topper 21092d8a7c [TableGen] Cleanup formatting by moving operators from beginning of line to end of previous line. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236206 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-30 05:54:22 +00:00
Craig Topper 54bff8596f [TableGen] Used range-based for loop. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236205 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-30 05:54:20 +00:00
Craig Topper 4fc782c025 [TableGen] Merge a variable assignment and a return to drop curly braces. Fold an assignment into an if. Use auto on the result of a couple dyn_casts. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236204 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-30 05:12:52 +00:00
Craig Topper 40048e70d7 [TableGen] Use range-based for loops. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236089 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-29 07:13:14 +00:00
Craig Topper ac9abe5e99 [TableGen] Fold a couple dyn_casts into the ifs that check their results. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236088 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-29 07:13:12 +00:00
Craig Topper 134e2e75b3 [TableGen] Replace some dyn_casts followed by an assert with just a regular cast which asserts internally. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236087 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-29 07:13:05 +00:00
Craig Topper ed5293c2e9 [TableGen] Use range-based for loops. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236083 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-29 04:43:36 +00:00
Craig Topper a9a01d9879 [TableGen] Don't leak Expanders and Operators in SetTheory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235697 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-24 06:49:44 +00:00
Craig Topper 7cc4f07bdc [TableGen] Fix all remaining memory leaks of Init and RecTy objects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235696 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-24 05:38:48 +00:00
Craig Topper 3aaf26d335 [TableGen] Use range based for loops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235482 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 05:27:47 +00:00
Craig Topper bdd6973671 [TableGen] Remove some deletes that violate ownership semantics. These don't seem to execute in our codebase today and date back to a time when there was an allocation in this function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235481 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 05:27:11 +00:00
Craig Topper 459448abcc [TableGen] Make BitRecTy::baseClassOf return true when RHS is an IntRecTy. 
Previously the code was accidentally checking if 'this' was an IntRecTy which it can't be since 'this' is a BitRecTy. Looking back at the history it appears it was intended to check RHS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235477 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 04:18:32 +00:00
Craig Topper aee08e5bac Don't use 'nullptr' in comment. Just use 'null'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235476 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 04:18:27 +00:00
Craig Topper 0b67fe7293 Revert "[TableGen] Use cast instead of dyn_cast where result isn't checked before being dereferenced." 
Turns out I misread the parentheses. Though I'm pretty sure its always a RecordRecTy and non of the callers really seem to expect null. But until I'm completely sure I'm going to revert this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235469 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:59:06 +00:00
Craig Topper fe6b36788e Fix stale comment that mentioned 0 instead of nullptr. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235468 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:59:03 +00:00
Craig Topper 458ad3e2cb [TableGen] Remove Pool helper class and just use unique_ptr in the maps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235467 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:20:44 +00:00
Craig Topper 5def98eaee [TableGen] Use StringRecTy::get() instead of allocating (and leaking) a StringRecTy object. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235466 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:09:47 +00:00
Craig Topper f8012eb826 [TableGen] Use 'isa' to identify UnsetInits rather than comparing with the singleton object created by UnsetInit::get(). Makes it more consistent with the other types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235465 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:09:45 +00:00
Craig Topper 87b4c04980 [TableGen] Use cast instead of dyn_cast where result isn't checked before being dereferenced. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235463 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:09:42 +00:00
Craig Topper 8bf10f85cd Cleanup formatting for consistency with surrounding code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235462 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 02:09:39 +00:00
Craig Topper 6fa7febee4 Remove unnecessary include and probably a layering violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235262 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-19 00:57:33 +00:00
Craig Topper b82d5479b9 Use SmallVector instead of std::vector for uniquing X86 disassembler operand sets. The number of operands is a small fixed size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234465 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-09 04:08:48 +00:00
Craig Topper 13154acf19 Simplify some printing code by combining new lines onto previous strings. Don't work so hard not to print a comma on the last entry of an array. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234464 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-09 04:08:46 +00:00
Craig Topper 684de8845e Don't convert enum to strings just to put them in the uniquing map. Use the enum directly. Only convert to a string for printing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234463 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-09 04:08:42 +00:00
Craig Topper a0400a7bf6 Revert r234389. It really was needed but really should have been cstring instead of string.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234390 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-08 06:03:17 +00:00
Craig Topper 5885e26abc Remove unnecessary include. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234389 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-08 05:56:30 +00:00
Craig Topper 4d1e15c54f [X86] Apply AddedComplexity consistently for similar patterns. This keeps them together in the DAGISel tables and reduces table size slightly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234086 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-04 04:22:12 +00:00
Craig Topper 4ed0907298 [X86] Add a comment about the change in r234075. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234079 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-04 02:31:43 +00:00
Craig Topper b1ff87ec86 [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead. 
Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero.

Fixes PR23100.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234075 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-04 02:08:20 +00:00
Craig Topper 0a4630d104 Don't print an error message when looking up the scheduling model if user specified -mcpu=help. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233884 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-02 04:27:50 +00:00
Craig Topper 57ff120751 Add -mcpu=native support to opt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233789 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-01 05:32:04 +00:00
Craig Topper cd83d5b507 [X86] Stop changing result of getHostCPUName based on whether the processor supports AVX. getHostCPUFeatures should be used instead to determine whether to support AVX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233674 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-31 06:18:31 +00:00
Craig Topper 9a7c0031de Make llc use getHostCPUFeatures when 'native' is specified for cpu. 
This is necessary for x86 where not all Sandybridge, Ivybrige, Haswell, and Broadwell CPUs support AVX. Currently we modify the CPU name back to Nehalem for this case, but that turns off additional features for these CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233673 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-31 05:52:57 +00:00
Craig Topper caa12e0352 [X86] Be more robust against unknown Intel family 6 models. Use feature flags to guess what it might be. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233671 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-31 05:42:45 +00:00
Craig Topper 8b042883dc [X86] In getHostCPUFeatures, disable xop, f16c, fma, and fma4 if OS does not support saving ymm state. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233518 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-30 06:31:14 +00:00
Craig Topper 5ffc995ff3 [X86] Remove FeatureAES for 'corei7' CPU. 'corei7' should match 'nehalem' which doesn't have AES. Having AES and not PCLMUL makes 'corei7' halfway between Nehalem and Westmere. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233517 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-30 06:31:11 +00:00
Craig Topper c637444fed [X86] Use the more specific CPU names like 'nehalem', 'westmere', 'haswell', etc. Split Nehalem and Westmere CPUs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233516 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-30 06:31:09 +00:00
Craig Topper 44f1dccd64 [X86] Move family 6 model 21 to 'pentium-m'. Near as I can tell this is a Dothan based SOC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233515 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-30 06:31:06 +00:00
Craig Topper e82327a6ab [X86] Family 6 model 29 is a Penryn based processor not a Nehalem based processor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233514 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-30 06:31:03 +00:00
Craig Topper f46232d70d Fix a variable name in MSVC specific part of rr233487. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233488 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-29 01:07:57 +00:00
Craig Topper 87f3799e56 [X86] Implement getHostCPUFeatures for X86. 
Plan to use this as part of CPU 'native' support so we can stop picking a different CPU name if CPU doesn't support AVX or AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233487 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-29 01:00:23 +00:00
Craig Topper 5ce6ef629e Convert feature strings to lowercase even if they have a '+'/'-' in front of them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233475 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-28 04:59:14 +00:00
Craig Topper 74381e237b Update comment to match code behavior. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233470 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-28 03:24:19 +00:00
Craig Topper 5238b7f47a [X86] Remove GetCpuIDAndInfo, GetCpuIDAndInfoEx and DetectFamilyModel functions from X86 MC layer. They haven't been used since CPU autodetection was removed from X86Subtarget.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233170 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-25 04:16:50 +00:00
Craig Topper 38d5f48397 Fix typo 'AVX too' instead of 'AVX2' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232929 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-23 04:17:11 +00:00
Craig Topper da740f1e8e [X86] Add one stepping of Broadwell to the CPU name autodetection for march=native. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232927 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-23 00:15:06 +00:00
Craig Topper 3220d112fa [Tablegen] Attempt to add support for patterns containing nodes with multiple results. 
This is needed for AVX512 masked scatter/gather support.

The R600 change is necessary to remove a hack that was working around the lack of multiple results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232798 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-20 05:09:06 +00:00
Craig Topper d4843f4c45 Improve and simplify EnforceSmallerThan for vector types. 
Explicitly compare the size of the scalar types and the whole vector size rather than just comparing enum encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231746 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 03:25:07 +00:00
Craig Topper 541e68ea57 Remove extra indentation of entire function body. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231745 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 03:25:04 +00:00
Craig Topper bc55462859 Revert "[TableGen] Implement at least some support for multiple explicit results in an instruction pattern. No functional change to existing patterns." 
This is failing on several build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231358 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-05 07:17:52 +00:00
Craig Topper 256cb3b576 [TableGen] Implement at least some support for multiple explicit results in an instruction pattern. No functional change to existing patterns. 
This should help with the AVX512 masked gather changes Elena is working on. This patch is derived from some of the changes Elena made to tablegen, but modified by me to support arbitrary number of results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231357 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-05 07:11:36 +00:00
Craig Topper 8ad519fd3c [TableGen] Add support constraining a vector type in a pattern to have a specific element type and for constraining a vector type to have the same number of elements as another vector type. This is useful for AVX512 mask operations so we relate the mask type to the type of the other arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231356 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-05 07:11:34 +00:00
Craig Topper 62eaac6087 [X86] Use vmovss to handle inserting an element into index 0 of a v8f32 vector of zeros. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231354 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-05 06:38:42 +00:00
Craig Topper b660ece860 [Tablegen] Use correct result number variables with the pattern nodes they go with when handling SDTCisSameAs. No functional change as they are always both 0 unless you try to define a multi result type profile that uses SDTCisSame on one of the other results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231226 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-04 09:04:54 +00:00
Craig Topper fc2c7a558b [X86] Remove some unused code from disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231055 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-03 05:24:03 +00:00
Craig Topper 2d9a799b16 [X86] There are only 8 mask registers. Fail disassembly if instruction tries to reference more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230931 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-02 03:33:11 +00:00
Craig Topper a2d7ca4495 [X86] Fix diassembler crash on AVX512 cmpps/cmppd with immediate that doesn't fit in 5-bits. Fixes PR22743. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230924 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-02 00:22:29 +00:00
Craig Topper 8df1c6ef09 [X86] Remove the blendpd/blendps/pblendw/pblendd intrinsics. They can represented by shuffle_vector instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230860 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-28 19:33:17 +00:00
Craig Topper c3b9d471f6 [X86] Remove the AbsMem32 type from the assembly parser. Only really need the 16-bit version which will automatically get prioritized over AbsMem. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230313 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-24 08:02:13 +00:00
Craig Topper f9c1605d56 [X86] Add some missing redundant MMX and SSE encodings for disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230165 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-22 07:50:41 +00:00
Craig Topper 052d754ccb [X86] Add another test case for the bug fixed in r229642. With the bug a vpsrldq was emitted instead of pslldq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229643 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-18 07:45:43 +00:00
Craig Topper f781855732 [X86] Remove AVX512 pslldq/psrldq shift intrinsics. They aren't implemented yet and when they are they should be done with shuffles like SSE2 and AVX2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229641 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-18 06:24:49 +00:00
Craig Topper ed42dcef75 [X86] Remove AVX2 and SSE2 pslldq and psrldq intrinsics. We can represent them in IR with vector shuffles now. All their uses have been removed from clang in favor of shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229640 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-18 06:24:44 +00:00
Craig Topper 4031c08c87 [X86] Remove the multiply by 8 that goes into the shift constant for X86ISD::VSHLDQ and X86ISD::VSRLDQ. This simplifies the pattern matching in isel and allows these nodes to become the patterns embedded in the instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229431 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-16 20:52:07 +00:00
Craig Topper e124dc723b [X86] Remove x86.avx2.psll.dq.bs and x86.avx2.psrl.dq.bs intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229430 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-16 20:51:59 +00:00
Craig Topper 74b9ad3485 [X86] Add support for lowering shuffles to 256-bit PALIGNR instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229359 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-16 06:29:06 +00:00
Craig Topper abdf58f7f9 [X86] Remove some hard tab characters from tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229358 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-16 06:29:02 +00:00
Craig Topper 60db969913 [X86] Remove gcc builtins for AVX2 psll_dq and psrl_dq intrinsics. Clang no longer needs them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229347 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-16 00:42:36 +00:00
Craig Topper 9bb36ed8d8 [X86] Add assembly parser support for mnemonic aliases for AVX-512 vpcmp instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229287 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-15 07:13:48 +00:00
Craig Topper 09ea4e976b [X86] Add assembler predicates for the rest of the AVX512 feature flags. This makes the assembly matching consistent across all AVX512 instructions. Without this we were allowing some AVX512 instructions to be parsed always, but not the foundation instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229280 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-15 04:54:55 +00:00
Craig Topper e2f7231e45 [X86] Add the remaining 11 possible exact ModRM formats. This makes their encodings linear which can then be used to simplify some other code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229279 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-15 04:16:44 +00:00
Craig Topper 32f60795f5 [X86] Improve parsing support AVX/SSE floating point compare instruction mnemonic aliases. They'll now print with the alias the parser received instead of converting to the explicit immediate form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229266 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-14 21:54:03 +00:00
Craig Topper f3455f13a2 [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229078 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 07:42:25 +00:00
Craig Topper 0d3c686ffd [X86] Fix XOP vpcom intrinsic autoupgrade to map 'true' and 'false' to the correct immediates. Seems they were swapped. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229077 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 07:42:15 +00:00
Craig Topper c5222f156f Fix a typo in a comment. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229071 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 06:07:29 +00:00
Craig Topper d4f1c60bf5 Fix probable typo in test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229070 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 06:07:27 +00:00
Craig Topper db9343fb40 [X86] Remove int_x86_sse2_psll_dq_bs and int_x86_sse2_psrl_dq_bs intrinsics. The builtins aren't used by clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229069 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 06:07:24 +00:00
Craig Topper 972211d539 [X86] Remove references to builtin names that have been removed from clang. Hope to remove the intrinsics themselves soon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229068 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-13 06:07:14 +00:00
Craig Topper 77b557430c [X86] Preserve mem refs on newly created 'Store' node instead of 'Load' node when handling store unfolding. 
Bug spotted by Steve King.

I have no idea how to test this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228672 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-10 06:29:28 +00:00
Craig Topper 5fc4b96e62 [X86] Remove unnecessary alignment checks from the load folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228671 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-10 05:10:50 +00:00
Craig Topper cc5e6d56fc [X86] Remove 256-bit and 512-bit memop pattern fragments. They are no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228563 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 04:04:53 +00:00
Craig Topper bd477dfbbf [X86] Remove 'memop' uses from AVX512. Use 'load' instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228562 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 04:04:50 +00:00
Craig Topper 3824fd3a25 [X86] Remove the remaining uses of memop from AVX and AVX2 instruction patterns. AVX and AVX2 can handle unaligned loads being folded so we can just use 'load' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228551 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-08 22:38:25 +00:00
Craig Topper 3e7edda4aa [X86] Add register use/def for wrmsr and rdmsr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228515 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-07 23:36:51 +00:00
Craig Topper e15d286e83 [X86] Add GETSEC instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228514 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-07 23:36:36 +00:00
Craig Topper 0d18b852e0 [X86] Add assembler and disassembler test cases for clflushopt, clwb, pcommit, xsaves, xrstors, xsavec 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228385 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-06 06:19:28 +00:00
Craig Topper aaf239845a [X86] Remove a ton of duplicate test cases for the assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228383 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-06 05:50:50 +00:00
Craig Topper 20d15157e4 [X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228283 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-05 08:51:06 +00:00
Craig Topper b8fa51de42 [X86] Remove two feature flags that covered sets of instructions that have no patterns or intrinsics. Since we don't check feature flags in the assembler parser for any instruction sets, these flags don't provide any value. This frees up 2 of the fully utilized feature flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228282 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-05 08:51:02 +00:00
Craig Topper 97494e9718 [X86] Make fxsave64/fxrstor64/xsave64/xsrstor64/xsaveopt64 parseable in AT&T syntax. Also make them the default output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227963 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-03 11:03:57 +00:00
Craig Topper c7f2036c2b [X86] Add Requires[In64BitMode] around MOVSX64rr32/MOVSX64rm32. This makes it more strictly mutexed with the ARPL instruction 32-bit mode. Helps with some disassembler changes I'm experimenting with. Should be NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227962 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-03 11:03:43 +00:00
Craig Topper 270f7a2669 [X86] Add a few target specific nodes to 'getTargetNodeName' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227720 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-01 10:00:37 +00:00
Craig Topper aef361807e [X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227302 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-28 10:09:56 +00:00
Craig Topper f3a2214da8 [X86] Merge printSSECC and printAVXCC. They only differed by an assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227301 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-28 10:09:52 +00:00
Craig Topper 1656cc8ddb [X86] Change comparision immediate type to i8 in test cases for AVX512 floating point comparisons. The type was already changed in the definitions and was being auto upgraded to the new type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227064 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 23:26:12 +00:00
Craig Topper fd176682b9 [X86] Use i8 immediate for comparison type on AVX512 packed integer instructions. This matches floating point equivalents. Includes autoupgrade support to convert old code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227063 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 23:26:02 +00:00
Craig Topper ff763041d2 [X86] Give scalar VRNDSCALE instructions priority in AVX512 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227039 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 08:49:22 +00:00
Craig Topper e3792c042d Simplify a multiclass. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227038 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 08:49:19 +00:00
Craig Topper e237954ed8 Remove tab characters. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227036 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 08:45:32 +00:00
Craig Topper 896c1e9b70 [X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make the assembler bounds check them. It will also make them print as unsigned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227032 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-01-25 02:21:16 +00:00