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3683 Commits

Author SHA1 Message Date
Evan Cheng
debdea0a66 Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55925 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 17:15:42 +00:00
Dan Gohman
f91570c264 i128 and f80 are implemented for x86-64 now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55920 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:42:56 +00:00
Dan Gohman
863890e2fa Fix copy+pastos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55918 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 16:31:35 +00:00
Anton Korobeynikov
9bf41effc4 Drop unused variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55901 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:22:38 +00:00
Anton Korobeynikov
28b1deac2c We do support EH on x86-64! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55900 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:22:16 +00:00
Anton Korobeynikov
302affbc53 First draft of EH support on x86/64-linux 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55899 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:21:53 +00:00
Anton Korobeynikov
559189e0ac Implement FRAME_TO_ARGS_OFFSET for x86-64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55898 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:21:10 +00:00
Evan Cheng
24e3a90904 Add support to extend call operands when needed. Enable x86 fastisel call support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55891 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 06:35:17 +00:00
Evan Cheng
f3d4efe30c Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either. 
Not yet turned on, it needs to support sext / zext of arguments and result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55882 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 09:09:33 +00:00
Evan Cheng
e9ac9e6b7d Some code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55881 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 09:07:23 +00:00
Evan Cheng
10a8d9c737 Handle x86 truncate to i8 with target hook for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55877 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 08:47:42 +00:00
Owen Anderson
3b217c6f5c Fix constant pool loads, and remove broken versions of addConstantPoolReference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55868 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-06 01:11:01 +00:00
Owen Anderson
99d6dca2f8 Fix the X86 addConstantPoolReference, which had the operands in the wrong order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55867 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-06 00:50:00 +00:00
Eli Friedman
d0c0fae63b Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x 
i32>.  This is a little messy, but it works.

We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55864 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 23:07:03 +00:00
Dan Gohman
f58cb6d224 Fix X86FastISel's shift and select code to reject illegal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55857 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 21:27:34 +00:00
Dan Gohman
31d26912cc Fix the opcodes used by X86FastISel for shifts and conditional moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55855 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 21:13:04 +00:00
Evan Cheng
0de588fd89 Factor out code that emits load and store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55854 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 21:00:03 +00:00
Owen Anderson
9c7216f984 Rename method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55853 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 20:49:33 +00:00
Dan Gohman
c39f4dba1c X86FastISel support for shifts and conditional moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55844 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 18:30:08 +00:00
Evan Cheng
e2471a9169 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 17:24:07 +00:00
Dan Gohman
4f22bb0676 Check a comparion's operand type for legality before 
expanding its operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55820 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:33:56 +00:00
Dan Gohman
f52550b50e Fix X86FastISel code for comparisons and conditional branches 
to check the result of getRegForValue before using it, and
to check for illegal operand types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55819 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:15:35 +00:00
Dan Gohman
d89ae99ec8 X86FastISel support for conditional branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55816 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 01:06:14 +00:00
Owen Anderson
95267a1e67 Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 00:06:23 +00:00
Dan Gohman
6e3f05f5ce X86FastISel support for ICmpInst and FCmpInst. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55811 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 23:26:51 +00:00
Evan Cheng
4a03775777 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55807 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 22:59:58 +00:00
Devang Patel
db10033d7c If function notes say optimize for size, then adjust alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55794 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 21:03:41 +00:00
Dan Gohman
ae73dc1448 Tidy up several unbeseeming casts from pointer to intptr_t. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 17:05:41 +00:00
Owen Anderson
79924eb6f5 Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 16:48:33 +00:00
Owen Anderson
a3971dfbfe Add a first attempt at implementing stores for X86 fast isel using target hooks. 
Dan or Evan, please review.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 07:08:58 +00:00
Evan Cheng
373d50af1d Load from GV stub should be locally CSE'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55763 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 06:18:33 +00:00
Evan Cheng
c2feb5c262 Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55756 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 01:04:15 +00:00
Dale Johannesen
7794f2a3a7 Add intrinsics for log, log2, log10, exp, exp2. 
No functional change (and no FE change to generate them).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 00:47:13 +00:00
Dan Gohman
3df24e667f Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 23:12:08 +00:00
Evan Cheng
8b19e56051 Add X86 target hook to implement load (even from GlobalAddress). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 06:44:39 +00:00
Ted Kremenek
b388eb82fb Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55687 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 02:54:11 +00:00
Evan Cheng
88e3041ca6 Unbreak fast isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55685 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 01:04:47 +00:00
Evan Cheng
c3f44b0d63 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55679 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 00:03:49 +00:00
Gabor Greif
93c53e5583 fix a bunch of 80-col violations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-31 15:37:04 +00:00
Evan Cheng
b18ae3cb63 For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55562 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-30 08:54:22 +00:00
Evan Cheng
eb9f89287e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-30 02:03:58 +00:00
Evan Cheng
456704476f Swap fp comparison operands and change predicate to allow load folding (safely this time). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 23:22:12 +00:00
Evan Cheng
97af60b3ae Use static_cast instead of C style cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55552 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 23:21:31 +00:00
Evan Cheng
94a50da93c Backing out 55521. Not safe. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55548 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 22:13:21 +00:00
Owen Anderson
667d8f7607 Add initial support for fast isel of instructions that have inputs pinned to physical registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 17:45:56 +00:00
Evan Cheng
4d46d0af58 Swap fp comparison operands and change predicate to allow load folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:48:31 +00:00
Dan Gohman
99b218218c Add a target callback for FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:21:34 +00:00
Gabor Greif
327ef031ed remove tabs, fix > 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55511 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:19:51 +00:00
Gabor Greif
ba36cb5242 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 21:40:38 +00:00
Rafael Espindola
833a990c26 Use resize instead of reserve. Reserve doesn't change size(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55486 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 18:32:53 +00:00
Evan Cheng
66e13153bd FsFLD0S{S|D} and V_SETALLONES are as cheap as moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55466 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 07:52:25 +00:00
Dale Johannesen
e00a8a2a2e Split the ATOMIC NodeType's to include the size, e.g. 
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 02:44:49 +00:00
Bill Wendling
1dd0086b06 Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the 
SSE2 registers as well as the MMX registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55436 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-27 21:32:04 +00:00
Dan Gohman
7deb17108f Reinstate the x86-64 portion of r55190. When doing extloads into 
64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55422 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-27 17:33:15 +00:00
Gabor Greif
99a6cb92d1 disallow direct access to SDValue::ResNo, provide a getter instead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 22:36:50 +00:00
Owen Anderson
a317767f0e These assertions should be return false's instead, allowing the client to detect the failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55377 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 18:50:40 +00:00
Owen Anderson
940f83e772 Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 18:03:31 +00:00
Chris Lattner
6ba50a9252 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55358 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 06:19:02 +00:00
Evan Cheng
b09c25ebf0 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55348 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 01:13:44 +00:00
Evan Cheng
bdf7b5da47 80 col. violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55341 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 21:58:43 +00:00
Evan Cheng
ab6c3bb44d Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55338 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 21:27:18 +00:00
Bill Wendling
cb3c51a4ae Nevermind. This broke the bootstrap (?!). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55318 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 18:32:39 +00:00
Bill Wendling
51e05e7a99 MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these 
instructions on having SSE2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55317 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 18:20:52 +00:00
Evan Cheng
e7321441ac Fix asm printing of MOVSDto64mr and MOV64toSDrm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55300 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 04:11:42 +00:00
Bill Wendling
59b63e4a18 Temporarily reverting r55292. It's causing a bootstraping failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55295 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 21:45:30 +00:00
Evan Cheng
32c727cd95 Move callseq_start above the call address load to allow load to be folded into the call node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55292 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 19:19:55 +00:00
Cedric Venet
d85f51abd4 Use additionnal include directory instead of ../ in #include. 
Suggested by aKor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55282 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 12:30:46 +00:00
Anton Korobeynikov
017c260944 Provide a 64 bit variant of mmx.maskmovq intrinsic lowering. 
Is there way to avoid explicit target check?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55238 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-23 15:53:19 +00:00
Dan Gohman
f350b277f3 Move the point at which FastISel taps into the SelectionDAGISel 
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-23 02:25:05 +00:00
Bill Wendling
449416deb6 Reverting r55190, r55191, and r55192. They broke the build with this error message: 
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 20:51:05 +00:00
Dan Gohman
b4ae2da7e4 Anyext tweaks for x86. When extloading a value to i32 or i64, choose 
instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55190 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 19:19:31 +00:00
Dan Gohman
22bb31103d Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 00:20:26 +00:00
Bill Wendling
ae0218c914 If part of the mask is "undef", then ignore it as we don't care what goes into it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55147 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 22:36:36 +00:00
Bill Wendling
e85dc49e13 Fix whitespace. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55146 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 22:35:37 +00:00
Evan Cheng
1887c1c2f9 Fix a number of byval / memcpy / memset related codegen issues. 
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 21:00:15 +00:00
Mon P Wang
7e66510a2e Treat floating point ST1 the same as ST0 when lowering for a call result 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55135 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 19:54:16 +00:00
Anton Korobeynikov
62990bafa3 Allow inline asm nodes with empty bodies inside JIT. 
This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55128 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 17:33:01 +00:00
Dan Gohman
ad3460c3c9 Simplify SelectRoot's interface, and factor out some common code 
from all targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 16:36:34 +00:00
Bill Wendling
3b32a23a90 Clean up whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55117 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 08:38:54 +00:00
Owen Anderson
cb37188323 Use raw_ostream throughout the AsmPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 00:14:44 +00:00
Dan Gohman
0bfa1bfbff Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE 
out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.

Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55078 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:27:32 +00:00
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel 
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 21:05:57 +00:00
Dan Gohman
67ca6be16a Tablegen generated code already tests the opcode value, so it's not 
necessary to use dyn_cast in these predicates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 15:24:22 +00:00
Dan Gohman
1e684cf1ef Fix comment spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55047 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 13:46:21 +00:00
Dale Johannesen
a99e38495f Add remaining 64-bit atomic patterns for x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:48:50 +00:00
Bill Wendling
5bf1b4eacd Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic. 
Just expand it like the other X-bit sub_and_fetches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55023 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:28:16 +00:00
Bill Wendling
108ecf3975 Add support for the __sync_sub_and_fetch atomics and friends for X86. The code 
was already present, but not hooked up to anything.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 23:09:18 +00:00
Dan Gohman
1adf1b03af Instantiate FastISel for X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55011 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 21:45:35 +00:00
Dan Gohman
d9f3c480a7 The X86 target will soon have an implementation of createFastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55010 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 21:32:53 +00:00
Dale Johannesen
140be2dfb7 Add support for 8 and 16 bit forms of __sync 
builtins on X86.

Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 18:47:28 +00:00
Chris Lattner
fa7e17d379 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54964 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 00:41:02 +00:00
Chris Lattner
cd7ab05c37 remove empty file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54950 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-18 21:27:19 +00:00
Evan Cheng
0ac3fc2a61 Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 19:22:34 +00:00
Cedric Venet
94fb5f2a70 Make it compile on VC2005: 
- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54898 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 18:24:26 +00:00
Anton Korobeynikov
3c3bc48d33 Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54886 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 13:53:59 +00:00
Anton Korobeynikov
d97f29531c Use correct name for TLS address resolution routine on x86-64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54845 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-16 12:58:29 +00:00
Anton Korobeynikov
d0c1e29aec Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-16 12:57:07 +00:00
Dan Gohman
172f0fa16b Build the X86GenFastISel.inc file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54806 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 23:18:11 +00:00
Dan Gohman
ef521f14b7 Also avoid pinsrw and pinsrb with a variable insertelement index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54803 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 22:53:18 +00:00
Owen Anderson
44eb65cf58 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-14 22:49:33 +00:00