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264 Commits

Author SHA1 Message Date
Lauro Ramos Venancio
1baa1971a6 "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:33:08 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 15:02:46 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:29:01 +00:00
Chris Lattner
b9a7bea99c Switch PPC return lower to use an autogenerated CC description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 00:59:59 +00:00
Nicolas Geoffray
43c6e7cd9b Implemented the frameaddress intrinsic for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 13:11:38 +00:00
Nicolas Geoffray
63f8fb1993 Differentiate between the MachO and the ELF ABI the CALL instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34667 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 13:01:19 +00:00
Chris Lattner
caddd44be7 always lower to RETFLAG, never leave it as just ret. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34639 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 19:44:02 +00:00
Chris Lattner
4ddf7a4ca6 no really, this is the right patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34605 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 20:01:40 +00:00
Chris Lattner
640c0ac01d always promote float varargs to double. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34604 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 19:59:18 +00:00
Chris Lattner
9f0bc659c8 implement support for the linux/ppc function call ABI. Patch by 
Nicolas Geoffray!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 05:34:32 +00:00
Jim Laskey
2ad9f17fee Simplify lowering and selection of exception ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Chris Lattner
dee5a5a52c Fix ixaddrs as well, allowing ppc64 to compile to: 
_test2:
        li r2, 0
        lis r3, 1
        std r2, 9024(r3)
        blr

instead of:

_test2:
        lis r2, 1
        li r3, 0
        ori r2, r2, 9024
        std r3, 0(r2)
        blr

This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34373 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 06:57:26 +00:00
Chris Lattner
bc681d6af4 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: 
_test:
        lis r2, 743
        li r3, 0
        stw r3, 32751(r2)
        blr

instead of:

_test:
        li r2, 0
        stw r2, 32751(48693248)
        blr

Implement support for ppc64 as well, allowing it to produce better code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 06:44:03 +00:00
Nate Begeman
bcc5f36765 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 22:58:52 +00:00
Anton Korobeynikov
b10308e440 Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-28 13:31:35 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00
Evan Cheng
d08d23315d setSetCCIsExpensive is gone. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32941 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-05 23:42:53 +00:00
Jim Laskey
ca367b4e25 Provide support for FP_TO_UINT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-15 14:32:57 +00:00
Chris Lattner
57fc62c8d2 Another step forward in PPC64 JIT support: we now no-longer need stubs 
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).

This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 23:22:45 +00:00
Jim Laskey
2060a822fe Missing opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32439 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 18:45:56 +00:00
Anton Korobeynikov
d27a258d2d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-10 23:12:42 +00:00
Chris Lattner
85c671b908 Fix i64 uint_to_fp on ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32297 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 01:24:16 +00:00
Jim Laskey
efc7e52183 Restoration of the stack pointer after a deallocation of a alloca was not 
updating the SP link.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32202 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-04 22:04:42 +00:00
Jim Laskey
fbb74e6941 1. In ppc64 mode we need only use one GPR. 
2. Float values need to be promoted to double when they are vararg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 16:30:47 +00:00
Chris Lattner
70fa493613 Fix the CodeGen/PowerPC/vec_constants.ll regression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32057 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 01:45:39 +00:00
Chris Lattner
15eb329dae Fix bug codegen'ing FP constant vectors with integer splats. Make sure the 
created intrinsics have the right integer types.  This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32024 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 19:58:49 +00:00
Jim Laskey
619965d32e Offset for load of 32-bit arg in 64-bit world was incorrect. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32019 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 13:37:09 +00:00
Jim Laskey
7fc4a94bdd Remove debug code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31970 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 18:27:02 +00:00
Jim Laskey
e9bd7b2e03 32-bit int space was not accounted for properly in lowerCall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31966 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 14:53:52 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Chris Lattner
b1eb987ccd on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots. 
Also, valist should create a pointer RC reg class value, not a GPRC value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-18 01:57:19 +00:00
Chris Lattner
18258c6404 convert PPC::BCC to use the 'pred' operand instead of separate predicate 
value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:37:34 +00:00
Chris Lattner
289c2d5f45 rename PPC::COND_BRANCH to PPC::BCC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31834 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:14:47 +00:00
Chris Lattner
df4ed6350b start using PPC predicates more consistently. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:10:59 +00:00
Jim Laskey
2f616bff7e This is a general clean up of the PowerPC ABI. Address several problems and 
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 22:43:37 +00:00
Chris Lattner
0851b4f3ed fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri 
addrmodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 19:55:13 +00:00
Chris Lattner
ac011bce9e lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of 
'(shr (ctlz (sub Y, Z)), 5)'.

The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner.  For example, this:

typedef struct {
  unsigned prefix : 4;
  unsigned code : 4;
  unsigned unsigned_p : 4;
} tree_common;

int foo(tree_common *a, tree_common *b) {
  return a->code == b->code;
}

Now compiles to:

_foo:
        lwz r2, 0(r4)
        lwz r3, 0(r3)
        xor r2, r3, r2
        rlwinm r2, r2, 28, 28, 31
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

instead of:

_foo:
        lbz r2, 3(r4)
        lbz r3, 3(r3)
        srwi r2, r2, 4
        srwi r3, r3, 4
        subf r2, r2, r3
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

saving a cycle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31725 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-14 05:28:08 +00:00
Chris Lattner
2fe4bf453b minor tweaks, reject vector preinc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31717 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-14 01:38:31 +00:00
Chris Lattner
f6edf4dcf0 ppc64 doesn't have lwau, don't attempt to form it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31656 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:08:42 +00:00
Chris Lattner
94e509caea implement preinc support for r+i loads on ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 23:58:45 +00:00
Chris Lattner
4eab71497d add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31621 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 02:08:47 +00:00
Evan Cheng
cd63319227 PPC supports i32 / i64 pre-inc load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:11:50 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Chris Lattner
fc5b1ab949 Refactor all the addressing mode selection stuff into the isel lowering 
class, where it can be used for preinc formation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31536 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:15:41 +00:00
Reid Spencer
3ed469ccd7 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 20:25:50 +00:00
Chris Lattner
331d1bc5df Implement the getRegForInlineAsmConstraint method for PPC. With recent 
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:44:04 +00:00
Chris Lattner
dba1aeedd8 Change the prototype for TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:40:43 +00:00
Evan Cheng
c35497fc2a All targets expand BR_JT for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 08:02:39 +00:00