Mikhail Glushenkov
401b90a4bc
80-col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 09:09:10 +00:00
Mikhail Glushenkov
11d03f690e
Remove try/catch(...) from Win32/Signals.inc.
...
catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.
We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.
The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.
[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 09:09:04 +00:00
Kevin Enderby
e460890351
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
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(still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4
Another tweak to X86 instructions to add the missing flex instruction (without
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the wait prefix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:32:19 +00:00
Jim Grosbach
77aee8e22c
LDRi12 machine instructions handle negative offset operands normally (simple
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integer values), not with the addrmode2 encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 01:19:41 +00:00
Kevin Enderby
41e8cc73cf
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
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will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen
c95c1465fd
Handle critical loop predecessors by making both inside and outside registers
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live out.
This doesn't prevent us from inserting a loop preheader later on, if that is
better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117424 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
0960a650b7
Compute critical loop predecessors in the same way as critical loop exits.
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Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117423 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
8c593f9173
Physical registers trivially have multiple connected components all the time.
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Only virtuals should be requires to be connected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:39:01 +00:00
Jim Grosbach
f85dd04bfa
One more spot where the new arm mode LDR instruction representation
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doesn't need the additional addrmode2 register operand. Missed it the first
time around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:38:16 +00:00
Wesley Peck
a06038369b
Adding disassembler to the MicroBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:23:01 +00:00
Jim Grosbach
c1d30212e9
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
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rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:19:44 +00:00
Jim Grosbach
28e3fe961f
Since I parameterized this bit, I should probably actually use said parameter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117418 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:58:04 +00:00
Dale Johannesen
1de4aa904e
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
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memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:11:10 +00:00
Andrew Trick
3d26d5d524
Remove the vector of live vregs. I thought we would need to track
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them, but hopefully we won't. And this is not the right data structure
to do it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:58:24 +00:00
Owen Anderson
86ed2324a6
Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:50:46 +00:00
Jim Grosbach
3e55612472
First part of refactoring ARM addrmode2 (load/store) instructions to be more
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explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen
3a0e0715a5
After splitting, compute connected components of all new registers, not just for
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the remainder register.
Example:
bb0:
x = 1
bb1:
use(x)
...
x = 2
jump bb1
When x is isolated in bb1, the inner part breaks into two components, x1 and x2:
bb0:
x0 = 1
bb1:
x1 = x0
use(x1)
...
x2 = 2
x0 = x2
jump bb1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
501dc42245
Verify that live intervals are connected. If there are multiple connected
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components, each should get its own virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
f1354ae95a
Call RenumberValues for all new registers created during splitting. This is
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necessary to get correct hasPHIKill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
79c0262fa8
Preserve PHIDef bits in cloned values during splitting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:36:02 +00:00
Devang Patel
7e13efad38
Assign source ordering to nodes created for StoreInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:14:52 +00:00
Owen Anderson
632c235a31
Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:58:41 +00:00
Owen Anderson
ac92262b61
Simplify classes for shift instructions, which are never commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:13:59 +00:00
Owen Anderson
3557d00a38
Provide correct NEON encodings for vshl, register and immediate forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen
f4a1e1a69f
Teach MachineBasicBlock::print() to annotate instructions and blocks with
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SlotIndexes when available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117392 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
dbcc2e119d
Remmeber to print full live interval on verification error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117391 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:21:43 +00:00
Rafael Espindola
61e3b91da7
Add support for .ident.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:35:47 +00:00
Jim Grosbach
0eb7d06ab1
Grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:34:41 +00:00
Jim Grosbach
c3baf62800
Nuke extraneous comment. It's applicable elsewhere, but not in this func.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:22:23 +00:00
Andrew Trick
e16eecc323
Jakob's review of the basic register allocator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:34:01 +00:00
Owen Anderson
bc4118bd36
Add correct NEON encoding for vpadal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:18:03 +00:00
Rafael Espindola
de42e5c09b
handle X86::EH_RETURN64 and X86::EH_RETURN.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:09:55 +00:00
Devang Patel
cbbe287f8a
s/beginScope/beginInstruction/g
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s/endScope/endInstruction/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:49:02 +00:00
Owen Anderson
a88ea03bf2
Add NEON encodings for vmov and vmvn of immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:40:54 +00:00
Jakob Stoklund Olesen
e459d55f28
Don't verify physical registers going into landing pads.
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Magic is happening that we don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 16:49:23 +00:00
Rafael Espindola
e4f506ff4b
Implement some relaxations for arithmetic instructions. The limitation
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on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 14:09:12 +00:00
Kalle Raiskila
505faa6b12
Change v64 datalayout in SPU.
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The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays,
we use array alignment for v64 too. This makes the
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.
This also makes an "unaligned store" test to be
aligned, with different (but functionally equivalent)
code generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 10:45:47 +00:00
Evan Cheng
c8141dfc7f
Use instruction itinerary to determine what instructions are 'cheap'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 02:08:50 +00:00
Evan Cheng
0e9996ca94
NEON vmov's are in Neon domain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 02:03:05 +00:00
Nick Lewycky
a568d66512
For statistics that are only used in functions declared in !NDEBUG, wrap the
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declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:51:57 +00:00
Jakob Stoklund Olesen
0a12b801b5
InlineSpiller can also update LiveStacks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:11:35 +00:00
Jakob Stoklund Olesen
2d17293dd0
Make the spiller responsible for updating the LiveStacks analysis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:11:33 +00:00
Bob Wilson
7c730e7790
When the "true" and "false" blocks of a diamond if-conversion are the same,
...
do not double-count the duplicate instructions by counting once from the
beginning and again from the end. Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end. Radar 8589805.
This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction. That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:24 +00:00
Bob Wilson
2ad40d3494
Change if-conversion to keep track of the extra cost due to microcoded
...
instructions separately from the count of non-predicated instructions. The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117332 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:21 +00:00
Bob Wilson
b3a6817d06
Tidy up redundant check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:19 +00:00
Evan Cheng
38fd9f2a2d
Neuter r117193 as it causes significant post-ra scheduler compile time regression.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 23:56:21 +00:00
Rafael Espindola
3336384239
Produce the headers directly in the Finish method. This allows us to use
...
the existing streamer methods that are endian safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:26:55 +00:00
Dale Johannesen
d155d7e428
An stdcall function calling a non-stdcall function
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cannot use tailcall. PR 8461.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:17:05 +00:00
Dan Gohman
87c5c2f069
Support TBAA attachments on calls. This is somewhat experimental.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:38:20 +00:00
Devang Patel
df8370bd70
Simplify.
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Do not count use of sdisel for single call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:31:46 +00:00
Owen Anderson
5258b61966
Add correct encodings for NEON vabal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117315 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:29:04 +00:00
Dan Gohman
0b2136927d
Fix chaining in TBAA's pointsToConstantMemory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:24:55 +00:00
Devang Patel
948f7d0216
Add counters to count basic blocks and machine basic blocks with out of order line number info.
...
Add counters to count how many basic blocks are entirely selected by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:55:43 +00:00
Owen Anderson
410aebc670
Add correct NEON encodings for vaba.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:52:57 +00:00
Devang Patel
9a31f0f398
Add simple counter to count no. of basic blocks without any line number information. At -O0, these basic block coule cause less than optimial debugging experience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:45:32 +00:00
Dan Gohman
ae92af6771
Only read one bit for testing for a readonly type, leaving the other
...
bits open for future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117301 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:22:29 +00:00
Daniel Dunbar
b1e0f76352
MC/AsmParser: Fix relative precedence of {+,-} and comparison ops.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:56 +00:00
Daniel Dunbar
bdf90d679b
MC/AsmLexer: Fix bug in source location for Slash token.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:53 +00:00
Owen Anderson
31e6ed890a
Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:17:22 +00:00
Owen Anderson
4110b4325d
Provide correct NEON encodings for vbsl.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:13:13 +00:00
Jim Grosbach
458f2dc5d1
imm12 operands aren't Thumb2 only, so rename the printer helper function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:00:01 +00:00
Dan Gohman
269008ee83
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 19:47:25 +00:00
Owen Anderson
162875a9f3
Add correct instruction encodings for vbic, vorn, and vmvn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:43:52 +00:00
Rafael Espindola
4921e2356e
Add a virtual destructor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:38:32 +00:00
Owen Anderson
8c71eff594
Provide correct NEON encodings for vand, veor, and vorr.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:28:30 +00:00
Owen Anderson
d0c5b6170f
Add NEON encoding tests for vcgt and vacgt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:03:59 +00:00
Rafael Espindola
cecbc3d282
Add support for emitting ARM file attributes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:50:35 +00:00
Owen Anderson
10c15e5d58
Add tests for NEON encodings of vcge and vacge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:49:32 +00:00
Owen Anderson
4fe20bbd66
Add a warning about our inability to test the encoding of vceq with immediate zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:33:02 +00:00
Jakob Stoklund Olesen
d3b4895414
In which I learn how to forward declare template classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:27:30 +00:00
Dan Gohman
e46a3881fc
Update comments; BasicAA is no longer necessarily the end of the chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:29:52 +00:00
Dan Gohman
852dda4625
Reintroduce these asserts, now that BasicAA is a normal AliasAnalysis pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:28:57 +00:00
Dan Gohman
17a0bf996f
Fix a case where instcombine was stripping metadata (and alignment)
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from stores when folding in bitcasts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:16:27 +00:00
Charles Davis
970bfcc7d8
Add a new 'hotpatch' attribute. This attribute will insert a two-byte no-op
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instruction at the beginning of each function that has the attribute, allowing
the function to be easily hooked and/or patched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 15:37:09 +00:00
Duncan Sands
05897c8f26
ATTRIBUTE_UNUSED has been renamed to LLVM_ATTRIBUTE_UNUSED.
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Rather than rename this instance, use the cast-to-void idiom
instead. This will hopefully fix the windows buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 13:10:03 +00:00
Rafael Espindola
24ba4f7f5f
Add X86::reloc_global_offset_table and use it to have a single place where
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we check for _GLOBAL_OFFSET_TABLE_.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 17:35:42 +00:00
Duncan Sands
5f28475b30
Fix PR8445: a block with no predecessors may be the entry block, in which case
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it isn't unreachable and should not be zapped. The check for the entry block
was missing in one case: a block containing a unwind instruction. While there,
do some small cleanups: "M" is not a great name for a Function* (it would be
more appropriate for a Module*), change it to "Fn"; use Fn in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 12:23:30 +00:00
Benjamin Kramer
a53fe6070c
SmallVectorize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 17:10:24 +00:00
Eric Christopher
a4633f5d74
Move rejection of NEON parameters earlier in fast isel call processing,
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note that we can actually handle some f64 arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:37:17 +00:00
Benjamin Kramer
4d1dca92bd
Make the disassembler tables const so they end up in read-only memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:10:44 +00:00
Michael J. Spencer
c527407010
X86: Emit _fltused instead of __fltused on Windows x64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:06:59 +00:00
Chandler Carruth
19e57025d4
Move the remaining attribute macros to systematic names based on the attribute
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name and prefixed with 'LLVM_'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:40:19 +00:00
Chandler Carruth
5117709a1d
Remove a define which is never referenced.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117202 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:25:16 +00:00
Chandler Carruth
100c267249
Switch attribute macros to use 'LLVM_' as a prefix. We retain the old names
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until other LLVM projects using these are cleaned up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 08:10:43 +00:00
Chandler Carruth
2b3ef8b065
Fix a likely bug in an assertion by adding parentheses around '||'. This bug
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was found by a GCC warning. ;]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:46:14 +00:00
Evan Cheng
5c2d428f43
Enable ARM fastcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:19:37 +00:00
Evan Cheng
ec6906ba47
Properly model the latency of register defs which are 1) function returns or
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2) live-outs.
Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:10:46 +00:00
Evan Cheng
dd9dd6f857
Latency between CPSR def and branch is zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 02:04:38 +00:00
Jakob Stoklund Olesen
7871687604
Verify LiveIntervals against the CFG, ensuring that live-in values are live-out
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of all predecessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 00:49:09 +00:00
Jim Grosbach
a9a968d1ef
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:48:29 +00:00
Andrew Trick
f433106054
Nonvirtual dtor that was accessible enough to be bad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:33:19 +00:00
Gabor Greif
41f31ef28e
fix memory-layout assumption which only holds on little-endian systems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:16:11 +00:00
Andrew Trick
14e8d71cc9
This is a prototype of an experimental register allocation
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framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting.
A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:09:15 +00:00
Jakob Stoklund Olesen
3bf7cf9f0e
Add more verification of LiveIntervals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:48:58 +00:00
Jakob Stoklund Olesen
2bfb324684
Be more strict about detecting multi-use blocks for isolation.
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When a block has exactly two uses and the register is both live-in and live-out,
don't isolate the block. We would be inserting two copies, so we haven't really
made any progress.
If the live-in and live-out values separate into disconnected components after
splitting, we would be making progress. We can't detect that for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:48:56 +00:00
Jim Grosbach
f8da5f5dfa
ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:12:16 +00:00
Evan Cheng
c8f46c45a0
Unbreak build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:49:09 +00:00
Bob Wilson
364f17c471
Teach instcombine to set the alignment arguments for NEON load/store intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117154 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:41:48 +00:00
Evan Cheng
b179b46cc5
Transfer implicit ops when forming load multiple and return instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:29:58 +00:00
Jakob Stoklund Olesen
2c1442e1b2
Be more strict when detecting critical edges before loop splitting.
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An exit block with a critical edge must only have predecessors in the loop, or
just before the loop. This guarantees that the inserted copies in the loop
predecessors dominate the exit block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 20:28:23 +00:00
Jakob Stoklund Olesen
532de3dc6e
Add print methods
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 20:28:21 +00:00
Owen Anderson
9b26497273
Add correct NEON encodings for vqdmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:35:48 +00:00
Jim Grosbach
385e136dce
Add the encoding information for the rest of the ARM mode multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:15:30 +00:00
Owen Anderson
92205842ca
Provide correct encodings for NEON vmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:05:25 +00:00
Evan Cheng
1f8b40d51c
Silence compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117128 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:57:05 +00:00
Owen Anderson
18341e9e31
Provide correct NEON encodings for vmla.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:54:37 +00:00
Jim Grosbach
3870b750e6
More ARM multiply instuction binary encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:35:16 +00:00
Evan Cheng
76f920d316
Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:23:05 +00:00
Jim Grosbach
929a7056d8
Parameterize a bit of ARM encoding information, simplifying some instruction
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definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:42:06 +00:00
Benjamin Kramer
a3ac427507
Make some symbols static, move classes into anonymous namespaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:35:07 +00:00
Jim Grosbach
9463d0e400
More ARM multiply instruction encoding information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:16:17 +00:00
Wesley Peck
eecb858ca8
Making the e_machine configurable by the target backend in ELFObjectWriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 15:52:49 +00:00
Andrew Trick
0966ec0861
Reverting r117031 to cleanup valgrind errors.
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It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 03:58:29 +00:00
Eric Christopher
4f512efee9
Add some basic ret instruction support to arm fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117085 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:28:00 +00:00
Sean Callanan
751752e7ca
Fixed handling of immediate operand sizes, which
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weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix. Also added
a test case for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:24:11 +00:00
NAKAMURA Takumi
2172f3cd97
Win32/Signals.inc: DontRemoveFileOnSignal(): Please acquire the CriticalSection.
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It choked BugPoint on Mingw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:23:50 +00:00
Jim Grosbach
f50af8b5b8
ARM binary encoding for some of the multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:52:30 +00:00
Jim Grosbach
3686046a2c
ARM binary encodings for MVN variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:32 +00:00
Jim Grosbach
fe40f9551c
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:04:05 +00:00
Jim Grosbach
3fea19105d
ARM Binary encoding information for BFC/BFI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:03:21 +00:00
Dan Gohman
ee135131b1
Add some more documentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:55:35 +00:00
Eric Christopher
1778772d1b
These don't need to be virtual.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:47:51 +00:00
Michael J. Spencer
ef0401ad66
Fix Warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:38 +00:00
Michael J. Spencer
391b43bf33
X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
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This is needed for indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:23 +00:00
Owen Anderson
90d4cf9314
Move the encoding logic for Q registers into getMachineOpValue().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:13 +00:00
Mikhail Glushenkov
84ba14f6d0
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:40:39 +00:00
Owen Anderson
d451f888b8
ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower
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half of the Q register), rather than with just regno. This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:21:49 +00:00
Eric Christopher
5b924809e4
Handle storing args to the stack for calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:09:54 +00:00
Wesley Peck
4da992aeba
Adding initial AsmParser implementation for the MBlaze backend. It is
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mostly based on the ARM AsmParser at this time and is not particularly
functional.
Changed the MBlaze data layout from:
"E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
"E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.
Cleaned up the MBlaze source code:
1. The floating point register class has been removed. The
MicroBlaze does not have floating point registers. Floating
point values are simply stored in integer registers.
2. Renaming the CPURegs register class to GPR to reflect the
standard naming.
3. Removing a lot of stale code from AsmPrinter after
the conversion to InstPrinter.
4. Simplified sign extended loads by marking them as
expanded in ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117054 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:48:38 +00:00
Dan Gohman
bc078c81e6
Explain what "constant" means here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:45:09 +00:00
Eric Christopher
212ae937bb
More load/store refactoring, call reg+offset simplification from within
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the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:40:30 +00:00
Jim Grosbach
3ab5658a12
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:38:40 +00:00
Dan Gohman
de38897cfc
Update comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 19:01:22 +00:00
Owen Anderson
1e93466c3a
Add correct NEON encodings for vhadd and vrhadd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:55:04 +00:00
Jakob Stoklund Olesen
9d999772df
Don't include the destination interval in the union when computing
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Parent - union(Y, ...). Doh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117042 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:47:08 +00:00
Jakob Stoklund Olesen
0a7bbcb0cc
Permit landing pad successor blocks when verifying basic blocks that end in an
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unconditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117041 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:47:06 +00:00
Owen Anderson
9d50559bae
Add correct encodings for NEON vaddw.s* and vaddw.u*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e
Provide correct NEON encodings for vaddl.u* and vaddl.s*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:09:17 +00:00
Rafael Espindola
8c8bc05a38
Do not recurse into symbol refs that have a variant kind. This prevents us
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from losing the variant when producing a relocation on an alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:00:20 +00:00
Kevin Enderby
0b9325c97d
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 17:16:46 +00:00
Duncan Sands
bf9fc53f46
AlignLoc is never used for anything - zap it (gcc-4.6 warning).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:07:10 +00:00
Duncan Sands
dbbd99faf1
The return value of this call is not used, so no point
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in assigning it to a variable (gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:06:28 +00:00
Duncan Sands
2b55f56df8
RetOp is not actually used for anything useful (though
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it looks like maybe it was supposed to be used in the
test...), so zap it (gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:05:44 +00:00
Duncan Sands
9bc20ca728
The variable liTRC is not used for anything useful, zap it
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(gcc-4.6 warning).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:04:43 +00:00
Duncan Sands
6abfa46987
Remove some variables that are never really used
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(gcc-4.6 warns about these).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:03:28 +00:00
Duncan Sands
1e1ca0b56d
Add parentheses to pacify gcc, which warns otherwise.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 16:02:12 +00:00
Duncan Sands
b35fd448ce
Fix the cleanup process of exception information in JIT. Now JIT
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deregisters registered by it FDE structures allowing consecutive
JIT runs to succeed. Patch by Yuri. Fixes PR8285.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117004 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 08:57:29 +00:00
Wesley Peck
42bd9b30d9
Removing stale AsmPrinter directory from MicroBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 05:05:06 +00:00