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988 Commits

Author SHA1 Message Date
Evan Cheng
debdea0a66 Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55925 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 17:15:42 +00:00
Anton Korobeynikov
e665c0789e Testcase for 64-bit lowering of eh_return & unwind_init 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:23:16 +00:00
Anton Korobeynikov
a8268a77df Add test for checking proper lowering of eh_return & unwind init intrinsics on 32bit x86 targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55902 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 14:22:57 +00:00
Evan Cheng
98d2d07d41 Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-08 08:39:33 +00:00
Evan Cheng
10a8d9c737 Handle x86 truncate to i8 with target hook for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55877 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-07 08:47:42 +00:00
Eli Friedman
d0c0fae63b Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x 
i32>.  This is a little messy, but it works.

We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55864 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 23:07:03 +00:00
Evan Cheng
7f132122c8 Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55849 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 20:04:37 +00:00
Evan Cheng
e2471a9169 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-05 17:24:07 +00:00
Evan Cheng
4a03775777 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55807 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 22:59:58 +00:00
Owen Anderson
79924eb6f5 Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 16:48:33 +00:00
Owen Anderson
a3971dfbfe Add a first attempt at implementing stores for X86 fast isel using target hooks. 
Dan or Evan, please review.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 07:08:58 +00:00
Evan Cheng
373d50af1d Load from GV stub should be locally CSE'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55763 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 06:18:33 +00:00
Evan Cheng
c2feb5c262 Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55756 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-04 01:04:15 +00:00
Evan Cheng
8b19e56051 Add X86 target hook to implement load (even from GlobalAddress). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-09-03 06:44:39 +00:00
Evan Cheng
cd04708f59 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55564 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-30 09:09:33 +00:00
Evan Cheng
eb9f89287e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-30 02:03:58 +00:00
Evan Cheng
456704476f Swap fp comparison operands and change predicate to allow load folding (safely this time). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 23:22:12 +00:00
Evan Cheng
50ead9099d xfail this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55550 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-29 22:59:13 +00:00
Evan Cheng
4d46d0af58 Swap fp comparison operands and change predicate to allow load folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 23:48:31 +00:00
Dan Gohman
a3f8b7a4ce Optimize DAGCombiner's worklist processing. Previously it started 
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 21:01:56 +00:00
Dan Gohman
f641395435 Revert r55467; it causes regressions in UnitTests/Vector/divides, 
Benchmarks/sim/sim, and others on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55475 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 17:22:54 +00:00
Evan Cheng
9242cb8b82 If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55467 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 07:53:51 +00:00
Dale Johannesen
f2c785edf0 This test crashes on non-x86 host; make SSE explicit. 
Feel free to fix a better way!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55456 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-28 01:51:09 +00:00
Dan Gohman
10df0fa73e Basic FastISel support for floating-point constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-27 01:09:54 +00:00
Chris Lattner
6ba50a9252 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55358 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-26 06:19:02 +00:00
Evan Cheng
ab6c3bb44d Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55338 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 21:27:18 +00:00
Owen Anderson
6d0c25ec3a Add support for fast isel of (integer) immediate materialization pattens, and use them to support 
bitcast of constants in fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 20:20:32 +00:00
Evan Cheng
e7321441ac Fix asm printing of MOVSDto64mr and MOV64toSDrm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55300 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-25 04:11:42 +00:00
Bill Wendling
3574c2d849 Fix this test. Don't null out the file, just XFAIL it until patch can be fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55296 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 21:48:46 +00:00
Bill Wendling
59b63e4a18 Temporarily reverting r55292. It's causing a bootstraping failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55295 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 21:45:30 +00:00
Evan Cheng
32c727cd95 Move callseq_start above the call address load to allow load to be folded into the call node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55292 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-24 19:19:55 +00:00
Anton Korobeynikov
8ff7ce3dd2 Testcase for 64bit maskmovq 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55239 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-23 15:53:47 +00:00
Dale Johannesen
169b5ed46e Test all currently supported atomic builtins on x86-{32,64}. 
These just test that they go through the BE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55208 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 22:39:21 +00:00
Dan Gohman
22bb31103d Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-22 00:20:26 +00:00
Bill Wendling
403483c200 Testcase for PR2585. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55151 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 23:04:49 +00:00
Dan Gohman
c67670b1ae Add -mattr=sse2 so this test doesn't fail on non-x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55145 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 22:34:25 +00:00
Dale Johannesen
e2122a5e2e Make x86 and sse2 explicit for non-x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55141 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 21:26:06 +00:00
Evan Cheng
1887c1c2f9 Fix a number of byval / memcpy / memset related codegen issues. 
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 21:00:15 +00:00
Dan Gohman
5cc101ec89 getelementptr doesn't work on x86-64 yet, because it 
has MOV64ri32 and no plain MOV64ri.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55126 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 17:28:42 +00:00
Dan Gohman
7a0e6593d0 MVT::getMVT uses iPTR for pointer types, while we need the actual 
intptr_t type in this case. FastISel can now select simple
getelementptr instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55125 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 17:25:26 +00:00
Dan Gohman
d5fe57d2f9 Basic fast-isel support for instructions with constant int operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-21 01:41:07 +00:00
Dan Gohman
5c6aea9714 Add a -march line for this test, and run it on x86-64 too for fun. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55030 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:56:07 +00:00
Dan Gohman
8014e86580 Add FastISel support for floating-point operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55021 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:23:20 +00:00
Dan Gohman
bdedd44773 Add FastISel support for several more binary operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-20 00:11:48 +00:00
Bill Wendling
108ecf3975 Add support for the __sync_sub_and_fetch atomics and friends for X86. The code 
was already present, but not hooked up to anything.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 23:09:18 +00:00
Dan Gohman
d3aedf445c Fast-isel is now *minimally* functional. Add a testcase to 
demonstrate the extent of its capabilities. Note that it
only attempts to operate on one of the blocks in this
testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55016 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 22:37:59 +00:00
Dale Johannesen
140be2dfb7 Add support for 8 and 16 bit forms of __sync 
builtins on X86.

Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-19 18:47:28 +00:00
Evan Cheng
0ac3fc2a61 Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-17 19:22:34 +00:00
Dan Gohman
6ab6422f25 Allow SelectionDAG to create EXTRACT_VECTOR_ELT nodes with 
non-constant indices. Only a few of the peephole checks require
a constant index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-13 21:51:37 +00:00
Dan Gohman
00f19b6542 Improve the grep commands for this test to be tolerant of ABI 
differences, and to be more specific.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54648 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-11 20:10:41 +00:00
Dan Gohman
8cea8ff34c Take the FrameOffset into account when computing the alignment 
of stack objects. This fixes PR2656.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-11 18:27:03 +00:00
Dan Gohman
d9ced09299 Add an EXTRACTPSmr pattern to match the pattern that 
X86ISelLowering creates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-08 18:30:21 +00:00
Dan Gohman
e3d920699c Re-enable elimination of unnecessary SUBREG_TO_REG instructions in 
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-07 02:54:50 +00:00
Dan Gohman
865db4566e Add an extra example that shouldn't get an and instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54443 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-07 02:23:06 +00:00
Dan Gohman
8a1510d192 Re-introduce the 8-bit subreg zext-inreg patterns for x86-32, 
this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54418 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-06 18:27:21 +00:00
Evan Cheng
e9d5035838 Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 22:19:15 +00:00
Evan Cheng
e3b8a48d32 Fix PR2596: out of bound reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54375 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 21:51:46 +00:00
Owen Anderson
b6634e9e27 Update the remaining tests not to use -disable-correct-folding, and remove two 
that couldn't be updated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54359 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 18:19:14 +00:00
Owen Anderson
551ddf718c One more -disable-correct-folding case removed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54358 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 18:08:56 +00:00
Owen Anderson
2a1f07ea6a Remove another -disable-correct-folding use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54357 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 18:05:58 +00:00
Owen Anderson
d6db225800 Eliminate another use of -disable-correct-folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54356 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 18:03:01 +00:00
Evan Cheng
068b4ff553 Fix PR2568: Fix bug that cause redudant kill marker after its live interval has been extended due to coalescing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54346 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-05 07:10:38 +00:00
Owen Anderson
2b85dc3544 Update these tests to work by disabling the new correct CFG generation. This flag should ONLY be used to for tests like these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54334 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-04 23:55:29 +00:00
Dan Gohman
6f498b0a8e Fix SDISel lowering of PHI nodes to use ComputeValueVTs. 
This allows it to work correctly on aggregate values.
This fixes PR2623.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-04 23:42:46 +00:00
Dale Johannesen
3b4c45203e Make sse2 explicit, for non-x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54251 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-31 20:16:33 +00:00
Dan Gohman
75dcf08243 Improve dagcombining for sext-loads and sext-in-reg nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-31 00:50:31 +00:00
Dan Gohman
1053502486 I missed this file in r54223. movzbl is now used instead 
of movzbw here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54224 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-30 18:23:34 +00:00
Dan Gohman
11ba3b1af6 Reapply r54147 with a constraint to only use the 8-bit 
subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.

Also, change several 16-bit instructions to use 
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54223 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-30 18:09:17 +00:00
Mon P Wang
e3b3a7241c Added support for overloading intrinsics (atomics) based on pointers 
to different address spaces.  This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-30 04:36:53 +00:00
Dan Gohman
7ba145b0b4 Revert 54147. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54148 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-29 01:02:18 +00:00
Dan Gohman
b1e8cad61e Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation, 
which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-28 22:18:25 +00:00
Dan Gohman
6c4942641f Fix embedded CRLF characters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54125 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-27 18:37:58 +00:00
Nate Begeman
907f46a81f Fix test RUN line 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54040 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 19:08:59 +00:00
Nate Begeman
fb8ead0c20 Disable mov{L, LP, HP, HLP, *DUP} shuffles for mmx 
mmx needs its own fancy shuffle logic based on unpack; for now we get correct but awful code.

Also commit Mon Ping's VSETCC patch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54039 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 19:05:58 +00:00
Dan Gohman
1f335e3139 This test needs -aggressive-remat enabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54015 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 15:25:32 +00:00
Dan Gohman
6d69ba8a69 Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory, 
and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54000 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-25 00:02:30 +00:00
Dan Gohman
5444c30723 Add target triples so these tests behave as expected on non-darwin hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53991 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-24 18:08:01 +00:00
Evan Cheng
2d58bfac59 New test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53971 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-24 00:22:05 +00:00
Evan Cheng
5e6ebaf4d1 Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions. 
Based on patch by Nicolas Capens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53939 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-23 00:22:17 +00:00
Duncan Sands
11e56cb4dc LegalizeTypes support for VSETCC. Fixes PR2575. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53938 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 23:54:03 +00:00
Evan Cheng
2925786765 Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to output a vector value. Patch by Nicolas Capens! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 20:42:56 +00:00
Evan Cheng
52672b813e Fix PR2574: implement v2f32 scalar_to_vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53927 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-22 18:39:19 +00:00
Bill Wendling
3180e20cda Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts 
into v4i16 vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53807 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-20 02:32:23 +00:00
Anton Korobeynikov
33500e5882 Testcase for PR2549 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53785 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-19 06:31:12 +00:00
Evan Cheng
76a4d58998 Subreg live interval valno may not have a corresponding def machineinstr since it's less precise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53734 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-17 19:48:53 +00:00
Evan Cheng
d1718252b5 Add nounwind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53733 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-17 19:48:04 +00:00
Evan Cheng
79a796c2b1 Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 
8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53503 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-12 01:56:02 +00:00
Duncan Sands
edfba7e707 Port a shift-by-1 optimization from LegalizeDAG: it 
was presumably added after the rest of the code was
copied to LegalizeTypes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-11 16:54:57 +00:00
Bill Wendling
71ca353ae6 The frame address on an x86-64 box needs to be offset by -8, not -4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53450 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-11 07:18:52 +00:00
Evan Cheng
331e2bd942 Fix for PR2472. Use movss to set lower 32-bits of a zero XMM vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53386 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-10 01:08:23 +00:00
Anton Korobeynikov
091be59220 Testcase for PR2024 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53327 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-09 14:09:41 +00:00
Evan Cheng
1ce75dcbbc Fix two serious LSR bugs. 
1. LSR runOnLoop is always returning false regardless if any transformation is made.
2. AddUsersIfInteresting can create new instructions that are added to DeadInsts. But there is a later early exit which prevents them from being freed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53193 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-07 19:51:32 +00:00
Dale Johannesen
ecdc82a643 Considering predecessors of exit blocks gets 
us a little more tail merging.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52986 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-01 21:50:49 +00:00
Chris Lattner
bd2acd736d test doesn't need eh info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52811 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-27 03:14:20 +00:00
Dale Johannesen
4e97790682 Allow for rounding up of stack frame. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52751 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-26 01:55:32 +00:00
Chris Lattner
cda8875433 when we know the signbit of an input to uint_to_fp is zero, 
change it to sint_to_fp on targets where that is cheaper (and
visaversa of course).  This allows us to compile uint_to_fp to:

_test:
	movl	4(%esp), %eax
	shrl	$23, %eax
	cvtsi2ss	%eax, %xmm0
	movl	8(%esp), %eax
	movss	%xmm0, (%eax)
	ret

instead of:

	.align	3
LCPI1_0:					##  double
	.long	0	## double least significant word 4.5036e+15
	.long	1127219200	## double most significant word 4.5036e+15
	.text
	.align	4,0x90
	.globl	_test
_test:
	subl	$12, %esp
	movl	16(%esp), %eax
	shrl	$23, %eax
	movl	%eax, (%esp)
	movl	$1127219200, 4(%esp)
	movsd	(%esp), %xmm0
	subsd	LCPI1_0, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movl	20(%esp), %eax
	movss	%xmm0, (%eax)
	addl	$12, %esp
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-26 00:16:49 +00:00
Evan Cheng
ab26227c8c - Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a 
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
  awful codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-25 20:52:59 +00:00
Mon P Wang
2887310630 Added MemOperands to Atomic operations since Atomics touches memory. 
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-25 08:15:39 +00:00
Evan Cheng
601ca4b434 Enable two-address remat by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52701 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-25 01:16:38 +00:00
Dale Johannesen
4a103e6d7e v2f32 is now a valid (MMX) type which breaks this 
test (doesn't work for any MMX vector types, it's
not me).  Rewritten to use v2i16 which is generic
and going to stay that way; I think that preserves
the point of the test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52692 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-24 22:03:36 +00:00