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10096 Commits

Author SHA1 Message Date
Stuart Hastings
0f1b813567 Support for nested functions/classes in debug output. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 22:36:03 +00:00
Devang Patel
93031ac032 Copy location info for current function argument from dbg.declare if respective store instruction does not have any location info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105490 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 22:27:30 +00:00
Dale Johannesen
73c943fb43 More tail call removal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 21:14:24 +00:00
Dan Gohman
c87b40b1cd Fix normalization and de-normalization of non-affine SCEVs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 19:16:34 +00:00
Mon P Wang
f62546ab04 Fixed a bug during widening where we would avoid legalizing a node. When we 
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes.  Since OpA has been processed, the new uses are
not examined again.  The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:20:10 +00:00
Dale Johannesen
4314426fc0 Remove more tail calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105450 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:01:24 +00:00
Dale Johannesen
522a181d69 Remove a tail call, and move some CHECKs to the 
functions where they belong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105449 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:01:04 +00:00
Dan Gohman
20af92e5b7 This test doesn't need the ssp attribute. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 00:14:48 +00:00
Dale Johannesen
da8dd92c9f Remove tail call. A tail call version will follow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 00:03:37 +00:00
Dale Johannesen
127e5244a0 Remove tail call to preserve this test. A tail 
call version will follow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 21:57:48 +00:00
Dale Johannesen
9452ce30bc Make this test not use tail calls. A tail call 
version will follow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 21:53:01 +00:00
Dan Gohman
400f75cb5e Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It 
needs to demand the high bits because it's asserting that they're zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 20:21:33 +00:00
Bob Wilson
3844173f6e Revert 105308. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 18:28:31 +00:00
Bill Wendling
869d60d39d Machine sink could potentially sink instructions into a block where the physical 
registers it defines then interfere with an existing preg live range.

For instance, if we had something like these machine instructions:

BB#0
  ... = imul ... EFLAGS<imp-def,dead>
  test ..., EFLAGS<imp-def>
  jcc BB#2 EFLAGS<imp-use>

BB#1
  ... ; fallthrough to BB#2

BB#2
  ... ; No code that defines EFLAGS
  jcc ... EFLAGS<imp-use>

Machine sink will come along, see that imul implicitly defines EFLAGS, but
because it's "dead", it assumes that it can move imul into BB#2. But when it
does, imul's "dead" imp-def of EFLAGS is raised from the dead (a zombie) and
messes up the condition code for the jump (and pretty much anything else which
relies upon it being correct).

The solution is to know which pregs are live going into a basic block. However,
that information isn't calculated at this point. Nor does the LiveVariables pass
take into account non-allocatable physical registers. In lieu of this, we do a
*very* conservative pass through the basic block to determine if a preg is live
coming out of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105387 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 07:54:20 +00:00
Eric Christopher
7310064f4d One underscore, not two. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 04:02:59 +00:00
Eli Friedman
268637ed0f Implement expansion in type legalization for add/sub with overflow. The 
expansion is the same as that used by LegalizeDAG.

The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 03:49:50 +00:00
Evan Cheng
9d709a8edb Enable machine cse of instructions which define physical registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 01:08:27 +00:00
Devang Patel
735419dfe7 DwarfWrite is now smart enough to drop debug value pointing to undefined register. Update this test to avoid this. 
iSel not properly lowring argument into a well formed DBG_VALUE in some cases is a separate issue and not related to the test in this testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105295 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 23:01:43 +00:00
Devang Patel
9126c0d42a Keep track of incoming debug value of unused argument. 
Radar 7927666.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 19:59:01 +00:00
Dan Gohman
956b349034 Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105283 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 18:35:14 +00:00
Kalle Raiskila
11fe24624a Fix handling of 'load' nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105269 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 13:34:47 +00:00
Bill Wendling
21330544df Debreak test for non-Darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105257 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 21:47:24 +00:00
Duncan Sands
2914ba6ec7 Fix PR7272: when inlining through a callsite with byval arguments, 
the newly created allocas may be used by inlined calls, so these
need to have their tail call flags cleared.  Fixes PR7272.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105255 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 21:00:26 +00:00
Eric Christopher
89e735673a Add a test for the llvm-gcc commit in r90200. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105253 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 20:39:10 +00:00
Chris Lattner
6c41ad8c9a fix PR6623: when optimizing for size, don't inline memcpy/memsets 
that are too large.  This causes the freebsd bootloader to be too
large apparently.

It's unclear if this should be an -Os or -Oz thing.  Thoughts welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 17:30:14 +00:00
Chris Lattner
0ece9a12ac upgrade and filecheckize this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 17:27:17 +00:00
Nick Lewycky
a9d6680cb1 The memcpy intrinsic only takes i8* for %src and %dst, so cast them to that 
first. Fixes PR7265.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105206 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 06:16:35 +00:00
Evan Cheng
701d4d309f Remove schedule-livein-copies. It's not being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 02:23:39 +00:00
Evan Cheng
9c044674e6 Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 01:35:22 +00:00
Evan Cheng
046fa3f90a Fix some latency computation bugs: if the use is not a machine opcode do not just return zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:26:21 +00:00
Dan Gohman
aec2a0dbce Add lint checks for function attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:43:57 +00:00
Kevin Enderby
31cc9655b6 MC/X86: Add alias for movzx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab MC/X86: Add alias for fwait. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3 Fix the use of x86 control and debug registers so that the assertion failure in 
getX86RegNum() does not happen.  Patch by Shantonu Sen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 19:01:27 +00:00
Dale Johannesen
7722b082c4 Add missing space; works for me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 18:45:59 +00:00
Dan Gohman
13ec30b6a1 Fix lint's memcpy and memmove checks, and its basic block traversal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104970 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 17:44:00 +00:00
Jakob Stoklund Olesen
90a2322023 Fix more tests that depended on the default register allocator choice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104961 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 17:06:30 +00:00
Dan Gohman
17d95965cb Detect self-referential values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104957 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:45:33 +00:00
Dan Gohman
34220aedc4 Remove this va_arg test, which is no longer applicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104956 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:44:04 +00:00
Stuart Hastings
8ffc42f8ea Revert 104841, 104842, 104876 due to buildbot failures. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104953 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:41:07 +00:00
Dan Gohman
078f8595b5 Eli pointed out that va_arg instruction result values don't 
reference the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104951 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:34:49 +00:00
Dan Gohman
ff26d4e9ce Teach lint how to look through simple store+load pairs and other 
effective no-op constructs, to make it more effective on
unoptimized IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:21:24 +00:00
Dan Gohman
05d6253727 Teach instcombine to promote alloca array sizes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 15:09:00 +00:00
Dan Gohman
8496d50412 Add a testcase for getelementptr index promotion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104944 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 15:07:59 +00:00
Dan Gohman
292fc87fe2 Add a lint check for returning the address of stack memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 04:33:42 +00:00
Dan Gohman
f75a7d3fbf Eliminate the restriction that the array size in an alloca must be i32. 
This will help reduce the amount of casting required on 64-bit targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104911 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:14:11 +00:00
Jakob Stoklund Olesen
700bfada63 Add a -regalloc=default option that chooses a register allocator based on the -O 
optimization level.

This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104904 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:57:25 +00:00
Evan Cheng
84f60b7359 llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104891 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 22:08:38 +00:00
Kevin Enderby
bd658918df MC/X86: Add aliases for Jcc variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 21:33:19 +00:00
Devang Patel
d8720f4ba3 Do not drop location info for inlined function args. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104884 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:25:04 +00:00
Stuart Hastings
57041b6f33 Adjust test case for lexical block pruning. Follow-on to r104842 and Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 19:57:51 +00:00
Devang Patel
57bd643113 Let's try one more time to match patterns. 
The goal is to match following 3 lines. In otherwords, a temp. label between to DEBUG_VALUE comments.
        ;DEBUG_VALUE: bar:x <- undef   ## 2010-01-18-Inlined-Debug.c:7
Ltmp1:
        ;DEBUG_VALUE: foo:__x <- undef ## 2010-01-18-Inlined-Debug.c:5



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104872 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 19:46:38 +00:00
Duncan Sands
1d9b973fd7 Teach instCombine to remove malloc+free if malloc's only uses are comparisons 
to null.  Patch by Matti Niemenmaa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104871 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 19:09:06 +00:00
Devang Patel
895f2dfd45 Temp. labels number may not match for all configurations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104858 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 17:51:08 +00:00
Devang Patel
55e9717e59 inlined function's arguments need a label to mark the start point because they are not directly attached to current function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 16:47:30 +00:00
Stuart Hastings
aa66d2f48a Support for nested functions/classes in debug output. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104841 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 16:16:54 +00:00
Gabor Greif
2893a460d8 rename test to represent meaningful date 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 09:32:38 +00:00
Bob Wilson
cdef41a6b4 Add a test for llvm-gcc svn r104726. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104805 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 05:30:36 +00:00
Eric Christopher
bd3ba537cd Add a quick test of relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104794 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 00:53:40 +00:00
Devang Patel
80250686d5 Simplify. Eliminate unneeded debug_loc entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 23:55:23 +00:00
Dan Gohman
882ddb492d Reinstate checking of stackrestore, with checking for both Read 
and Write, and add a comment explaining this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104756 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:21:25 +00:00
Dan Gohman
113b3e2c6e Implement checking of the tail keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:46:36 +00:00
Devang Patel
394427b014 Update debug info when live-in reg is copied into a vreg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:18:50 +00:00
Kevin Enderby
b106543592 Fix the x86 move to/from segment register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:10:45 +00:00
Dale Johannesen
b09e793bf9 Testcase for 104624/104619/PR7191/8023512. 
Reduced from one provided by Duncan Sands, thanks!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:55:45 +00:00
Devang Patel
c3f5f783a2 First cut at supporting .debug_loc section. 
This is used to track variable information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 23:40:22 +00:00
Benjamin Kramer
48aefe15d0 Properly promote operands when optimizing a single-character memcmp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 22:53:43 +00:00
Eric Christopher
02b46bc942 Add support for initialized global data for darwin tls. Update comments 
and testcases accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:28:50 +00:00
Kevin Enderby
cf50a5390c Changed the encoding of X86 floating point stack operations where both operands 
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 20:52:34 +00:00
Dale Johannesen
854f30d965 Removing test; Chris thinks it's better to have the 
bug go untested than have a testcase this large.  So be it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104632 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 20:40:10 +00:00
Daniel Dunbar
39e2dd7bab MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:32 +00:00
Dale Johannesen
86234c30a7 Fix another variant of PR 7191. Also add a testcase 
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:47:23 +00:00
Daniel Dunbar
79373680ed MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required 
for the 64-bit version of the Bit Test instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:16:58 +00:00
Eric Christopher
7e2f5aaa67 Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:33:22 +00:00
Dan Gohman
e350690e3b Fix an mmx movd encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 20:51:08 +00:00
Kevin Enderby
ca956dc0f6 MC/X86: Add aliases for CMOVcc variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 20:32:23 +00:00
Bob Wilson
bb7ecb2bf5 Thumb2 RSBS instructions were being printed without the 'S' suffix. 
Fix it by changing the T2I_rbin_s_is multiclass to handle the CPSR
output and 'S' suffix in the same way as T2I_bin_s_irs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 18:44:06 +00:00
Evan Cheng
c7cf10c97e LR is in GPR, not tGPR even in Thumb1 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 18:00:18 +00:00
Daniel Dunbar
62e4c671b6 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example: 
addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 21:02:33 +00:00
Daniel Dunbar
4c361972fd MC/X86: Add alias for setz, setnz, jz, jnz. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 06:37:33 +00:00
Evan Cheng
2457f2c661 Implement @llvm.returnaddress. rdar://8015977. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 01:47:14 +00:00
Eric Christopher
1e6d3ac709 This test is darwin only. Make it so(tm). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104418 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 00:55:55 +00:00
Bob Wilson
be751cfe9c Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by 
copying VFP subregs.  This exposed a bunch of dead code in the *spill-q.ll
tests, so I tweaked those tests to keep that code from being optimized away.
Radar 7872877.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 00:23:12 +00:00
Eric Christopher
8116ca5134 Add full bss data support for darwin tls variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104414 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 00:10:22 +00:00
Kevin Enderby
9d31d79493 Added retl for 32-bit x86 and added retq for 64-bit x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 23:01:38 +00:00
Bob Wilson
78f006acdf Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements 
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 21:05:32 +00:00
Chris Lattner
a26a8471bd now that fp reg kill insertion stuff happens as a separate 
pass after isel instead of being interlaced with it, we can
trust that all the code for a function has been isel'd before
it is run.

The practical impact of this is that we can scan for machine
instr phis instead of doing a fuzzy match on the LLVM BB for
phi nodes.  Doing the fuzzy match required knowing when isel
would produce an fp reg stack phi which was gross.  It was
also wrong in cases where select got lowered to a branch
tree because cmovs aren't available (PR6828).

Just do the scan on machine phis which is simpler, faster
and more correct.  This fixes PR6828.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104333 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 18:17:54 +00:00
Jakob Stoklund Olesen
2afb7505c5 Teach VirtRegRewriter to handle spilling in instructions that have multiple 
definitions of the virtual register.

This happens when spilling the registers produced by REG_SEQUENCE:

%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0

The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104321 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 16:36:13 +00:00
Dale Johannesen
7d07b48b26 Fix i64->f64 conversion, x86-64, -no-sse. A bit 
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 00:52:33 +00:00
Evan Cheng
f7d87ee158 Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-21 00:43:17 +00:00
Daniel Dunbar
4e7f8390c0 MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 20:36:29 +00:00
Dan Gohman
f182b23f8f When canonicalizing icmp operand order to put the loop invariant 
operand on the left, the interesting operand is on the right. This
fixes a bug where LSR was failing to recognize ICmpZero uses,
which led it to be unable to reverse the induction variable in the
attached testcase.

Delete test/CodeGen/X86/stack-color-with-reg-2.ll, because its test
is extremely fragile and hard to meaningfully update.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104262 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 19:26:52 +00:00
Bob Wilson
63b8845e78 Handle Neon v2f64 and v2i64 vector shuffles as register copies. 
This fixes the remaining issue with pr7167.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104257 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 18:39:53 +00:00
Dan Gohman
e5e4ff974d Fix assembly parsing and encoding of the pushf and popf family of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 16:16:00 +00:00
Dan Gohman
14aaeac5cf Define the x86 pause instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 01:35:50 +00:00
Dan Gohman
ee5673b622 Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it 
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 01:23:41 +00:00
Bill Wendling
ff9244a1f1 Match "4" or "8" depending upon if it's 32- or 64-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 00:27:10 +00:00
Eric Christopher
8db52ef4b0 Once more, with feeling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 00:07:13 +00:00
Dan Gohman
a2086b3483 Teach LSR how to cope better with unrolled loops on targets where 
the addressing modes don't make this trivially easy. This allows
it to avoid falling into the less precise heuristics in more
cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:43:12 +00:00
Chris Lattner
a7f1354eb5 fix rdar://7986634 - match instruction opcodes case insensitively. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104183 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:34:33 +00:00
Bill Wendling
a008750aa9 Testcase for r104181. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:33:26 +00:00
Eric Christopher
591466baff A more combo tls testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104163 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 21:19:42 +00:00
Eric Christopher
aa6c72ec95 Few more simple tls testcases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104148 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 20:35:15 +00:00
Jakob Stoklund Olesen
3437352887 TwoAddressInstructionPass doesn't really know how to merge live intervals when 
lowering REG_SEQUENCE instructions.

Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104146 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 20:08:00 +00:00
Eric Christopher
d38bbfadfd Attempt to run this test on x86 only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104143 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 18:59:37 +00:00
Bob Wilson
29e7e32e08 Testcase to go with 104141. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104142 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 18:58:37 +00:00
Evan Cheng
9085f98b32 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104115 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 07:28:01 +00:00
Evan Cheng
0a942dbb1e Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 01:08:17 +00:00
Eric Christopher
cc6b6b9348 Add a test to make sure that we're lowering the shift amount correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104090 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 00:22:04 +00:00
Jakob Stoklund Olesen
dcf7708ad9 Remember to update VirtRegLastUse when spilling without killing before a call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104074 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 22:20:09 +00:00
Dan Gohman
e5efbafdac When converting a test to a cmp to fold a load, use the cmp that has an 
8-bit immediate field rather than one with a wider immediate field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 21:42:03 +00:00
Eric Christopher
b4e876e37e Quick test to make sure we're emitting the tbss section correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 21:40:20 +00:00
Evan Cheng
28dad2a5ca Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 21:31:17 +00:00
Dale Johannesen
0182fa2e38 Test passed on ppc, to my surprise; if it worked 
there it may work everywhere...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104053 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 20:47:04 +00:00
Evan Cheng
27e4840e03 Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 20:03:28 +00:00
Dale Johannesen
f336bea195 Testcase for llvm-gcc checkin 104042. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 19:03:51 +00:00
Kevin Enderby
d8ba292c9b Fixed the problem with a branch to "0b" that was not parsed by llvm-mc 
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104038 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 17:51:35 +00:00
Daniel Dunbar
2ae4bfd769 MC/Mach-O: Implement support for setting indirect symbol table offset in section header. 
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104033 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 17:28:24 +00:00
Daniel Dunbar
3f40b31256 MC/X86: Implement custom lowering to make sure we match things like 
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104030 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 17:22:24 +00:00
Evan Cheng
a083988c8a FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 00:03:40 +00:00
Evan Cheng
c6dcce3ba5 Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 23:24:12 +00:00
Kevin Enderby
ebe7fcd041 Added support in MC for Directional Local Labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103989 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 23:08:19 +00:00
Eric Christopher
c6177a4531 More data/parsing support for tls directives. Add a few more testcases 
and cleanup comments as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 22:53:55 +00:00
Evan Cheng
44bfdd3d78 Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 22:09:49 +00:00
Daniel Dunbar
648ac5153e MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 21:54:30 +00:00
Daniel Dunbar
db9014dd8b MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions. 
- This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103979 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 21:19:59 +00:00
Evan Cheng
53c779bb3a Careful with reg_sequence coalescing to not to overwrite sub-register indices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103971 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 20:57:12 +00:00
Daniel Dunbar
b18d2dd115 MC/Mach-O: Fix some differences in symbol flag handling. 
- Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 20:12:31 +00:00
Evan Cheng
6206124250 Turn on -neon-reg-sequence by default. 
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103960 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 19:51:20 +00:00
Daniel Dunbar
525a3a67c1 llvm-mc: Support reassignment of variables in one special case, when the 
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 17:46:23 +00:00
Jakob Stoklund Olesen
aa4b0159da Avoid allocating the same physreg to multiple virtregs in one instruction. 
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen
0c9e4f5f3f Only use clairvoyance when defining a register, and then only if it has one use. 
This makes allocation independent on the ordering of use-def chains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 04:50:57 +00:00
Eric Christopher
d04d98d24f Assume that we'll handle mangling the symbols earlier and just put the 
symbol to the file as we have it.  Simplifies out tbss handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103928 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 02:13:02 +00:00
Dale Johannesen
88dc976102 Removing as part of previous reversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103915 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-16 20:19:40 +00:00
Dale Johannesen
f7f5a2760a Revert 103911; it broke a test that expects bitconvert 
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine).  The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103914 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-16 20:19:04 +00:00
Dale Johannesen
f9b2242927 Make x86-64 64-bit bitconvert work when SSE is not available. 
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103911 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-16 18:22:38 +00:00
Anton Korobeynikov
ded05e34b6 Add support for thiscall calling convention. 
Patch by Charles Davis and Steven Watanabe!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103902 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-16 09:08:45 +00:00
Anton Korobeynikov
a9790d739a Some cheap DAG combine goodness for multiplication with a particular constant. 
This can be extended later on to handle more "complex" constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103881 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-15 18:16:59 +00:00
Evan Cheng
06b666c705 Allow TargetLowering::getRegClassFor() to be called on illegal types. Also 
allow target to override it in order to map register classes to illegal
but synthesizable types. e.g. v4i64, v8i64 for ARM / NEON.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103854 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-15 02:18:07 +00:00
Bill Wendling
23ead99283 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103829 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 22:17:42 +00:00
Devang Patel
552b888744 Test case for r103800. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103801 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 21:04:45 +00:00
Kevin Enderby
c3ce05c594 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an 
argument, like "int $4", to not get an Assertion error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103791 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 19:16:02 +00:00
Daniel Dunbar
f0f6cdb6b4 MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be 
used to replace a normal relocation, not a reference to a GOT entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103789 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 18:53:40 +00:00
Jakob Stoklund Olesen
4ed1082683 Simplify the handling of physreg defs and uses in RegAllocFast. 
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103784 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 18:03:25 +00:00
Daniel Dunbar
bd616b69f7 XFAIL the test I added with vg_leak, apparently it is the first and only llc 
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 07:47:51 +00:00
Daniel Dunbar
d11d59e35a Inline Asm: Ensure buffer is newline terminated to match how the text is printed. 
- This is a hack, but I can't decide the best place to handle this. Chris?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103765 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 04:31:50 +00:00
Eric Christopher
482eba054a Add AsmParser support for darwin tbss directive. 
Nothing uses this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103757 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 01:50:28 +00:00
Nick Lewycky
eb7d818969 Actually run the test. Thanks Daniel Dunbar! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 17:41:06 +00:00
Nick Lewycky
12b927bad0 Add testcase for r103653. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103699 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 06:00:14 +00:00