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2937 Commits

Author SHA1 Message Date
Jim Laskey
288af5e740 Fix chain dropping in load and drop unused stores in ret blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30600 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 19:32:58 +00:00
Jim Laskey
279f053eae Core antialiasing for load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 16:29:54 +00:00
Andrew Lenharth
beec30eaf3 Add support for other relocation bases to jump tables, as well as custom asm directives 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 19:45:58 +00:00
Evan Cheng
2ae5b87996 PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30590 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 05:22:38 +00:00
Evan Cheng
2adffa1f66 Make it work for DAG combine of multi-value nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 19:04:05 +00:00
Jim Laskey
516b0eacff core corrections 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30570 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 17:35:47 +00:00
Jim Laskey
d1aed7aaf7 Basic "in frame" alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30568 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 16:28:59 +00:00
Chris Lattner
0e4b922680 fold (aext (and (trunc x), cst)) -> (and x, cst). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:40:43 +00:00
Chris Lattner
bf3708794f Check the right value type. This fixes 186.crafty on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30560 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:17:39 +00:00
Chris Lattner
111c228241 Compile: 
int %test(ulong *%tmp) {
        %tmp = load ulong* %tmp         ; <ulong> [#uses=1]
        %tmp.mask = shr ulong %tmp, ubyte 50            ; <ulong> [#uses=1]
        %tmp.mask = cast ulong %tmp.mask to ubyte
        %tmp2 = and ubyte %tmp.mask, 3          ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp2 to int         ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        andl $3, %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        # TRUNCATE movb %al, %al
        andb $3, %al
        movzbl %al, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30558 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:14:31 +00:00
Chris Lattner
6007b84a5b Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when 
the src/dst are not the same size.  This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30557 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:00:20 +00:00
Chris Lattner
e3152e54b5 Compile: 
int test3(int a, int b) { return (a < 0) ? a : 0; }

to:

_test3:
        srawi r2, r3, 31
        and r3, r2, r3
        blr

instead of:

_test3:
        cmpwi cr0, r3, 1
        li r2, 0
        blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
        mr r3, r2
LBB2_2: ;entry
        blr


This implements: PowerPC/select_lt0.ll:seli32_a_a


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:41:35 +00:00
Chris Lattner
84750587bf Fold the full generality of (any_extend (truncate x)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:29:17 +00:00
Chris Lattner
5f42a240ba Two things: 
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
   ignoring the result.  This allows us to compile:

bool %test(ulong %x) {
  %tmp = setlt ulong %x, 4294967296
  ret bool %tmp
}

to:

_test:
        cntlzw r2, r3
        cmplwi cr0, r3, 1
        srwi r2, r2, 5
        li r3, 0
        beq cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

instead of:

_test:
        addi r2, r3, -1
        cntlzw r2, r2
        cntlzw r3, r3
        srwi r2, r2, 5
        cmplwi cr0, r2, 0
        srwi r2, r3, 5
        li r3, 0
        bne cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

This isn't wonderful, but it's an improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30513 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:19:26 +00:00
Chris Lattner
0ea26ca45b Expand 64-bit shifts more optimally if we know that the high bit of the 
shift amount is one or zero.  For example, for:

long long foo1(long long X, int C) {
  return X << (C|32);
}

long long foo2(long long X, int C) {
  return X << (C&~32);
}

we get:

_foo1:
        movb $31, %cl
        movl 4(%esp), %edx
        andb 12(%esp), %cl
        shll %cl, %edx
        xorl %eax, %eax
        ret
_foo2:
        movb $223, %cl
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        andb 12(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        ret

instead of:

_foo1:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $32, %bl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        movb %bl, %cl
        orb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret
_foo2:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $223, %cl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        andb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        xorb %bl, %bl
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30506 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 03:38:48 +00:00
Chris Lattner
2b41b8e870 Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not 
allow it to go into an infinite loop, filling up the disk!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-19 18:02:01 +00:00
Chris Lattner
863ac769b8 Fold extract_element(cst) to cst 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30478 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-19 05:02:39 +00:00
Chris Lattner
5c6621c3bc Minor speedup for legalize by avoiding some malloc traffic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30477 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-19 04:51:23 +00:00
Evan Cheng
6b5578f052 Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 23:28:33 +00:00
Evan Cheng
52cc1ea2a1 Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 21:49:04 +00:00
Andrew Lenharth
303c6222a4 oops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30462 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 18:00:18 +00:00
Andrew Lenharth
3fbd67898e absolute addresses must match pointer size 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30461 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 17:59:35 +00:00
Jim Laskey
e85fb6719a Sort out mangled names for globals 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30460 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 14:47:26 +00:00
Chris Lattner
8829dc88a8 Oh yeah, this is needed too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30407 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 05:08:34 +00:00
Chris Lattner
a89654b1a1 simplify control flow, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30403 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 00:21:44 +00:00
Chris Lattner
7d7bffe157 Allow custom expand of mul 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30402 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 00:09:24 +00:00
Chris Lattner
428b92eb83 Keep track of the start of MBB's in a separate map from instructions. This 
is faster and is needed for future improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-15 03:57:23 +00:00
Chris Lattner
1ec72738ac Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible. 
This implements CodeGen/X86/and-or-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30379 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 21:11:37 +00:00
Chris Lattner
516b962b5a Split rotate matching code out to its own function. Make it stronger, by 
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 20:50:57 +00:00
Evan Cheng
a17cf0a7e2 Use getOffset() instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30327 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 07:41:12 +00:00
Evan Cheng
d5a99d7810 Use MachineConstantPoolEntry getOffset() and getType() accessors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 07:35:00 +00:00
Evan Cheng
9abd7c3867 A MachineConstantPool may have mixed Constant* and MachineConstantPoolValue* values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30316 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 05:50:57 +00:00
Chris Lattner
c970f062e0 If LSR went through a lot of trouble to put constants (e.g. the addr of a global 
in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 06:02:42 +00:00
Chris Lattner
79980b07da Compile X << 1 (where X is a long-long) to: 
addl %ecx, %ecx
        adcl %eax, %eax

instead of:

        movl %ecx, %edx
        addl %edx, %edx
        shrl $31, %ecx
        addl %eax, %eax
        orl %ecx, %eax

and to:

        addc r5, r5, r5
        adde r4, r4, r4

instead of:

        slwi r2,r9,1
        srwi r0,r11,31
        slwi r3,r11,1
        or r2,r0,r2

on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:50:39 +00:00
Evan Cheng
d6594ae54c Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:00:35 +00:00
Nate Begeman
019f851ab2 Behold, more work on relocations. Things are looking pretty good now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 23:03:44 +00:00
Chris Lattner
c66764c007 This code was trying too hard. By eliminating redundant edges in the CFG 
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 06:36:57 +00:00
Chris Lattner
6ddf8ed6fe Implement the fpowi now by lowering to a libcall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:03:30 +00:00
Chris Lattner
f3f333dbd6 Allow targets to custom lower expanded BIT_CONVERT's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 00:20:27 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 22:42:09 +00:00
Chris Lattner
0c5b8dac79 Non-allocatable physregs can be killed and dead, but don't treat them as 
safe for later allocation.  This fixes McCat/18-imp with llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30204 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 20:21:31 +00:00
Chris Lattner
cc406328bf This fixes Benchmarks/Prolangs-C/unix-smail 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30198 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:11:11 +00:00
Chris Lattner
45d5788123 Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection 
of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:03:30 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:06:40 +00:00
Evan Cheng
61c958e691 Fix pasto that was breaking x86 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 18:50:20 +00:00
Chris Lattner
d5e93c0795 Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted 
too many phi operands when lowering a switch to branches in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:59:34 +00:00
Jim Laskey
563321a258 Separate target specific asm properties from the asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:34:40 +00:00
Evan Cheng
5d8062bcee Only call isUse/isDef on register operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30122 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:32:06 +00:00
Chris Lattner
d8f44e07b8 Only call isUse/isDef on register operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:19:27 +00:00
Chris Lattner
67942f5dc3 Don't call isDef on non-registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:02:51 +00:00
Chris Lattner
7acf5f39fe Change the default to 0, which means 'default'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 17:39:15 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Chris Lattner
dffb2e83ed Correct fix for a crasher on functions with live in values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:27:40 +00:00
Chris Lattner
5277e4304e Hack around a regression I introduced yesterday 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:20:15 +00:00
Duraid Madina
0c9e0ff249 forgot this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 07:44:11 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 06:21:35 +00:00
Chris Lattner
47877050e7 new file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30082 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:16:09 +00:00
Chris Lattner
6b128bdc58 Avoid beating on the mi2i map when we know the answer already. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30066 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 08:07:11 +00:00
Chris Lattner
fbecc5a593 minor speedup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 07:53:50 +00:00
Chris Lattner
5e50349070 Fix Regression/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll on X86. 
Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30064 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 07:15:37 +00:00
Chris Lattner
2ac0d43fa2 When deleting a machine instruction, make sure to remove it from the 
livevariables information.  This fixes several regalloc=local failures on x86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30062 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 00:06:08 +00:00
Chris Lattner
7a3abdc63c Move two methods out of line, make them work when the record for a machine 
instruction includes physregs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30061 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 00:05:09 +00:00
Chris Lattner
94425996c5 improve compat with certain versions of GCC (on cygwin?) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30054 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 17:37:30 +00:00
Chris Lattner
1acb17cb83 Iteration is required for some cases, even if they don't occur in crafty. 
Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30050 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 05:32:53 +00:00
Chris Lattner
f21f0205b5 When joining two intervals where the RHS is really simple, use a light-weight 
method for joining the live ranges instead of the fully-general one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30049 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 05:26:59 +00:00
Evan Cheng
3f4fd0fd64 Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is 
possible and the target only supports MULHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 18:17:58 +00:00
Jim Laskey
3ebe71db6b Corrections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30021 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 12:55:05 +00:00
Chris Lattner
8a67f6e848 Pull some code out of a hot recursive function because the common case doesn't 
need recursion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30015 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 07:00:23 +00:00
Chris Lattner
238416c99b Reserve space in the ValueNumberInfo vector. This speeds up live interval 
analysis 16% on crafty.

Wrap long lines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 06:10:18 +00:00
Chris Lattner
a2a8f0919d Iterative coallescing doesn't buy us anything (we get identical results on 
crafty with and without it).  Removing it speeds up live intervals 6%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30010 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 04:02:42 +00:00
Evan Cheng
dfcfacb0cb DAG combiner fix for rotates. Previously the outer-most condition checks 
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 07:41:12 +00:00
Chris Lattner
2ebfa0c618 Add a special case that speeds up coallescing a bit, but not enough. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29996 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 06:48:26 +00:00
Chris Lattner
bfe180af9e Delete copies as they are coallesced instead of waiting until the end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29995 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 05:58:59 +00:00
Chris Lattner
91725b7585 avoid calling the virtual isMoveInstr method endlessly by caching its results. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 05:54:43 +00:00
Chris Lattner
ba256037ce Fix a compiler crash bootstrapping llvm-gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-30 23:02:29 +00:00
Chris Lattner
6d8fbef015 Teach the coallescer to coallesce live intervals joined by an arbitrary 
number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced.  Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29968 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 23:18:15 +00:00
Jim Laskey
ce50a165c7 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 16:24:26 +00:00
Evan Cheng
1efba0ecb4 Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:42:35 +00:00
Chris Lattner
7f8897f22e eliminate RegisterOpt. It does the same thing as RegisterPass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29925 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 22:42:52 +00:00
Chris Lattner
5d8925c7c5 Eliminate RegisterAnalysis. RegisterPass now does all that is necessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29921 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 22:30:17 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Chris Lattner
c9d94d1290 typo fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:47:48 +00:00
Evan Cheng
694481ee01 Eliminate SelectNodeTo() and getTargetNode() variants which take more than 
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29905 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 08:08:54 +00:00
Nate Begeman
d2030e6c99 Properly size the string table, and emit symbol table and string table 
entries in the correct order, fixing several fixmes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29902 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 15:46:34 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 08:00:10 +00:00
Chris Lattner
e7f729b42b Simplifications to liveinterval analysis, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:28:16 +00:00
Chris Lattner
c114b2cad7 Completely change the way that joining with physregs is implemented. This 
paves the way for future changes, increases coallescing opportunities (in
theory, not witnessed in practice), and eliminates the really expensive
LiveIntervals::overlapsAliases method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 23:41:24 +00:00
Jim Laskey
08ede262a7 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 22:56:30 +00:00
Jim Laskey
f3e4f0e615 Consolidate callee saved register information so that it can me used by debug 
information and exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29881 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 19:45:51 +00:00
Jim Laskey
3d3d404b8a Allow for register numbers > 31. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 19:39:52 +00:00
Nate Begeman
f8f2c5a172 Get closer to handling globals correctly. We now generally get them in the 
right section.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29871 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-25 06:36:58 +00:00
Chris Lattner
c82b3aab65 When replacing value numbers, make sure to compactify the value # space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29865 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 23:22:59 +00:00
Chris Lattner
f7da2c7b0c Take advantage of the recent improvements to the liveintervals set (tracking 
instructions which define each value#) to simplify and improve the coallescer.
In particular, this patch:

1. Implements iterative coallescing.
2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a
   better solution.
3. Implements PR865, "coallescing" away the second copy in code like:

   A = B
   ...
   B = A

This also includes changes to symbolically print registers in intervals
when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29862 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-24 22:43:55 +00:00
Nate Begeman
eb883af390 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it 
does emit linkable .o files in very simple cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-23 21:08:52 +00:00
Chris Lattner
be4f88a8b8 Improve the LiveInterval class to keep track of which machine instruction 
defines each value# tracked by the interval.  This will be used to improve
coallescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-22 18:19:46 +00:00
Chris Lattner
8222b2de22 Print physreg names symbolically in dumps 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29805 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 23:03:54 +00:00
Chris Lattner
7c10b0d2c9 Print debug info as: 
*** Register mapping ***
  reg 1024 -> %reg1028
  reg 1026 -> EAX
  reg 1027 -> %reg1028

instead of:

*** Register mapping ***
  reg 1024 -> reg 1028
  reg 1026 -> reg 15
  reg 1027 -> reg 1028


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29803 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 22:56:29 +00:00
Jim Laskey
760383e298 Adding C++ member support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29799 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 21:20:18 +00:00
Chris Lattner
f921a51891 Fix PR861 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 20:24:53 +00:00