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25 Commits

Author SHA1 Message Date
Evan Cheng
2f39426ec9 Mark load instructions with isLoad = 1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41595 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:49:43 +00:00
Evan Cheng
0db079e2e6 Mac OS X X86-64 low 4G address not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 23:46:10 +00:00
Dan Gohman
b1576f56c8 Change the x86 assembly output to use tab characters to separate the 
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40648 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-31 20:11:57 +00:00
Evan Cheng
c64a1a921c Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40628 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-31 08:04:03 +00:00
Christopher Lamb
2dc6dc619c Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40578 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-29 01:24:57 +00:00
Bill Wendling
6a20cf0776 Add missing SSE builtins: 
__builtin_ia32_cvtss2si64
    __builtin_ia32_cvttss2si64
    __builtin_ia32_cvtsi642ss
    __builtin_ia32_cvtsd2si64
    __builtin_ia32_cvttsd2si64
    __builtin_ia32_cvtsi642sd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-23 03:07:27 +00:00
Evan Cheng
ffbaccae02 No more noResults. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-21 00:34:19 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Dan Gohman
638c96d391 Define the pushq instruction for x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-18 14:12:56 +00:00
Chris Lattner
a066810681 add support for 128-bit integer add/sub 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:35:11 +00:00
Bill Wendling
bff35d11f1 Have MMX registers clobbered in x86-64 too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36494 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 21:06:48 +00:00
Evan Cheng
9156ec66e4 Some AT&T syntax assembler (e.g. Mac OS X) does not recognize the movq alias for i64 <-> XMM moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-15 19:58:58 +00:00
Evan Cheng
21b76123e5 f64 <-> i64 bit_convert using movq in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32587 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-14 21:55:39 +00:00
Evan Cheng
e36087c617 Fix a couple of typo's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32585 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-14 19:46:06 +00:00
Evan Cheng
28b51439f3 - Switch X86-64 JIT to large code size model. 
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 19:50:18 +00:00
Evan Cheng
19f2ffce45 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit 
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 04:01:03 +00:00
Evan Cheng
0085a28d13 - Use a different wrapper node for RIP-relative GV, etc. 
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32046 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-30 21:55:46 +00:00
Evan Cheng
7bb64e8369 Fix JIT encoding bugs for shift / rotate by one ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 01:28:00 +00:00
Evan Cheng
ebf01d63b0 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:33:25 +00:00
Chris Lattner
3751844b39 remove dead/redundant vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 23:48:56 +00:00
Evan Cheng
af9db75943 Add properties to ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30891 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 21:03:53 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Evan Cheng
36978b9c61 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30178 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:56:55 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00