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fd89e6ffda
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22823 Commits

Author SHA1 Message Date
Akira Hatanaka
fd89e6ffda MIPS DSP: add support for extract-word instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 02:05:42 +00:00
Akira Hatanaka
5e69cef21b MIPS DSP: add functions which decode DSP and accumulator registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164748 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 02:01:10 +00:00
Akira Hatanaka
cc46fe591a MIPS DSP: add code necessary for pseudo instruction lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164747 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 01:59:07 +00:00
Akira Hatanaka
7e105bcc3a MIPS DSP: add bitcast patterns between vectors and int. 
No test cases. These patterns will get tested along with dsp intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164746 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 01:56:38 +00:00
Akira Hatanaka
7509ec18d1 MIPS DSP: add vector load/store patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 01:50:59 +00:00
Bill Wendling
2c18906118 Remove the `hasFnAttr' method from Function. 
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 21:48:26 +00:00
Jim Grosbach
b7abea0840 X86_32: Large Symbol+Offset relocations. 
If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.

rdar://12358909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164724 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 21:27:45 +00:00
Akira Hatanaka
b500e9249a Add case clauses for returning dsp accumulator encoding values in function 
getMipsRegisterNumbering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164720 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 19:27:24 +00:00
Akira Hatanaka
81571d3e0f Add DSP accumulator registers and register class. Remove hi/lo registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164719 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 19:25:21 +00:00
Akira Hatanaka
c878f3899c Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164718 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 19:18:19 +00:00
James Molloy
d6d10ae151 Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164685 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 09:48:32 +00:00
Michael Liao
4fa2ddbb94 Add SARX/SHRX/SHLX code generation support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164675 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 08:26:25 +00:00
Michael Liao
6bcdb5b903 Add RORX code generation support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164674 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 08:24:51 +00:00
Michael Liao
0832a72a66 Add MULX code generation support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164673 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 08:22:37 +00:00
Craig Topper
d48bb9316d Remove hasNoAVX method. Can just invert hasAVX instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164664 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 06:29:37 +00:00
Michael Liao
4e9485d732 Add 'lock' prefix output support in assembly printer 
- Instead of embedding 'lock' into each mnemonic of atomic
  instructions except 'xchg', we teach X86 assembly printer to output 'lock'
  prefix similar to or consistent with code emitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164659 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-26 05:13:44 +00:00
Akira Hatanaka
3757ff1a68 Initialize boolean variables in MipsSubtarget's constructor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164642 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 23:07:11 +00:00
Reed Kotler
289b5d7f02 blank line for test commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164640 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 22:34:20 +00:00
Sebastian Pop
1a37d7e807 TargetLowering interface to set/get minimum block entries for jump tables. 
Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.

    getMinimumJumpTableEntries() defaults to 4.
    setMinimumJumpTableEntries() allows target configuration.

    This patch changes the default for the Hexagon architecture to 5
    as it improves performance on some benchmarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164628 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 20:35:36 +00:00
Michael Liao
e5e8f7656a Add missing i64 max/min/umax/umin on 32-bit target 
- Turn on atomic6432.ll and add specific test case as well



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164616 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 18:08:13 +00:00
Jim Grosbach
fe2d5f8487 ARM: Darwin BL/BLX relocations to out-of-range symbols. 
When a BL/BLX references a symbol in the same translation unit that is
out of range, use an external relocation. The linker will use this to
generate a branch island rather than a direct reference, allowing the
relocation to resolve correctly.

rdar://12359919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164615 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 18:07:17 +00:00
Bob Wilson
a3c3e1f8e2 Consistently specify the assembly variant to MatchInstructionImpl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164611 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 17:19:29 +00:00
Evan Cheng
b1cacc7423 Fix an illegal tailcall opt where the callee returns a double via xmm while caller returns x86_fp80 via st0. rdar://12229511 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164588 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 05:32:34 +00:00
Jim Grosbach
fbc21fabae ARM: 'add Rd, pc, #imm' is an alias for 'adr Rd, #imm'. 
rdar://9795790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164577 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-25 00:08:13 +00:00
Jim Grosbach
e9525d8624 Mark jump tables in code sections with DataRegion directives. 
Even out-of-line jump tables can be in the code section, so mark them
as data-regions for those targets which support the directives.

rdar://12362871&12362974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164571 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 23:06:27 +00:00
Chad Rosier
2590c2e1e9 Rather then have a wrapper function, have tblgen instantiate the implementation. 
Also remove an unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 22:57:55 +00:00
Roman Divacky
5236ab3fdd Specify MachinePointerInfo as refering to the argument value and offset of the 
store when handling byval arguments. Thus preventing reordering of the store
with load with post-RA scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164553 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 20:47:19 +00:00
Chad Rosier
00796a1b15 Rather then have a wrapper function, have tblgen instantiate the implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-24 19:32:29 +00:00
NAKAMURA Takumi
d15e2a0857 ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164459 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 13:12:28 +00:00
NAKAMURA Takumi
2d67eac2e6 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164458 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 13:12:22 +00:00
Tim Northover
bb5174246b Fix edge cases of ARM shift operands in arith instructions. 
As before with load instructions, oddities like "asr #32", "rrx" could
be printed incorrectly.

Patch by Chris Lidbury.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164456 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 11:18:19 +00:00
Tim Northover
93c7c449a1 Fix the handling of edge cases in ARM shifted operands. 
This patch fixes load/store instructions to handle less common cases
like "asr #32", "rrx" properly throughout the MC layer.

Patch by Chris Lidbury.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 11:18:12 +00:00
Michael Liao
23bd47c2d6 Fix 16-bit atomic inst encoding and keep pseudo-inst starting with '#' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164453 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 05:41:15 +00:00
Michael Liao
730b9dd2ce Fix typo in r164357 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164452 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 03:39:42 +00:00
Akira Hatanaka
ef5fc952e8 MIPS DSP: Add immediate leaves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164435 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 00:07:12 +00:00
Akira Hatanaka
67032b27cd MIPS DSP: Add predicates and instruction template. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164434 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 00:06:06 +00:00
Akira Hatanaka
b430cecc0e Add MIPS DSP register classes. Set actions of DSP vector operations and override 
TargetLowering's callback functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:58:31 +00:00
Akira Hatanaka
6fad5e742d SelectionDAG node enums for MIPS DSP nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:52:47 +00:00
Akira Hatanaka
1024f290d1 Add MIPS accumulator and DSP control registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164429 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:48:37 +00:00
Akira Hatanaka
a9adbf6df7 Add flags and feature bits for mips dsp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164428 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:41:49 +00:00
Chad Rosier
d717a066c6 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 22:21:26 +00:00
Chad Rosier
7d4e989da9 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164415 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 21:08:46 +00:00
Chad Rosier
4a6203a31b Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164414 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 20:51:43 +00:00
Chad Rosier
e5e674ba11 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for 
non-aligned i32 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 16:58:35 +00:00
Michael Liao
ba4388656c Fix a typo in r164357 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164372 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 16:03:03 +00:00
Bill Wendling
ef99fe8efa Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class. Now with fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164370 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 15:26:31 +00:00
Andrew Trick
2f1d5d44c0 Cortex-A9 latency fixes (w/ -schedmodel only). 
Quick review against the manual revealed a few obvious mistakes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164361 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 05:06:40 +00:00
Michael Liao
fe87c302aa Add missing i8 max/min/umax/umin support 
- Fix PR5145 and turn on test 8-bit atomic ops



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 03:18:52 +00:00
Michael Liao
0838249a6a Revise td of X86 atomic instructions 
- Rewirte most atomic instructions in templates for both better
  maintenance and future extensions, such as HLE in TSX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164357 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 03:00:17 +00:00
NAKAMURA Takumi
b377635592 Mips16FrameLowering.cpp: Remove unused TII introduced in r164349. [-Wunused-variable] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164354 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 02:21:30 +00:00