llvm-6502/test/CodeGen/ARM
Evan Cheng 2b4e727c6f Re-apply 105308 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:28:13 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-09-tailmerge-2.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll Keep track of the last place a live virtreg was used. 2010-05-11 23:24:45 +00:00
2008-02-29-RegAllocLocal.ll Keep track of the last place a live virtreg was used. 2010-05-11 23:24:45 +00:00
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoalescerBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll Correct some bogus target triples. 2010-05-07 17:03:48 +00:00
2009-05-07-RegAllocLocal.ll Keep track of the last place a live virtreg was used. 2010-05-11 23:24:45 +00:00
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-12-RegScavengerAssert.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill4.ll
2009-08-21-PostRAKill.ll
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll Start function numbering at 0. 2010-04-17 16:29:15 +00:00
2009-08-31-TwoRegShuffle.ll
2009-09-01-PostRAProlog.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
2009-10-30.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
2009-11-01-NeonMoves.ll
2009-11-02-NegativeLane.ll Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements 2010-05-21 21:05:32 +00:00
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll pr6478: The frame pointer spill frame index is only defined when there is a 2010-03-04 21:42:36 +00:00
2010-03-04-stm-undef-addr.ll pr6480: Don't try producing ld/st-multiple instructions when the address is 2010-03-04 21:04:38 +00:00
2010-03-18-ldm-rtrn.ll pr6652: Use LDM to restore PC to the return address on ARMv4. 2010-03-20 22:20:40 +00:00
2010-04-07-DbgValueOtherTargets.ll Split big test into multiple directories to cater to 2010-04-07 20:43:35 +00:00
2010-04-09-NeonSelect.ll Add a testcase for svn r100568. 2010-04-09 18:29:29 +00:00
2010-04-13-v2f64SplitArg.ll Handle a v2f64 formal parameter that is split between registers and memory 2010-04-13 22:03:22 +00:00
2010-04-14-SplitVector.ll Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand 2010-04-14 20:45:23 +00:00
2010-04-15-ScavengerDebugValue.ll Fix PR6847. RegScavenger should ignore DebugValues. 2010-04-15 20:28:39 +00:00
2010-05-14-IllegalType.ll Allow TargetLowering::getRegClassFor() to be called on illegal types. Also 2010-05-15 02:18:07 +00:00
2010-05-17-DAGCombineAssert.ll FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). 2010-05-18 00:03:40 +00:00
2010-05-17-FastAllocCrash.ll Avoid allocating the same physreg to multiple virtregs in one instruction. 2010-05-17 17:18:59 +00:00
2010-05-18-LocalAllocCrash.ll Remember to update VirtRegLastUse when spilling without killing before a call. 2010-05-18 22:20:09 +00:00
2010-05-18-PostIndexBug.ll Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 2010-05-18 21:31:17 +00:00
2010-05-19-Shuffles.ll Handle Neon v2f64 and v2i64 vector shuffles as register copies. 2010-05-20 18:39:53 +00:00
2010-05-20-NEONSpillCrash.ll Add a -regalloc=default option that chooses a register allocator based on the -O 2010-05-27 23:57:25 +00:00
2010-05-21-BuildVector.ll Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by 2010-05-22 00:23:12 +00:00
addrmode.ll
aliases.ll emit jump table an alias ".set" directives through MCStreamer as 2010-01-26 21:53:08 +00:00
align.ll Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF. 2010-01-26 20:21:43 +00:00
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll Fix declarations in a few more tests. 2010-04-17 21:29:25 +00:00
arguments8.ll Fix declarations in a few more tests. 2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm-asm.ll
arm-frameaddr.ll Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
arm-negative-stride.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
arm-returnaddr.ll LR is in GPR, not tGPR even in Thumb1 mode. 2010-05-24 18:00:18 +00:00
armv4.ll Initial bits of ARMv4-only support. 2010-03-06 19:39:36 +00:00
bfc.ll
bfx.ll Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield 2010-04-22 23:24:18 +00:00
bic.ll
bits.ll
bx_fold.ll
call_nolink.ll
call.ll Remove a tail call, and move some CHECKs to the 2010-06-04 01:01:04 +00:00
carry.ll
clz.ll
compare-call.ll
constants.ll
cse-libcalls.ll
ctors_dtors.ll
ctz.ll
dg.exp
div.ll fix copy/paste oops. 2010-05-05 21:07:46 +00:00
dyn-stackalloc.ll
extloadi1.ll
fabss.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fadds.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fcopysign.ll
fdivs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fixunsdfdi.ll
fmacs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fmdrr-fmrrd.ll
fmscs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fmuls.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fnegs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fnmacs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fnmscs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fnmul.ll
fnmuls.ll
formal.ll
fp16.ll Fix typo 2010-03-14 18:42:52 +00:00
fp_convert.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp.ll
fpconsts.ll
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll
fptoint.ll
fsubs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
globals.ll Start function numbering at 0. 2010-04-17 16:29:15 +00:00
hardfloat_neon.ll
hello.ll
hidden-vis-2.ll
hidden-vis-3.ll Start function numbering at 0. 2010-04-17 16:29:15 +00:00
hidden-vis.ll
iabs.ll convert to filecheck. 2010-02-08 23:47:34 +00:00
ifcvt1.ll
ifcvt2.ll Fix a bug which prevented tail merging of return instructions in 2010-05-03 14:35:47 +00:00
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll Fix a bug which prevented tail merging of return instructions in 2010-05-03 14:35:47 +00:00
ifcvt6.ll More tail call removal. 2010-06-04 21:14:24 +00:00
ifcvt7.ll Stop using the old pre-UAL syntax for LDM/STM instruction suffixes. 2010-03-16 16:19:07 +00:00
ifcvt8.ll Stop using the old pre-UAL syntax for LDM/STM instruction suffixes. 2010-03-16 16:19:07 +00:00
ifcvt9.ll
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll fix AsmPrinter::GetBlockAddressSymbol to always return a unique 2010-03-14 17:53:23 +00:00
inlineasm2.ll
inlineasm3.ll
inlineasm-imm-arm.ll
inlineasm.ll llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error. 2010-05-27 22:08:38 +00:00
insn-sched1.ll Remove more tail calls. 2010-06-04 01:01:24 +00:00
ispositive.ll
large-stack.ll
ldm.ll Remove more tail calls. 2010-06-04 01:01:24 +00:00
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
load.ll
long_shift.ll Run codegen dce pass for all targets at all optimization levels. Previously it's 2010-02-06 09:07:11 +00:00
long-setcc.ll
long.ll
lsr-code-insertion.ll Reapply the new LoopStrengthReduction code, with compile time and 2010-02-12 10:34:29 +00:00
lsr-on-unrolled-loops.ll Fix some latency computation bugs: if the use is not a machine opcode do not just return zero. 2010-05-28 23:26:21 +00:00
lsr-scale-addr-mode.ll
machine-cse-cmp.ll Re-apply 105308 with fix. 2010-06-04 23:28:13 +00:00
mem.ll
memcpy-inline.ll
memfunc.ll
mls.ll
movt-movw-global.ll
movt.ll
mul_const.ll Some cheap DAG combine goodness for multiplication with a particular constant. 2010-05-15 18:16:59 +00:00
mul.ll
mulhi.ll
mvn.ll
neon_arith1.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll Check for comparisons of +/- zero when optimizing less-than-or-equal and 2010-02-24 22:15:53 +00:00
pack.ll
pr3502.ll
private.ll
reg_sequence.ll Fix some latency computation bugs: if the use is not a machine opcode do not just return zero. 2010-05-28 23:26:21 +00:00
remat.ll Delete dead PHI machine instructions. These can be created due to type 2010-02-10 22:58:57 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll
sbfx.ll add a simple dag combine to replace trivial shl+lshr with 2010-04-15 05:28:43 +00:00
section.ll
select_xform.ll
select-imm.ll
select.ll
shifter_operand.ll
smul.ll
spill-q.ll Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by 2010-05-22 00:23:12 +00:00
stack-frame.ll
stm.ll
str_post.ll
str_pre-2.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
str_pre.ll
str_trunc.ll
sxt_rot.ll
t2-imm.ll
tail-opts.ll
thread_pointer.ll
tls1.ll
tls2.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
tls3.ll
trap.ll Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. 2010-05-11 07:26:32 +00:00
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
unaligned_load_store.ll Fix a gross typo: ARMv6+ may or may not support unaligned memory operations. 2010-01-30 14:08:12 +00:00
unord.ll
uxt_rot.ll
uxtb.ll
vaba.ll
vabd.ll
vabs.ll
vadd.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vargs_align.ll
vargs.ll
vbits.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 2010-05-19 01:08:17 +00:00
vcnt.ll
vcombine.ll
vcvt.ll
vdup.ll
vext.ll
vfcmp.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vld2.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vld3.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vld4.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vldlane.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vminmax.ll
vmla.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vmls.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vmov.ll
vmul.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vneg.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst2.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst3.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst4.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vstlane.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vsub.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vtbl.ll
vtrn.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vuzp.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vzip.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
weak2.ll
weak.ll