| .. |
|
Disassembler
|
[Hexagon] Adding deallocframe and circular addressing loads.
|
2014-12-26 20:30:58 +00:00 |
|
MCTargetDesc
|
|
|
|
TargetInfo
|
|
|
|
CMakeLists.txt
|
|
|
|
Hexagon.h
|
|
|
|
Hexagon.td
|
[Hexagon] Adding reg-reg indexed load forms.
|
2014-12-30 18:58:47 +00:00 |
|
HexagonAsmPrinter.cpp
|
|
|
|
HexagonAsmPrinter.h
|
|
|
|
HexagonCallingConv.td
|
|
|
|
HexagonCallingConvLower.cpp
|
|
|
|
HexagonCallingConvLower.h
|
|
|
|
HexagonCFGOptimizer.cpp
|
|
|
|
HexagonCopyToCombine.cpp
|
[Hexagon] Dropping old combine instructions without encodings.
|
2014-12-30 17:53:54 +00:00 |
|
HexagonExpandPredSpillCode.cpp
|
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
|
2014-12-29 20:44:51 +00:00 |
|
HexagonFixupHwLoops.cpp
|
[Hexagon] Removing old variants of instructions and updating references.
|
2014-12-19 20:29:29 +00:00 |
|
HexagonFrameLowering.cpp
|
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores.
|
2014-12-29 21:33:45 +00:00 |
|
HexagonFrameLowering.h
|
|
|
|
HexagonHardwareLoops.cpp
|
[Hexagon] Removing old variants of instructions and updating references.
|
2014-12-19 20:29:29 +00:00 |
|
HexagonInstrFormats.td
|
[Hexagon] Reapplying 224775 load words.
|
2014-12-23 20:02:16 +00:00 |
|
HexagonInstrFormatsV4.td
|
|
|
|
HexagonInstrInfo.cpp
|
[Hexagon] Adding indexed store of immediates.
|
2014-12-30 21:01:38 +00:00 |
|
HexagonInstrInfo.h
|
|
|
|
HexagonInstrInfo.td
|
[Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores.
|
2014-12-29 21:33:45 +00:00 |
|
HexagonInstrInfoV3.td
|
|
|
|
HexagonInstrInfoV4.td
|
[Hexagon] Adding indexed store of immediates.
|
2014-12-30 21:01:38 +00:00 |
|
HexagonInstrInfoV5.td
|
[Hexagon] Removing old XTYPE/BIT instructions and replacing usages.
|
2014-12-16 22:17:09 +00:00 |
|
HexagonIntrinsics.td
|
[Hexagon] Adding doubleregs for control registers. Renaming control register class.
|
2014-12-19 18:56:10 +00:00 |
|
HexagonIntrinsicsDerived.td
|
|
|
|
HexagonIntrinsicsV3.td
|
|
|
|
HexagonIntrinsicsV4.td
|
|
|
|
HexagonIntrinsicsV5.td
|
|
|
|
HexagonISelDAGToDAG.cpp
|
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
|
2014-12-29 20:44:51 +00:00 |
|
HexagonISelLowering.cpp
|
|
|
|
HexagonISelLowering.h
|
|
|
|
HexagonMachineFunctionInfo.cpp
|
|
|
|
HexagonMachineFunctionInfo.h
|
|
|
|
HexagonMachineScheduler.cpp
|
|
|
|
HexagonMachineScheduler.h
|
|
|
|
HexagonMCInstLower.cpp
|
|
|
|
HexagonNewValueJump.cpp
|
|
|
|
HexagonOperands.td
|
[Hexagon] Adding classes and load unsigned byte instruction, updating usages.
|
2014-12-22 21:20:03 +00:00 |
|
HexagonPeephole.cpp
|
[Hexagon] Dropping old combine instructions without encodings.
|
2014-12-30 17:53:54 +00:00 |
|
HexagonRegisterInfo.cpp
|
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
|
2014-12-29 20:44:51 +00:00 |
|
HexagonRegisterInfo.h
|
|
|
|
HexagonRegisterInfo.td
|
[Hexagon] Adding deallocframe and circular addressing loads.
|
2014-12-26 20:30:58 +00:00 |
|
HexagonRemoveSZExtArgs.cpp
|
|
|
|
HexagonSchedule.td
|
|
|
|
HexagonScheduleV4.td
|
|
|
|
HexagonSelectCCInfo.td
|
|
|
|
HexagonSelectionDAGInfo.cpp
|
|
|
|
HexagonSelectionDAGInfo.h
|
|
|
|
HexagonSplitConst32AndConst64.cpp
|
|
|
|
HexagonSplitTFRCondSets.cpp
|
|
|
|
HexagonSubtarget.cpp
|
|
|
|
HexagonSubtarget.h
|
|
|
|
HexagonTargetMachine.cpp
|
|
|
|
HexagonTargetMachine.h
|
|
|
|
HexagonTargetObjectFile.cpp
|
|
|
|
HexagonTargetObjectFile.h
|
|
|
|
HexagonVarargsCallingConvention.h
|
|
|
|
HexagonVLIWPacketizer.cpp
|
[Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares.
|
2014-12-30 15:44:17 +00:00 |
|
LLVMBuild.txt
|
|
|
|
Makefile
|
|
|
