llvm-6502/lib/Target/CellSPU
Jim Grosbach 1b747ad8a0 SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 00:09:57 +00:00
..
AsmPrinter make printInstruction return void since its result is omitted. Make the 2009-08-08 01:32:19 +00:00
TargetInfo Factor commonality in triple match routines into helper template for registering 2009-07-26 05:03:33 +00:00
CellSDKIntrinsics.td Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
CMakeLists.txt CMake build fixes, from Xerxes Ranby 2009-07-02 18:53:52 +00:00
Makefile Add TargetInfo libraries for all targets. 2009-07-15 06:35:19 +00:00
README.txt CellSPU: 2009-01-21 04:58:48 +00:00
SPU64InstrInfo.td CellSPU: 2009-01-26 03:31:40 +00:00
SPU128InstrInfo.td CellSPU: 2009-01-21 04:58:48 +00:00
SPU.h Add new helpers for registering targets. 2009-07-25 06:49:55 +00:00
SPU.td - Start moving target-dependent nodes that could be represented by an 2008-12-30 23:28:25 +00:00
SPUCallingConv.td CellSPU: 2009-01-06 23:10:38 +00:00
SPUFrameInfo.cpp
SPUFrameInfo.h Bug fixes and updates for CellSPU, syncing up with trunk. Most notable 2008-04-30 00:30:08 +00:00
SPUHazardRecognizers.cpp Generalize the HazardRecognizer interface so that it can be used 2009-01-15 22:18:12 +00:00
SPUHazardRecognizers.h Generalize the HazardRecognizer interface so that it can be used 2009-01-15 22:18:12 +00:00
SPUInstrBuilder.h Fix constant pool loads, and remove broken versions of addConstantPoolReference. 2008-09-06 01:11:01 +00:00
SPUInstrFormats.td CellSPU: 2009-01-26 22:33:37 +00:00
SPUInstrInfo.cpp Remove unused member functions. 2009-07-24 07:43:59 +00:00
SPUInstrInfo.h Remove unused member functions. 2009-07-24 07:43:59 +00:00
SPUInstrInfo.td Major calling convention code refactoring. 2009-08-05 01:29:28 +00:00
SPUISelDAGToDAG.cpp Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 2009-08-10 22:56:29 +00:00
SPUISelLowering.cpp Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 2009-08-10 22:56:29 +00:00
SPUISelLowering.h Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 2009-08-10 22:56:29 +00:00
SPUMachineFunction.h
SPUMathInstr.td Untabify code. 2009-01-26 03:37:41 +00:00
SPUNodes.td - Convert remaining i64 custom lowering into custom instruction emission 2009-01-15 04:41:47 +00:00
SPUOperands.td Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 2009-08-10 22:56:29 +00:00
SPURegisterInfo.cpp Give getPointerRegClass() a "kind" value so that targets can 2009-07-29 20:31:52 +00:00
SPURegisterInfo.h Give getPointerRegClass() a "kind" value so that targets can 2009-07-29 20:31:52 +00:00
SPURegisterInfo.td CellSPU: 2009-01-06 23:10:38 +00:00
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
SPUSubtarget.h Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
SPUTargetAsmInfo.cpp SjLj based exception handling unwinding support. This patch is nasty, brutish 2009-08-11 00:09:57 +00:00
SPUTargetAsmInfo.h simplify SPULinuxTargetAsmInfo, remove use of TM. 2009-08-02 04:44:33 +00:00
SPUTargetMachine.cpp Move most targets TargetMachine constructor to only taking a target triple. 2009-08-02 23:37:13 +00:00
SPUTargetMachine.h Move most targets TargetMachine constructor to only taking a target triple. 2009-08-02 23:37:13 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: needed
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===