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llvm-6502/test/CodeGen/ARM
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Evan Cheng 86050dc8cc Allow ARM if-converter to be run after post allocation scheduling. 
- This fixed a number of bugs in if-converter, tail merging, and post-allocation
  scheduler. If-converter now runs branch folding / tail merging first to
  maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
  register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
  change the instruction ordering in the IT block (since IT mask has been
  finalized). It also ensures no other instructions can be scheduled between
  instructions in the IT block.

This is not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 23:09:54 +00:00
..
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
…
2007-03-07-CombinerCrash.ll
…
2007-03-13-InstrSched.ll
…
2007-03-21-JoinIntervalsCrash.ll
…
2007-03-26-RegScavengerAssert.ll
…
2007-03-27-RegScavengerAssert.ll
…
2007-03-30-RegScavengerAssert.ll
…
2007-04-02-RegScavengerAssert.ll
…
2007-04-03-PEIBug.ll
…
2007-04-03-UndefinedSymbol.ll
…
2007-04-30-CombinerCrash.ll
…
2007-05-03-BadPostIndexedLd.ll
…
2007-05-07-jumptoentry.ll
…
2007-05-07-tailmerge-1.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-09-tailmerge-2.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-14-InlineAsmCstCrash.ll
…
2007-05-14-RegScavengerAssert.ll
…
2007-05-22-tailmerge-3.ll
Remove the -enable-sjlj-eh option, which doesn't do anything.
2010-05-02 15:36:26 +00:00
2007-05-23-BadPreIndexedStore.ll
…
2007-05-31-RegScavengerInfiniteLoop.ll
…
2007-08-15-ReuseBug.ll
…
2008-02-04-LocalRegAllocBug.ll
Remove the local register allocator.
2010-06-15 21:58:33 +00:00
2008-02-29-RegAllocLocal.ll
Remove the local register allocator.
2010-06-15 21:58:33 +00:00
2008-03-05-SxtInRegBug.ll
…
2008-03-07-RegScavengerAssert.ll
…
2008-04-04-ScavengerAssert.ll
…
2008-04-10-ScavengerAssert.ll
…
2008-04-11-PHIofImpDef.ll
…
2008-05-19-LiveIntervalsBug.ll
…
2008-05-19-ScavengerAssert.ll
…
2008-07-17-Fdiv.ll
…
2008-07-24-CodeGenPrepCrash.ll
…
2008-08-07-AsmPrintBug.ll
…
2008-09-14-CoalescerBug.ll
…
2008-09-17-CoalescerBug.ll
…
2008-11-18-ScavengerAssert.ll
…
2009-02-16-SpillerBug.ll
…
2009-02-22-SoftenFloatVaArg.ll
…
2009-02-27-SpillerBug.ll
…
2009-03-07-SpillerBug.ll
…
2009-03-09-AddrModeBug.ll
…
2009-04-06-AsmModifier.ll
…
2009-04-08-AggregateAddr.ll
…
2009-04-08-FloatUndef.ll
…
2009-04-08-FREM.ll
…
2009-04-09-RegScavengerAsm.ll
…
2009-05-05-DAGCombineBug.ll
Correct some bogus target triples.
2010-05-07 17:03:48 +00:00
2009-05-07-RegAllocLocal.ll
Remove the local register allocator.
2010-06-15 21:58:33 +00:00
2009-05-11-CodePlacementCrash.ll
…
2009-05-18-InlineAsmMem.ll
Revise ARM inline assembly memory operands to require the memory address to
2009-10-13 20:50:28 +00:00
2009-06-02-ISelCrash.ll
…
2009-06-04-MissingLiveIn.ll
…
2009-06-12-RegScavengerAssert.ll
…
2009-06-15-RegScavengerAssert.ll
…
2009-06-19-RegScavengerAssert.ll
…
2009-06-22-CoalescerBug.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert2.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert3.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert4.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert5.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-07-01-CommuteBug.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-07-09-asm-p-constraint.ll
…
2009-07-18-RewriterBug.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-07-22-ScavengerAssert.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-07-22-SchedulerAssert.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-07-29-VFP3Registers.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-02-RegScavengerAssert-Neon.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-04-RegScavengerAssert-2.ll
Set the mtriple in some tests so that they use AAPCS.
2010-06-15 20:42:00 +00:00
2009-08-04-RegScavengerAssert.ll
Set the mtriple in some tests so that they use AAPCS.
2010-06-15 20:42:00 +00:00
2009-08-15-RegScavenger-EarlyClobber.ll
Set the mtriple in some tests so that they use AAPCS.
2010-06-15 20:42:00 +00:00
2009-08-15-RegScavengerAssert.ll
Set the mtriple in some tests so that they use AAPCS.
2010-06-15 20:42:00 +00:00
2009-08-21-PostRAKill2.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill3.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill4.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-23-linkerprivate.ll
…
2009-08-26-ScalarToVector.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-27-ScalarToVector.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-29-ExtractEltf32.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-29-TooLongSplat.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-31-LSDA-Name.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-08-31-TwoRegShuffle.ll
…
2009-09-01-PostRAProlog.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-09-09-AllOnes.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-09-09-fpcmp-ole.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
2009-09-10-postdec.ll
…
2009-09-13-InvalidSubreg.ll
…
2009-09-13-InvalidSuperReg.ll
…
2009-09-20-LiveIntervalsBug.ll
…
2009-09-21-LiveVariablesBug.ll
…
2009-09-22-LiveVariablesBug.ll
…
2009-09-23-LiveVariablesBug.ll
…
2009-09-24-spill-align.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2009-09-27-CoalescerBug.ll
…
2009-09-28-LdStOptiBug.ll
Remove the arm_aapcscc marker from the tests. It is the default
2010-06-15 19:04:29 +00:00
2009-10-02-NEONSubregsBug.ll
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
2009-11-03 05:52:54 +00:00
2009-10-21-InvalidFNeg.ll
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
2009-10-20 21:37:45 +00:00
2009-10-27-double-align.ll
Remove the arm_aapcscc marker from the tests. It is the default
2010-06-15 19:04:29 +00:00
2009-10-30.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
2009-11-01-NeonMoves.ll
Generalize the pre-coalescing of extract_subregs feeding reg_sequences,
2010-06-15 05:56:31 +00:00
2009-11-02-NegativeLane.ll
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
2010-05-21 21:05:32 +00:00
2009-11-07-SubRegAsmPrinting.ll
move fconst[sd] to UAL. <rdar://7414913>
2009-11-23 21:08:25 +00:00
2009-11-13-CoalescerCrash.ll
Fix PR5410: LiveVariables lost subreg def:
2009-11-13 20:36:40 +00:00
2009-11-13-ScavengerAssert2.ll
Fix PR5412: Fix an inverted check and another missing sub-register check.
2009-11-14 02:09:09 +00:00
2009-11-13-ScavengerAssert.ll
Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers.
2009-11-13 23:16:41 +00:00
2009-11-13-VRRewriterCrash.ll
Add radar number.
2009-11-14 02:11:32 +00:00
2009-11-30-LiveVariablesBug.ll
Fix PR5614: parts of a physical register def may be killed the rest.
2009-12-01 00:44:45 +00:00
2009-12-02-vtrn-undef.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-03-04-eabi-fp-spill.ll
pr6478: The frame pointer spill frame index is only defined when there is a
2010-03-04 21:42:36 +00:00
2010-03-04-stm-undef-addr.ll
pr6480: Don't try producing ld/st-multiple instructions when the address is
2010-03-04 21:04:38 +00:00
2010-03-18-ldm-rtrn.ll
pr6652: Use LDM to restore PC to the return address on ARMv4.
2010-03-20 22:20:40 +00:00
2010-04-07-DbgValueOtherTargets.ll
Split big test into multiple directories to cater to
2010-04-07 20:43:35 +00:00
2010-04-09-NeonSelect.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-04-13-v2f64SplitArg.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-04-14-SplitVector.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-04-15-ScavengerDebugValue.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-05-14-IllegalType.ll
Allow TargetLowering::getRegClassFor() to be called on illegal types. Also
2010-05-15 02:18:07 +00:00
2010-05-17-DAGCombineAssert.ll
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
2010-05-18 00:03:40 +00:00
2010-05-17-FastAllocCrash.ll
Avoid allocating the same physreg to multiple virtregs in one instruction.
2010-05-17 17:18:59 +00:00
2010-05-18-LocalAllocCrash.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-05-18-PostIndexBug.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-05-19-Shuffles.ll
Handle Neon v2f64 and v2i64 vector shuffles as register copies.
2010-05-20 18:39:53 +00:00
2010-05-20-NEONSpillCrash.ll
Add a -regalloc=default option that chooses a register allocator based on the -O
2010-05-27 23:57:25 +00:00
2010-05-21-BuildVector.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
2010-06-11-vmovdrr-bitcast.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
addrmode.ll
…
aliases.ll
emit jump table an alias ".set" directives through MCStreamer as
2010-01-26 21:53:08 +00:00
align.ll
Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.
2010-01-26 20:21:43 +00:00
alloca.ll
Convert to FileCheck, fixing failure due to tab change in the process.
2009-10-27 05:30:47 +00:00
argaddr.ll
…
arguments2.ll
…
arguments3.ll
…
arguments4.ll
…
arguments5.ll
…
arguments6.ll
…
arguments7.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments8.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
arguments-nosplit-double.ll
…
arguments-nosplit-i64.ll
…
arguments.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
arm-asm.ll
…
arm-frameaddr.ll
Remove the arm_aapcscc marker from the tests. It is the default
2010-06-15 19:04:29 +00:00
arm-negative-stride.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
arm-returnaddr.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
armv4.ll
Remove the arm_aapcscc marker from the tests. It is the default
2010-06-15 19:04:29 +00:00
bfc.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
bfx.ll
Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield
2010-04-22 23:24:18 +00:00
bic.ll
Forgot to alter RUN line when converting to FileCheck.
2009-11-22 13:09:48 +00:00
bits.ll
…
bx_fold.ll
…
call_nolink.ll
…
call-tc.ll
Enable tail calls on ARM by default, with some
2010-06-18 19:00:18 +00:00
call.ll
Remove a tail call, and move some CHECKs to the
2010-06-04 01:01:04 +00:00
carry.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
clz.ll
…
compare-call.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
constants.ll
Fix some more failures by converting to FileCheck.
2009-10-27 05:50:28 +00:00
crash-O0.ll
When using ADDri to get the address of a stack object, 255 is a conservative
2010-06-18 20:59:25 +00:00
cse-libcalls.ll
…
ctors_dtors.ll
…
ctz.ll
Test case for r93758.
2010-01-19 00:35:20 +00:00
dg.exp
…
div.ll
fix copy/paste oops.
2010-05-05 21:07:46 +00:00
dyn-stackalloc.ll
…
extloadi1.ll
…
fabss.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fadds.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fcopysign.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fdivs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fixunsdfdi.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fmacs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fmdrr-fmrrd.ll
…
fmscs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fmuls.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fnegs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fnmacs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fnmscs.ll
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
2010-05-21 00:43:17 +00:00
fnmul.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fnmuls.ll
…
formal.ll
…
fp16.ll
Fix typo
2010-03-14 18:42:52 +00:00
fp_convert.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
fp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fparith.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpcmp_ueq.ll
…
fpcmp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpconsts.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
fpconv.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpmem.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
fpow.ll
…
fpowi.ll
Make this more likely to generate a libcall.
2010-01-01 03:26:51 +00:00
fptoint.ll
Fix for bad FileCheck converts in revision 89584.
2009-11-22 12:50:05 +00:00
fsubs.ll
switch the flag for using NEON for SP floating point to a subtarget 'feature'.
2010-03-25 23:47:34 +00:00
globals.ll
Start function numbering at 0.
2010-04-17 16:29:15 +00:00
hardfloat_neon.ll
…
hello.ll
Revert 89562. We're being sneakier than I was giving us credit for, and this
2009-11-21 23:34:09 +00:00
hidden-vis-2.ll
…
hidden-vis-3.ll
Start function numbering at 0.
2010-04-17 16:29:15 +00:00
hidden-vis.ll
…
iabs.ll
convert to filecheck.
2010-02-08 23:47:34 +00:00
ifcvt1.ll
…
ifcvt2.ll
Allow ARM if-converter to be run after post allocation scheduling.
2010-06-18 23:09:54 +00:00
ifcvt3.ll
…
ifcvt4.ll
…
ifcvt5.ll
Fix a bug which prevented tail merging of return instructions in
2010-05-03 14:35:47 +00:00
ifcvt6-tc.ll
Fix an inverted condition.
2010-06-18 22:17:13 +00:00
ifcvt6.ll
More tail call removal.
2010-06-04 21:14:24 +00:00
ifcvt7.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ifcvt8.ll
Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
2010-03-16 16:19:07 +00:00
ifcvt9.ll
…
illegal-vector-bitcast.ll
…
imm.ll
…
indirectbr.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
inlineasm2.ll
…
inlineasm3.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
inlineasm-imm-arm.ll
…
inlineasm.ll
llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.
2010-05-27 22:08:38 +00:00
insn-sched1-tc.ll
Enable tail calls on ARM by default, with some
2010-06-18 19:00:18 +00:00
insn-sched1.ll
Remove more tail calls.
2010-06-04 01:01:24 +00:00
ispositive.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
large-stack.ll
…
ldm-tc.ll
Enable tail calls on ARM by default, with some
2010-06-18 19:00:18 +00:00
ldm.ll
Remove more tail calls.
2010-06-04 01:01:24 +00:00
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
ldrd.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
load.ll
…
long_shift.ll
Run codegen dce pass for all targets at all optimization levels. Previously it's
2010-02-06 09:07:11 +00:00
long-setcc.ll
…
long.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
lsr-code-insertion.ll
Reapply the new LoopStrengthReduction code, with compile time and
2010-02-12 10:34:29 +00:00
lsr-on-unrolled-loops.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
lsr-scale-addr-mode.ll
…
machine-cse-cmp.ll
Re-apply 105308 with fix.
2010-06-04 23:28:13 +00:00
mem.ll
…
memcpy-inline.ll
…
memfunc.ll
…
mls.ll
Convert a few tests to FileCheck for PR5307.
2009-11-22 11:45:44 +00:00
movt-movw-global.ll
Materialize global addresses via movt/movw pair, this is always better
2009-11-24 00:44:37 +00:00
movt.ll
Match more patterns to movt.
2009-10-21 08:15:52 +00:00
mul_const.ll
Some cheap DAG combine goodness for multiplication with a particular constant.
2010-05-15 18:16:59 +00:00
mul.ll
…
mulhi.ll
…
mvn.ll
…
neon_arith1.ll
…
neon_ld1.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
neon_ld2.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
neon_minmax.ll
Check for comparisons of +/- zero when optimizing less-than-or-equal and
2010-02-24 22:15:53 +00:00
pack.ll
…
pr3502.ll
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private.ll
Delete useless trailing semicolons.
2010-01-05 17:55:26 +00:00
reg_sequence.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
remat.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
ret0.ll
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ret_arg1.ll
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ret_arg2.ll
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ret_arg3.ll
…
ret_arg4.ll
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ret_arg5.ll
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ret_f32_arg2.ll
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ret_f32_arg5.ll
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ret_f64_arg2.ll
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ret_f64_arg_reg_split.ll
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ret_f64_arg_split.ll
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ret_f64_arg_stack.ll
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ret_i64_arg2.ll
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ret_i64_arg3.ll
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ret_i64_arg_split.ll
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ret_i128_arg2.ll
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ret_void.ll
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rev.ll
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sbfx.ll
add a simple dag combine to replace trivial shl+lshr with
2010-04-15 05:28:43 +00:00
section.ll
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select_xform.ll
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select-imm.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
select.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
shifter_operand.ll
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smul.ll
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spill-q.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
stack-frame.ll
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stm.ll
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str_post.ll
Fix the rest of the ARM failures by converting them to FileCheck.
2009-10-27 06:16:45 +00:00
str_pre-2.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
str_pre.ll
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str_trunc.ll
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sxt_rot.ll
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t2-imm.ll
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tail-opts.ll
Delete useless trailing semicolons.
2010-01-05 17:55:26 +00:00
thread_pointer.ll
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tls1.ll
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tls2.ll
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
2010-03-17 17:52:21 +00:00
tls3.ll
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trap.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
trunc_ldr.ll
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truncstore-dag-combine.ll
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tst_teq.ll
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uint64tof64.ll
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unaligned_load_store.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
unord.ll
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uxt_rot.ll
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uxtb.ll
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vaba.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vabd.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vabs.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vadd.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vargs_align.ll
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vargs.ll
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vbits.ll
The Neon "vtst" instruction takes a suffix that is the element size alone --
2010-01-17 06:35:17 +00:00
vbsl.ll
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vceq.ll
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vcge.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vcgt.ll
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
2010-05-19 01:08:17 +00:00
vcnt.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vcombine.ll
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vcvt.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vdup.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
vext.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
vfcmp.ll
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vfp.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
vget_lane.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
vhadd.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vhsub.ll
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vicmp.ll
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vld1.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vld2.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vld3.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vld4.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vldlane.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vminmax.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vmla.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vmls.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vmov.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
vmul.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vneg.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vpadal.ll
…
vpadd.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vpminmax.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vqadd.ll
…
vqdmul.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vqshl.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vqshrn.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vqsub.ll
…
vrec.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vrev.ll
Remove arm_apcscc from the test files. It is the default and doing this
2010-06-17 15:18:27 +00:00
vshift.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vshiftins.ll
Convert more NEON tests to use FileCheck.
2009-10-09 05:14:48 +00:00
vshl.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vshll.ll
Convert more NEON tests to use FileCheck.
2009-10-09 05:14:48 +00:00
vshrn.ll
Merge a bunch of NEON tests into larger files so they run faster.
2009-10-09 20:20:54 +00:00
vsra.ll
Convert more NEON tests to use FileCheck.
2009-10-09 05:14:48 +00:00
vst1.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst2.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst3.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vst4.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vstlane.ll
Fix tests for Neon load/store intrinsics to match the i8* types expected by
2010-04-20 00:17:16 +00:00
vsub.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vtbl.ll
…
vtrn.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vuzp.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
vzip.ll
Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
2010-05-03 22:36:46 +00:00
weak2.ll
…
weak.ll
…