llvm-6502/lib/CodeGen
Chris Lattner ef7634ca48 factor this code better and reduce nesting at the same
time, no functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92948 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 21:53:27 +00:00
..
AsmPrinter Kill dead store. 2010-01-07 17:50:57 +00:00
PBQP Fixed malformed -*- lines in PBQP headers. 2010-01-06 08:53:34 +00:00
SelectionDAG factor this code better and reduce nesting at the same 2010-01-07 21:53:27 +00:00
AggressiveAntiDepBreaker.cpp 80 column and whitespace cleanup 2010-01-06 16:48:02 +00:00
AggressiveAntiDepBreaker.h 80 column and whitespace cleanup 2010-01-06 16:48:02 +00:00
AntiDepBreaker.h Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. 2009-11-20 19:32:48 +00:00
BranchFolding.cpp Change errs() to dbgs(). 2009-12-24 00:34:21 +00:00
BranchFolding.h Split tail duplication into a separate pass. This is needed to avoid 2009-11-26 00:32:21 +00:00
CalcSpillWeights.cpp Change errs() to dbgs(). 2009-12-24 00:39:02 +00:00
CMakeLists.txt Added CalcSpillWeights to CMakeLists. 2009-12-14 07:43:25 +00:00
CodePlacementOpt.cpp Remove dead store. 2009-12-25 13:39:58 +00:00
CriticalAntiDepBreaker.cpp Anti-dependency breaking needs to be careful regarding instructions with 2010-01-06 22:21:25 +00:00
CriticalAntiDepBreaker.h Anti-dependency breaking needs to be careful regarding instructions with 2010-01-06 22:21:25 +00:00
DeadMachineInstructionElim.cpp Change errs() to dbgs(). 2010-01-04 19:10:20 +00:00
DwarfEHPrepare.cpp Pull LLVMContext out of PromoteMemToReg. 2009-11-23 03:50:44 +00:00
ELF.h Fix a bunch of little errors that Clang complains about when its being pedantic 2009-12-19 07:05:23 +00:00
ELFCodeEmitter.cpp Change errs() to dbgs(). 2010-01-04 19:36:42 +00:00
ELFCodeEmitter.h
ELFWriter.cpp Change errs() to dbgs(). 2010-01-04 19:57:26 +00:00
ELFWriter.h
ExactHazardRecognizer.cpp Change errs() to dbgs(). 2010-01-04 21:26:07 +00:00
ExactHazardRecognizer.h
GCMetadata.cpp Change errs() to dbgs(). 2010-01-04 21:35:15 +00:00
GCMetadataPrinter.cpp
GCStrategy.cpp Change errs() to dbgs(). 2010-01-04 21:48:34 +00:00
IfConversion.cpp Change errs() to dbgs(). 2010-01-04 22:02:01 +00:00
IntrinsicLowering.cpp Avoid going through the LLVMContext for type equality where it's safe to dereference the type pointer. 2010-01-05 13:12:22 +00:00
LatencyPriorityQueue.cpp Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. 2009-11-20 19:32:48 +00:00
LiveInterval.cpp Change errs() to dbgs(). 2010-01-04 22:41:43 +00:00
LiveIntervalAnalysis.cpp Change errs() to dbgs(). 2010-01-04 22:49:02 +00:00
LiveStackAnalysis.cpp The Indexes Patch. 2009-11-03 23:52:08 +00:00
LiveVariables.cpp Remove dead variable. 2010-01-07 17:29:08 +00:00
LLVMTargetMachine.cpp Allow double defs after tail duplication. 2010-01-06 23:52:46 +00:00
LowerSubregs.cpp Change errs() to dbgs(). 2010-01-04 23:06:47 +00:00
MachineBasicBlock.cpp Change errs() to dbgs(). 2010-01-04 23:22:07 +00:00
MachineDominators.cpp Explicit template instantiations must happen in the template's immediately 2009-12-16 00:13:24 +00:00
MachineFunction.cpp Change errs() to dbgs(). 2010-01-04 23:39:17 +00:00
MachineFunctionAnalysis.cpp Constify MachineFunctionAnalysis' TargetMachine reference. 2009-11-09 18:18:49 +00:00
MachineFunctionPass.cpp
MachineInstr.cpp Add <imp-def> and <imp-kill> operands when replacing virtual sub-register defs and kills. 2010-01-06 00:29:28 +00:00
MachineLICM.cpp Change errs() to dbgs(). 2010-01-05 00:03:48 +00:00
MachineLoopInfo.cpp Restore dump() methods to Loop and MachineLoop. 2010-01-05 21:08:02 +00:00
MachineModuleInfo.cpp Remove DebugLabelFolder pass. It is not used by dwarf writer anymore. 2009-11-24 19:37:07 +00:00
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp
MachineRegisterInfo.cpp
MachineSink.cpp Change errs() to dbgs(). 2010-01-05 01:26:00 +00:00
MachineSSAUpdater.cpp Change errs() to dbgs(). 2010-01-05 00:10:05 +00:00
MachineVerifier.cpp Remove livein checks from machine code verifier. 2010-01-05 20:59:36 +00:00
MachO.h
MachOCodeEmitter.cpp
MachOCodeEmitter.h
MachOWriter.cpp Change errs() to dbgs(). 2010-01-04 23:14:46 +00:00
MachOWriter.h
Makefile
MaxStackAlignment.cpp Factor the stack alignment calculations out into a target independent pass. 2009-12-02 19:30:24 +00:00
ObjectCodeEmitter.cpp
OcamlGC.cpp
Passes.cpp
PHIElimination.cpp Change errs() to dbgs(). 2010-01-05 01:24:24 +00:00
PHIElimination.h Reuse lowered phi nodes. 2009-12-16 18:55:53 +00:00
PostRASchedulerList.cpp Change errs() to dbgs(). 2010-01-05 01:26:01 +00:00
PreAllocSplitting.cpp Simplify code. No intended functionality/performance change. 2010-01-07 19:46:15 +00:00
ProcessImplicitDefs.cpp Change errs() to dbgs(). 2010-01-05 01:24:28 +00:00
PrologEpilogInserter.cpp Remove dead store. 2009-12-28 01:44:39 +00:00
PrologEpilogInserter.h
PseudoSourceValue.cpp Do some cleanups suggested by Chris. 2009-11-12 21:49:55 +00:00
README.txt
RegAllocLinearScan.cpp Change errs() to dbgs(). 2010-01-05 01:25:20 +00:00
RegAllocLocal.cpp Change errs() to dbgs(). 2010-01-05 01:26:05 +00:00
RegAllocPBQP.cpp Change errs() to dbgs(). 2010-01-05 01:25:43 +00:00
RegisterCoalescer.cpp
RegisterScavenging.cpp improve portability to avoid conflicting with std::next in c++'0x. 2009-12-03 00:50:42 +00:00
ScheduleDAG.cpp Change errs() to dbgs(). 2010-01-05 01:25:41 +00:00
ScheduleDAGEmit.cpp Add assertion checks here to turn silent miscompiles into aborts. 2009-10-30 23:59:06 +00:00
ScheduleDAGInstrs.cpp Fix dependencies added to model memory aliasing for post-RA scheduling. The dependencies were overly conservative for memory access that are known not to alias. 2009-11-09 19:22:17 +00:00
ScheduleDAGInstrs.h
ScheduleDAGPrinter.cpp Remove ShortNames from getNodeLabel in DOTGraphTraits 2009-11-30 12:38:47 +00:00
ShadowStackGC.cpp
ShrinkWrapping.cpp Change errs() to dbgs(). 2010-01-05 01:25:39 +00:00
SimpleHazardRecognizer.h
SimpleRegisterCoalescing.cpp Change errs() to dbgs(). 2010-01-05 01:25:58 +00:00
SimpleRegisterCoalescing.h Fix a bunch of little errors that Clang complains about when its being pedantic 2009-12-19 07:05:23 +00:00
SjLjEHPrepare.cpp
SlotIndexes.cpp Change errs() to dbgs(). 2010-01-05 01:25:50 +00:00
Spiller.cpp Change errs() to dbgs(). 2010-01-05 01:25:55 +00:00
Spiller.h Added a new "splitting" spiller. 2009-12-09 05:39:12 +00:00
StackProtector.cpp Move remaining stuff to the isInteger predicate. 2010-01-05 21:05:54 +00:00
StackSlotColoring.cpp Change errs() to dbgs(). 2010-01-05 01:24:08 +00:00
StrongPHIElimination.cpp Change errs() to dbgs(). 2010-01-05 01:26:09 +00:00
TailDuplication.cpp Add Target hook to duplicate machine instructions. 2010-01-06 23:47:07 +00:00
TargetInstrInfoImpl.cpp Add Target hook to duplicate machine instructions. 2010-01-06 23:47:07 +00:00
TwoAddressInstructionPass.cpp Change errs() to dbgs(). 2010-01-05 01:24:21 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp Change errs() to dbgs(). 2010-01-05 01:25:45 +00:00
VirtRegMap.h The Indexes Patch. 2009-11-03 23:52:08 +00:00
VirtRegRewriter.cpp Add <imp-def> and <imp-kill> operands when replacing virtual sub-register defs and kills. 2010-01-06 00:29:28 +00:00
VirtRegRewriter.h

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelyhood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvments:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.