Commit Graph

176 Commits

Author SHA1 Message Date
Florian Reitz
91ee6518ae Tag Connect added 2019-03-03 10:21:08 +01:00
Florian Reitz
02d9e608e1 Program enable added and verified 2019-03-03 10:21:02 +01:00
Florian Reitz
91d54ddd9c AddressDecoder verified in simulation 2019-03-03 10:20:50 +01:00
Florian Reitz
70c0c118fc Expected results added to AddressDecoder simulation 2019-03-03 10:20:46 +01:00
Florian Reitz
7a0480f05e LED removed from AddressDecoder 2019-03-03 10:20:40 +01:00
Florian Reitz
936a0c2b5a NWE added to schematic and layout 2019-03-03 10:20:36 +01:00
Florian Reitz
b50b1037fd NWE signal added, not tested 2019-03-03 10:20:33 +01:00
Florian Reitz
6ed5304e10 Timing diagrams 2019-03-03 10:20:29 +01:00
Florian Reitz
bc75ba9eb6 Fix in ProDOS write 2019-03-03 10:20:14 +01:00
Florian Reitz
e21bde80bd Merge branch 'Smartport' 2018-07-07 17:28:58 +02:00
Florian Reitz
0ba00e76ce Nasty bug in Status call fixed 2018-07-07 17:28:30 +02:00
Florian Reitz
8348d6d2dc Status00 call updated 2018-05-29 23:12:04 +02:00
Florian Reitz
06739f1d19 Smartport seems to work 2018-05-29 00:36:56 +02:00
Florian Reitz
e4718163a2 Timing overview added 2018-05-25 10:59:44 +02:00
Florian Reitz
0c64c93efb Status command added 2018-05-24 10:56:46 +02:00
Florian Reitz
ad4c2939b8 Smartport Control added 2018-05-24 09:44:21 +02:00
Florian Reitz
b62f7cfda0 All Smartport functions except Status and Control added 2018-05-23 22:17:19 +02:00
Florian Reitz
0910ca3db0 Smartport dispatcher added 2018-05-23 20:51:44 +02:00
Florian Reitz
457e8bff9c Prepared for Smartport 2018-05-22 21:53:11 +02:00
Florian Reitz
31817a481c Save zeropage in loop 2018-05-17 22:41:48 +02:00
Florian Reitz
515c19684e ProDOS jump table moved 2018-05-17 22:41:24 +02:00
Florian Reitz
048d1df99a Error codes added 2018-05-17 22:41:02 +02:00
Florian Reitz
2daaa107a0 Smartport.s added 2018-05-17 22:40:38 +02:00
Unknown
214344086b Merge remote-tracking branch 'origin/master' 2018-03-14 13:57:29 +01:00
Florian Reitz
f1993542e2 ProDOS image for testing added 2017-12-23 13:38:56 +01:00
Florian Reitz
fe9ae43e09 Test with phantom slots 2017-12-19 15:20:59 +01:00
Florian Reitz
06efc602c4 Merge branch 'devel' 2017-12-19 15:15:53 +01:00
Florian Reitz
13bfa30227 ProDOS functions moved to separate file
Debug functions removed
2017-12-17 20:42:37 +01:00
Florian Reitz
f656800697 Updated to V1.1 2017-12-17 20:23:38 +01:00
Unknown
4cd6a76790 Fix for non-SDHC SDV2 2017-12-16 15:19:07 +01:00
Florian Reitz
4be091a1cb Helper and include files added 2017-12-12 19:19:06 +01:00
Florian Reitz
0b33b5d385 Gerber for V1.1 2017-12-07 18:42:10 +01:00
Florian Reitz
b28b7481e2 Gerber for V1.1 2017-12-05 18:38:40 +01:00
Unknown
52852a3a07 Merge remote-tracking branch 'origin/master' 2017-12-02 00:46:58 +01:00
Unknown
05791c4e3d Schematic PDF updated 2017-12-02 00:46:29 +01:00
Unknown
db0bf9dd5b Schematic PDF updated 2017-12-01 15:05:22 +01:00
Florian Reitz
85687ed649 README.md updated 2017-12-01 14:26:18 +01:00
Florian Reitz
c93b63a92c Skip boot added 2017-11-30 16:25:11 +01:00
Florian Reitz
331b84cc17 Change in makefile and folder structure 2017-11-30 13:00:06 +01:00
Unknown
2df245675d Schematic updated 2017-11-30 12:14:54 +01:00
Florian Reitz
ab87f81ba8 Boot verified for IIgs, IIe 128k and IIe 64k 2017-11-29 01:20:44 +01:00
Florian Reitz
741624f3b5 IIgs boot working!!! 2017-11-26 21:26:15 +01:00
Florian Reitz
4feea40b5d VS2015 project added 2017-11-26 00:19:35 +01:00
Florian Reitz
0f92b7cf03 Source updated for CC65 2017-11-25 23:23:25 +01:00
freitz85
505fe10434 SDHC flag added to CPLD 2017-11-25 19:42:33 +01:00
Florian Reitz
6517f86ce3 Load block 0 and 1 on boot 2017-11-20 19:13:16 +01:00
freitz85
9aa65960c4 SPI Mode 3 2017-11-01 16:50:56 +01:00
Florian Reitz
e9bd383d2e Save and restore ZP locations
Shorter read write loops
2017-11-01 16:22:35 +01:00
freitz85
cf98c54e77 Linear addressing from Cn00 2017-10-23 22:42:27 +02:00
Florian Reitz
b0df142692 Linear addressing from C700, test code added to ram 2017-10-22 20:50:14 +02:00