new kotest library version

correct case of several other cx16 kernal calls.

corrected to upper case: cx16 kernal calls CLOSE_ALL, LKUPLA, LKUPSA, JSRFAR, PRIMM, MACPTR.

.idea/libraries/antlr_antlr4.xml

@@ -1,13 +1,13 @@
 <component name="libraryTable">
   <library name="antlr.antlr4" type="repository">
-    <properties maven-id="org.antlr:antlr4:4.12.0">
+    <properties maven-id="org.antlr:antlr4:4.13.1">
       <exclude>
         <dependency maven-id="com.ibm.icu:icu4j" />
       </exclude>
     </properties>
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4/4.12.0/antlr4-4.12.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4-runtime/4.12.0/antlr4-runtime-4.12.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4/4.13.1/antlr4-4.13.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4-runtime/4.13.1/antlr4-runtime-4.13.1.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr-runtime/3.5.3/antlr-runtime-3.5.3.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/antlr/ST4/4.3.4/ST4-4.3.4.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/abego/treelayout/org.abego.treelayout.core/1.0.3/org.abego.treelayout.core-1.0.3.jar!/" />

.idea/libraries/io_kotest_assertions_core_jvm.xml

@@ -1,19 +1,19 @@
 <component name="libraryTable">
   <library name="io.kotest.assertions.core.jvm" type="repository">
-    <properties maven-id="io.kotest:kotest-assertions-core-jvm:5.6.2" />
+    <properties maven-id="io.kotest:kotest-assertions-core-jvm:5.7.2" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.6.2/kotest-assertions-core-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.7.2/kotest-assertions-core-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.8.10/kotlin-stdlib-jdk8-1.8.10.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.8.10/kotlin-stdlib-1.8.10.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.8.10/kotlin-stdlib-jdk7-1.8.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.6.2/kotest-assertions-shared-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.7.2/kotest-assertions-shared-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.12/java-diff-utils-4.12.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.2.0/opentest4j-1.2.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.3.0/opentest4j-1.3.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.8.10/kotlin-stdlib-common-1.8.10.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.7.0/kotlinx-coroutines-jdk8-1.7.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.8.10/kotlin-reflect-1.8.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.6.2/kotest-common-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.6.2/kotest-assertions-api-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.7.2/kotest-common-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.7.2/kotest-assertions-api-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.7.0/kotlinx-coroutines-core-jvm-1.7.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/23.0.0/annotations-23.0.0.jar!/" />
     </CLASSES>

.idea/libraries/io_kotest_runner_junit5_jvm.xml

@@ -1,29 +1,29 @@
 <component name="libraryTable">
   <library name="io.kotest.runner.junit5.jvm" type="repository">
-    <properties maven-id="io.kotest:kotest-runner-junit5-jvm:5.6.2" />
+    <properties maven-id="io.kotest:kotest-runner-junit5-jvm:5.7.2" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-runner-junit5-jvm/5.6.2/kotest-runner-junit5-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-api-jvm/5.6.2/kotest-framework-api-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.6.2/kotest-assertions-shared-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-runner-junit5-jvm/5.7.2/kotest-runner-junit5-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-api-jvm/5.7.2/kotest-framework-api-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.7.2/kotest-assertions-shared-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.12/java-diff-utils-4.12.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-test-jvm/1.7.0/kotlinx-coroutines-test-jvm-1.7.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.6.2/kotest-common-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-engine-jvm/5.6.2/kotest-framework-engine-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/github/classgraph/classgraph/4.8.157/classgraph-4.8.157.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.7.2/kotest-common-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-engine-jvm/5.7.2/kotest-framework-engine-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/github/classgraph/classgraph/4.8.162/classgraph-4.8.162.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/com/github/ajalt/mordant/1.2.1/mordant-1.2.1.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/com/github/ajalt/colormath/1.2.0/colormath-1.2.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.2.0/opentest4j-1.2.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.3.0/opentest4j-1.3.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-debug/1.7.0/kotlinx-coroutines-debug-1.7.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/net/java/dev/jna/jna/5.9.0/jna-5.9.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/net/java/dev/jna/jna-platform/5.9.0/jna-platform-5.9.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy/1.10.9/byte-buddy-1.10.9.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy-agent/1.10.9/byte-buddy-agent-1.10.9.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-discovery-jvm/5.6.2/kotest-framework-discovery-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.6.2/kotest-assertions-core-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-discovery-jvm/5.7.2/kotest-framework-discovery-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.7.2/kotest-assertions-core-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.7.0/kotlinx-coroutines-jdk8-1.7.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.6.2/kotest-assertions-api-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-extensions-jvm/5.6.2/kotest-extensions-jvm-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-concurrency-jvm/5.6.2/kotest-framework-concurrency-jvm-5.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.7.2/kotest-assertions-api-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-extensions-jvm/5.7.2/kotest-extensions-jvm-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-concurrency-jvm/5.7.2/kotest-framework-concurrency-jvm-5.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.7.0/kotlinx-coroutines-core-jvm-1.7.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/23.0.0/annotations-23.0.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-engine/1.8.2/junit-platform-engine-1.8.2.jar!/" />

.idea/libraries/jetbrains_kotlinx_cli_jvm.xml

@@ -1,8 +1,8 @@
 <component name="libraryTable">
   <library name="jetbrains.kotlinx.cli.jvm" type="repository">
-    <properties include-transitive-deps="false" maven-id="org.jetbrains.kotlinx:kotlinx-cli-jvm:0.3.5" />
+    <properties include-transitive-deps="false" maven-id="org.jetbrains.kotlinx:kotlinx-cli-jvm:0.3.6" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-cli-jvm/0.3.5/kotlinx-cli-jvm-0.3.5.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-cli-jvm/0.3.6/kotlinx-cli-jvm-0.3.6.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/slf4j_simple.xml

@@ -1,9 +1,9 @@
 <component name="libraryTable">
   <library name="slf4j.simple" type="repository">
-    <properties maven-id="org.slf4j:slf4j-simple:2.0.7" />
+    <properties maven-id="org.slf4j:slf4j-simple:2.0.9" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-simple/2.0.7/slf4j-simple-2.0.7.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-api/2.0.7/slf4j-api-2.0.7.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-simple/2.0.9/slf4j-simple-2.0.9.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-api/2.0.9/slf4j-api-2.0.9.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/misc.xml

@@ -16,6 +16,9 @@
       </list>
     </option>
   </component>
+  <component name="Black">
+    <option name="sdkName" value="Python 3.11" />
+  </component>
   <component name="FrameworkDetectionExcludesConfiguration">
     <type id="Python" />
   </component>

codeCore/build.gradle

@@ -32,10 +32,10 @@ dependencies {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
 }

codeCore/src/prog8/code/SymbolTable.kt

@@ -196,13 +196,10 @@ class StStaticVariable(name: String,
         }
         if(onetimeInitializationNumericValue!=null) {
             require(dt in NumericDatatypes)
-            require(onetimeInitializationNumericValue!=0.0) { "zero as init value should just remain uninitialized"}
         }
         if(onetimeInitializationArrayValue!=null) {
             require(dt in ArrayDatatypes)
-            if(onetimeInitializationArrayValue.all { it.number!=null} ) {
-                require(onetimeInitializationArrayValue.any { it.number != 0.0 }) { "array of all zerors as init value should just remain uninitialized" }
-            }
+            require(length==onetimeInitializationArrayValue.size)
         }
         if(onetimeInitializationStringValue!=null) {
             require(dt == DataType.STR)

codeCore/src/prog8/code/SymbolTableMaker.kt

@@ -74,10 +74,9 @@ class SymbolTableMaker(private val program: PtProgram, private val options: Comp
                             numElements = value.value.length + 1   // include the terminating 0-byte
                         }
                         is PtArray -> {
-                            val array = makeInitialArray(value)
-                            initialArray = if(array.all { it.number==0.0 }) null else array            // all 0 as init value -> just uninitialized
+                            initialArray = makeInitialArray(value)
                             initialString = null
-                            numElements = array.size
+                            numElements = initialArray.size
                             require(node.arraySize?.toInt()==numElements)
                         }
                         else -> {
@@ -126,7 +125,11 @@ class SymbolTableMaker(private val program: PtProgram, private val options: Comp
     private fun makeInitialArray(value: PtArray): List<StArrayElement> {
         return value.children.map {
             when(it) {
-                is PtAddressOf -> StArrayElement(null, it.identifier.name)
+                is PtAddressOf -> {
+                    if(it.isFromArrayElement)
+                        TODO("address-of array element $it in initial array value")
+                    StArrayElement(null, it.identifier.name)
+                }
                 is PtIdentifier -> StArrayElement(null, it.name)
                 is PtNumber -> StArrayElement(it.number, null)
                 else -> throw AssemblyError("invalid array element $it")

codeCore/src/prog8/code/ast/AstBase.kt

@@ -75,6 +75,7 @@ class PtBlock(name: String,
               val library: Boolean,
               val forceOutput: Boolean,
               val noSymbolPrefixing: Boolean,
+              val veraFxMuls: Boolean,
               val alignment: BlockAlignment,
               val source: SourceCode,       // taken from the module the block is defined in.
               position: Position

codeCore/src/prog8/code/ast/AstExpressions.kt

@@ -24,7 +24,17 @@ sealed class PtExpression(val type: DataType, position: Position) : PtNode(posit
 
     infix fun isSameAs(other: PtExpression): Boolean {
         return when(this) {
-            is PtAddressOf -> other is PtAddressOf && other.type==type && other.identifier isSameAs identifier
+            is PtAddressOf -> {
+                if(other !is PtAddressOf)
+                    return false
+                if (other.type!==type || !(other.identifier isSameAs identifier))
+                    return false
+                if(other.children.size!=children.size)
+                    return false
+                if(children.size==1)
+                    return true
+                return arrayIndexExpr!! isSameAs other.arrayIndexExpr!!
+            }
             is PtArrayIndexer -> other is PtArrayIndexer && other.type==type && other.variable isSameAs variable && other.index isSameAs index && other.splitWords==splitWords
             is PtBinaryExpression -> other is PtBinaryExpression && other.left isSameAs left && other.right isSameAs right
             is PtContainmentCheck -> other is PtContainmentCheck && other.type==type && other.element isSameAs element && other.iterable isSameAs iterable
@@ -105,7 +115,12 @@ sealed class PtExpression(val type: DataType, position: Position) : PtNode(posit
 
 class PtAddressOf(position: Position) : PtExpression(DataType.UWORD, position) {
     val identifier: PtIdentifier
-        get() = children.single() as PtIdentifier
+        get() = children[0] as PtIdentifier
+    val arrayIndexExpr: PtExpression?
+        get() = if(children.size==2) children[1] as PtExpression else null
+
+    val isFromArrayElement: Boolean
+        get() = children.size==2
 }
 
 

codeCore/src/prog8/code/core/BuiltinFunctions.kt

@@ -70,6 +70,8 @@ class FSignature(val pure: Boolean,      // does it have side effects?
 
 val BuiltinFunctions: Map<String, FSignature> = mapOf(
     // this set of function have no return value and operate in-place:
+    "setlsb"    to FSignature(false, listOf(FParam("variable", arrayOf(DataType.WORD, DataType.UWORD)), FParam("value", arrayOf(DataType.BYTE, DataType.UBYTE))), null),
+    "setmsb"    to FSignature(false, listOf(FParam("variable", arrayOf(DataType.WORD, DataType.UWORD)), FParam("value", arrayOf(DataType.BYTE, DataType.UBYTE))), null),
     "rol"       to FSignature(false, listOf(FParam("item", arrayOf(DataType.UBYTE, DataType.UWORD))), null),
     "ror"       to FSignature(false, listOf(FParam("item", arrayOf(DataType.UBYTE, DataType.UWORD))), null),
     "rol2"      to FSignature(false, listOf(FParam("item", arrayOf(DataType.UBYTE, DataType.UWORD))), null),
@@ -131,4 +133,4 @@ val BuiltinFunctions: Map<String, FSignature> = mapOf(
     "callfar"   to FSignature(false, listOf(FParam("bank", arrayOf(DataType.UBYTE)), FParam("address", arrayOf(DataType.UWORD)), FParam("arg", arrayOf(DataType.UWORD))), DataType.UWORD),
 )
 
-val InplaceModifyingBuiltinFunctions = setOf("rol", "ror", "rol2", "ror2", "sort", "reverse")
+val InplaceModifyingBuiltinFunctions = setOf("setlsb", "setmsb", "rol", "ror", "rol2", "ror2", "sort", "reverse")

codeCore/src/prog8/code/core/CompilationOptions.kt

@@ -21,6 +21,7 @@ class CompilationOptions(val output: OutputType,
                          var experimentalCodegen: Boolean = false,
                          var varsHighBank: Int? = null,
                          var splitWordArrays: Boolean = false,
+                         var breakpointCpuInstruction: Boolean = false,
                          var outputDir: Path = Path(""),
                          var symbolDefs: Map<String, String> = emptyMap()
 ) {

codeCore/src/prog8/code/target/c64/C64Zeropage.kt

@@ -53,11 +53,11 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
                 ).map{it.toUInt()})
             }
 
-            if(options.zeropage!= ZeropageType.DONTUSE) {
+            if(options.zeropage != ZeropageType.DONTUSE) {
                 // add the free Zp addresses
                 // these are valid for the C-64 but allow BASIC to keep running fully *as long as you don't use tape I/O*
                 free.addAll(listOf(0x02, 0x03, 0x04, 0x05, 0x06, 0x0a, 0x0e,
-                        0x92, 0x96, 0x9b, 0x9c, 0x9e, 0x9f, 0xa5, 0xa6,
+                        0x92, 0x96, 0x9b, 0x9c, 0x9e, 0x9f, 0xa6,
                         0xb0, 0xb1, 0xbe, 0xbf, 0xf9).map{it.toUInt()})
             } else {
                 // don't use the zeropage at all

codeCore/src/prog8/code/target/cbm/PetsciiEncoding.kt

@@ -24,7 +24,7 @@ object PetsciiEncoding {
         '\ufffe',    //       0x0A -> UNDEFINED
         '\ufffe',    //       0x0B -> UNDEFINED
         '\ufffe',    //       0x0C -> UNDEFINED
-        '\r'    ,    //       0x0D -> CARRIAGE RETURN
+        '\n'    ,    //       0x0D -> LINE FEED (RETURN)
         '\u000e',    //       0x0E -> SHIFT OUT
         '\ufffe',    //       0x0F -> UNDEFINED
         '\ufffe',    //       0x10 -> UNDEFINED
@@ -152,7 +152,7 @@ object PetsciiEncoding {
         '\uf113',    //      0x8A -> FUNCTION KEY 4 (CUS)
         '\uf115',    //      0x8B -> FUNCTION KEY 6 (CUS)
         '\uf117',    //      0x8C -> FUNCTION KEY 8 (CUS)
-        '\n'    ,    //       0x8D -> LINE FEED
+        '\r'    ,    //       0x8D -> CARRIAGE RETURN (SHIFT-RETURN)
         '\u000f',    //      0x8E -> SHIFT IN
         '\ufffe',    //       0x8F -> UNDEFINED
         '\uf105',    //       0x90 -> BLACK COLOR SWITCH (CUS)
@@ -283,7 +283,7 @@ object PetsciiEncoding {
         '\ufffe',    //       0x0A -> UNDEFINED
         '\ufffe',    //       0x0B -> UNDEFINED
         '\ufffe',    //       0x0C -> UNDEFINED
-        '\r'    ,    //       0x0D -> CARRIAGE RETURN
+        '\n'    ,    //       0x0D -> LINE FEED (RETURN)
         '\u000e',    //       0x0E -> SHIFT OUT
         '\ufffe',    //       0x0F -> UNDEFINED
         '\ufffe',    //       0x10 -> UNDEFINED
@@ -411,7 +411,7 @@ object PetsciiEncoding {
         '\uf113',    //       0x8A -> FUNCTION KEY 4 (CUS)
         '\uf115',    //       0x8B -> FUNCTION KEY 6 (CUS)
         '\uf117',    //       0x8C -> FUNCTION KEY 8 (CUS)
-        '\n'    ,    //       0x8D -> LINE FEED
+        '\r'    ,    //       0x8D -> CARRIAGE RETURN (SHIFT-RETURN)
         '\u000f',    //       0x8E -> SHIFT IN
         '\ufffe',    //       0x8F -> UNDEFINED
         '\uf105',    //       0x90 -> BLACK COLOR SWITCH (CUS)
@@ -1061,6 +1061,7 @@ object PetsciiEncoding {
             '}' -> '├'
             '|' -> '│'
             '\\' -> '╲'
+            '\r' -> '\n'        // to make \r (carriage returrn) equivalent to \n (line feed): RETURN ($0d)
             else -> chr
         }
 
@@ -1076,7 +1077,10 @@ object PetsciiEncoding {
                 }
                 else -> {
                     val case = if (lowercase) "lower" else "upper"
-                    throw CharConversionException("no ${case}Petscii character for '${chr}' (${chr.code})")
+                    if(chr.isISOControl())
+                        throw CharConversionException("no ${case}Petscii character for char #${chr.code}")
+                    else
+                        throw CharConversionException("no ${case}Petscii character for char #${chr.code} '${chr}'")
                 }
             }
         }
@@ -1119,7 +1123,10 @@ object PetsciiEncoding {
                 }
                 else -> {
                     val case = if (lowercase) "lower" else "upper"
-                    throw CharConversionException("no ${case}Screencode character for '${chr}' (${chr.code})")
+                    if(chr.isISOControl())
+                        throw CharConversionException("no ${case}Screencode character for char #${chr.code}")
+                    else
+                        throw CharConversionException("no ${case}Screencode character for char #${chr.code} '${chr}'")
                 }
             }
         }

codeGenCpu6502/build.gradle

@@ -30,16 +30,16 @@ dependencies {
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.18"
 
-    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.6.2'
+    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.7.2'
 }
 
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
     test {

codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt

@@ -1026,6 +1026,15 @@ $repeatLabel""")
         val label = "_prog8_breakpoint_${breakpointLabels.size+1}"
         breakpointLabels.add(label)
         out(label)
+        if(options.breakpointCpuInstruction) {
+            val instruction =
+                when(options.compTarget.machine.cpu) {
+                    CpuType.CPU6502 -> "brk"
+                    CpuType.CPU65c02 -> "stp"
+                    else -> throw AssemblyError("invalid cpu type")
+                }
+            out("  $instruction")
+        }
     }
 
     internal fun signExtendAYlsb(valueDt: DataType) {
@@ -2417,8 +2426,7 @@ $repeatLabel""")
                     cmp  #<$number
                     bne  $jumpIfFalseLabel
                     cpy  #>$number
-                    bne  $jumpIfFalseLabel
-                    """)
+                    bne  $jumpIfFalseLabel""")
             }
             is PtIdentifier -> {
                 assignExpressionToRegister(left, RegisterOrPair.AY)
@@ -2426,18 +2434,21 @@ $repeatLabel""")
                     cmp  ${asmVariableName(right)}
                     bne  $jumpIfFalseLabel
                     cpy  ${asmVariableName(right)}+1
-                    bne  $jumpIfFalseLabel
-                    """)
+                    bne  $jumpIfFalseLabel""")
             }
             is PtAddressOf -> {
                 assignExpressionToRegister(left, RegisterOrPair.AY)
                 val name = asmSymbolName(right.identifier)
-                out("""
-                    cmp  #<$name
-                    bne  $jumpIfFalseLabel
-                    cpy  #>$name
-                    bne  $jumpIfFalseLabel
-                    """)
+                if(right.isFromArrayElement) {
+                    TODO("address-of array element $name at ${right.position}")
+                    // assignmentAsmGen.assignAddressOf(target, name, right.arrayIndexExpr)
+                } else {
+                    out("""
+                        cmp  #<$name
+                        bne  $jumpIfFalseLabel
+                        cpy  #>$name
+                        bne  $jumpIfFalseLabel""")
+                }
             }
             else -> {
                 if(left.isSimple()) {
@@ -2518,12 +2529,16 @@ $repeatLabel""")
             is PtAddressOf -> {
                 assignExpressionToRegister(left, RegisterOrPair.AY)
                 val name = asmSymbolName(right.identifier)
-                out("""
-                    cmp  #<$name
-                    bne  +
-                    cpy  #>$name
-                    beq  $jumpIfFalseLabel
-+""")
+                if(right.isFromArrayElement) {
+                    TODO("address-of array element $name at ${right.position}")
+                } else {
+                    out("""
+                        cmp  #<$name
+                        bne  +
+                        cpy  #>$name
+                        beq  $jumpIfFalseLabel
+    +""")
+                }
             }
             else -> {
                 if(left.isSimple()) {
@@ -2849,8 +2864,12 @@ $repeatLabel""")
             is PtAddressOf -> {
                 assignExpressionToRegister(right, RegisterOrPair.AY)
                 val name = asmSymbolName(left.identifier)
-                code("#>$name", "#<$name")
-                return true
+                if(left.isFromArrayElement) {
+                    TODO("address-of array element $name at ${left.position}")
+                } else {
+                    code("#>$name", "#<$name")
+                    return true
+                }
             }
             is PtIdentifier -> {
                 assignExpressionToRegister(right, RegisterOrPair.AY)
@@ -2898,8 +2917,12 @@ $repeatLabel""")
             is PtAddressOf -> {
                 assignExpressionToRegister(left, RegisterOrPair.AY)
                 val name = asmSymbolName(right.identifier)
-                code("#>$name", "#<$name")
-                return true
+                if(right.isFromArrayElement) {
+                    TODO("address-of array element $name at ${right.position}")
+                } else {
+                    code("#>$name", "#<$name")
+                    return true
+                }
             }
             is PtIdentifier -> {
                 assignExpressionToRegister(left, RegisterOrPair.AY)

codeGenCpu6502/src/prog8/codegen/cpu6502/BuiltinFunctionsAsmGen.kt

@@ -41,6 +41,8 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
             "rol2" -> funcRol2(fcall)
             "ror" -> funcRor(fcall)
             "ror2" -> funcRor2(fcall)
+            "setlsb" -> funcSetLsbMsb(fcall, false)
+            "setmsb" -> funcSetLsbMsb(fcall, true)
             "sort" -> funcSort(fcall)
             "reverse" -> funcReverse(fcall)
             "memory" -> funcMemory(fcall, discardResult, resultRegister)
@@ -181,7 +183,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
         asmgen.out("  sta  (+)+0 |  sty  (+)+1")
         asmgen.assignExpressionToRegister(fcall.args[2], RegisterOrPair.AY)     // uword argument
         asmgen.out("""
-            jsr  cx16.jsrfar
+            jsr  cx16.JSRFAR
 +           .word  0
 +           .byte  0""")
         // note that by convention the values in A+Y registers are now the return value of the call.
@@ -609,6 +611,85 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
         asmgen.assignExpressionToVariable(indexer.index, "prog8_lib.${operation}_array_u${dt}._arg_index", DataType.UBYTE)
     }
 
+    private fun funcSetLsbMsb(fcall: PtBuiltinFunctionCall, msb: Boolean) {
+        val target: AsmAssignTarget
+        when(fcall.args[0]) {
+            is PtIdentifier -> {
+                val varname = asmgen.asmVariableName(fcall.args[0] as PtIdentifier) + if(msb) "+1" else ""
+                target = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UBYTE, fcall.definingSub(), fcall.position, variableAsmName = varname)
+            }
+            is PtNumber -> {
+                val num = (fcall.args[0] as PtNumber).number + if(msb) 1 else 0
+                val mem = PtMemoryByte(fcall.position)
+                mem.add(PtNumber(DataType.UBYTE, num, fcall.position))
+                target = AsmAssignTarget(TargetStorageKind.MEMORY, asmgen, DataType.UBYTE, fcall.definingSub(), fcall.position, memory = mem)
+            }
+            is PtAddressOf -> {
+                val mem = PtMemoryByte(fcall.position)
+                if(msb) {
+                    val address = PtBinaryExpression("+", DataType.UWORD, fcall.args[0].position)
+                    address.add(fcall.args[0])
+                    address.add(PtNumber(address.type, 1.0, fcall.args[0].position))
+                    mem.add(address)
+                } else {
+                    mem.add(fcall.args[0])
+                }
+                target = AsmAssignTarget(TargetStorageKind.MEMORY, asmgen, DataType.UBYTE, fcall.definingSub(), fcall.position, memory = mem)
+            }
+            is PtArrayIndexer -> {
+                val indexer = fcall.args[0] as PtArrayIndexer
+                require(!indexer.usesPointerVariable)
+                val elementSize: Int
+                val msbAdd: Int
+                if(indexer.splitWords) {
+                    val arrayVariable = indexer.variable
+                    indexer.children[0] = PtIdentifier(arrayVariable.name + if(msb) "_msb" else "_lsb", DataType.ARRAY_UB, arrayVariable.position)
+                    indexer.children[0].parent = indexer
+                    elementSize = 1
+                    msbAdd = 0
+                } else {
+                    elementSize = 2
+                    msbAdd = if(msb) 1 else 0
+                }
+
+                // double the index because of word array (if not split), add one if msb (if not split)
+                val constIndexNum = (indexer.index as? PtNumber)?.number
+                if(constIndexNum!=null) {
+                    indexer.children[1] = PtNumber(indexer.index.type, constIndexNum*elementSize + msbAdd, indexer.position)
+                    indexer.children[1].parent = indexer
+                } else {
+                    val multipliedIndex: PtExpression
+                    if(elementSize==1) {
+                        multipliedIndex = indexer.index
+                    } else {
+                        multipliedIndex = PtBinaryExpression("<<", indexer.index.type, indexer.position)
+                        multipliedIndex.add(indexer.index)
+                        multipliedIndex.add(PtNumber(DataType.UBYTE, 1.0, indexer.position))
+                    }
+                    if(msbAdd>0) {
+                        val msbIndex = PtBinaryExpression("+", indexer.index.type, indexer.position)
+                        msbIndex.add(multipliedIndex)
+                        msbIndex.add(PtNumber(DataType.UBYTE, msbAdd.toDouble(), indexer.position))
+                        indexer.children[1] = msbIndex
+                        msbIndex.parent = indexer
+                    } else {
+                        indexer.children[1] = multipliedIndex
+                        multipliedIndex.parent=indexer
+                    }
+                }
+                target = AsmAssignTarget(TargetStorageKind.ARRAY, asmgen, DataType.UBYTE, fcall.definingSub(), fcall.position, array = indexer)
+            }
+            else -> throw AssemblyError("setlsb/setmsb on weird target ${fcall.args[0]}")
+        }
+
+        if(fcall.args[1].asConstInteger() == 0) {
+            assignAsmGen.assignConstantByte(target, 0)
+        } else {
+            asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.A, false)
+            assignAsmGen.assignRegisterByte(target, CpuRegister.A, false)
+        }
+    }
+
     private fun funcSgn(fcall: PtBuiltinFunctionCall, resultRegister: RegisterOrPair?, scope: IPtSubroutine?) {
         translateArguments(fcall, scope)
         val dt = fcall.args.single().type
@@ -986,17 +1067,17 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
         } else {
             when(resultRegister) {
                 null, RegisterOrPair.A -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
                     asmgen.out("  tya")
                 }
                 RegisterOrPair.X -> {
                     asmgen.out("  pha")
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AX)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AX)
                     asmgen.out("  pla")
                 }
                 RegisterOrPair.Y -> {
                     asmgen.out("  pha")
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
                     asmgen.out("  pla")
                 }
                 else -> throw AssemblyError("invalid reg")
@@ -1032,35 +1113,35 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
         } else {
             when(resultRegister) {
                 null, RegisterOrPair.A -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
                     // NOTE: we rely on the fact that the above assignment to AY, assigns the Lsb to A as the last instruction.
                     //       this is required because the compiler assumes the status bits are set according to what A is (lsb)
                     //       and will not generate another cmp when lsb() is directly used inside a comparison expression.
                 }
                 RegisterOrPair.X -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.XY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.XY)
                     // NOTE: we rely on the fact that the above assignment to XY, assigns the Lsb to X as the last instruction.
                     //       this is required because the compiler assumes the status bits are set according to what X is (lsb)
                     //       and will not generate another cmp when lsb() is directly used inside a comparison expression.
                 }
                 RegisterOrPair.Y -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
                     asmgen.out("  tay |  cpy  #0")
                 }
                 RegisterOrPair.AY -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
                     asmgen.out("  ldy  #0 |  cmp  #0")
                 }
                 RegisterOrPair.AX -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.AX)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.AX)
                     asmgen.out("  ldx  #0 |  cmp  #0")
                 }
                 RegisterOrPair.XY -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), RegisterOrPair.XY)
+                    asmgen.assignExpressionToRegister(arg, RegisterOrPair.XY)
                     asmgen.out("  ldy  #0 |  cpx  #0")
                 }
                 in Cx16VirtualRegisters -> {
-                    asmgen.assignExpressionToRegister(fcall.args.single(), resultRegister)
+                    asmgen.assignExpressionToRegister(arg, resultRegister)
                     val zero = PtNumber(DataType.UBYTE, 0.0, Position.DUMMY)
                     zero.parent=fcall
                     assignAsmGen.assignExpressionToVariable(zero, "cx16.${resultRegister.toString().lowercase()}H", DataType.UBYTE)

codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt

@@ -141,13 +141,14 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
                     }
                     is PtIdentifier -> {
                         val sourceName = asmgen.asmVariableName(value)
+                        // note: cannot use X register here to store A because it might be used for other arguments
                         asmgen.out("""
-                            tax
+                            pha
                             clc
                             lda  $sourceName
                             beq  +
                             sec  
-+                           txa""")
++                           pla""")
                     }
                     else -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.A)

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt

@@ -49,7 +49,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                     DataType.WORD -> assignVariableWord(assign.target, variable, assign.source.datatype)
                     DataType.UWORD -> {
                         if(assign.source.datatype in PassByReferenceDatatypes)
-                            assignAddressOf(assign.target, variable)
+                            assignAddressOf(assign.target, variable, null, null)
                         else
                             assignVariableWord(assign.target, variable, assign.source.datatype)
                     }
@@ -88,8 +88,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                         assignRegisterpairWord(assign.target, RegisterOrPair.AY)
                     } else {
                         asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y)
-                        asmgen.out("  lda  ${arrayVarName}_lsb,y |  tax |  lda  ${arrayVarName}_msb,y |  tay |  txa")
-                        assignRegisterpairWord(assign.target, RegisterOrPair.AY)
+                        asmgen.out("  lda  ${arrayVarName}_lsb,y |  ldx  ${arrayVarName}_msb,y")
+                        assignRegisterpairWord(assign.target, RegisterOrPair.AX)
                     }
                     return
                 }
@@ -122,8 +122,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                         }
                         in WordDatatypes  -> {
                             asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y)
-                            asmgen.out("  lda  $arrayVarName,y |  tax |  lda  $arrayVarName+1,y |  tay |  txa")
-                            assignRegisterpairWord(assign.target, RegisterOrPair.AY)
+                            asmgen.out("  lda  $arrayVarName,y |  ldx  $arrayVarName+1,y")
+                            assignRegisterpairWord(assign.target, RegisterOrPair.AX)
                         }
                         DataType.FLOAT -> {
                             asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.A)
@@ -181,7 +181,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
         when(val value = assign.source.expression!!) {
             is PtAddressOf -> {
                 val sourceName = asmgen.asmSymbolName(value.identifier)
-                assignAddressOf(assign.target, sourceName)
+                val arrayDt = value.identifier.type
+                assignAddressOf(assign.target, sourceName, arrayDt, value.arrayIndexExpr)
             }
             is PtNumber -> throw AssemblyError("source kind should have been literalnumber")
             is PtIdentifier -> throw AssemblyError("source kind should have been variable")
@@ -543,9 +544,28 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                     return true
                 }
                 in WordDatatypes -> {
-                    asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
-                    asmgen.out("  jsr  math.multiply_words")
-                    assignRegisterpairWord(target, RegisterOrPair.AY)
+                    if(expr.definingBlock()!!.veraFxMuls) {
+                        // cx16 verafx hardware mul
+                        if(expr.right.isSimple()) {
+                            asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.R0, expr.left.type in SignedDatatypes)
+                            asmgen.assignExpressionToRegister(expr.right, RegisterOrPair.R1, expr.left.type in SignedDatatypes)
+                        } else {
+                            asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.left.type in SignedDatatypes)
+                            asmgen.saveRegisterStack(CpuRegister.A, false)
+                            asmgen.saveRegisterStack(CpuRegister.Y, false)
+                            asmgen.assignExpressionToRegister(expr.right, RegisterOrPair.R1, expr.left.type in SignedDatatypes)
+                            asmgen.restoreRegisterStack(CpuRegister.Y, false)
+                            asmgen.restoreRegisterStack(CpuRegister.A, false)
+                            asmgen.out("  sta  cx16.r0 |  sty  cx16.r0+1")
+                        }
+                        asmgen.out("  jsr  verafx.muls")
+                        assignRegisterpairWord(target, RegisterOrPair.AY)
+                        return true
+                    } else {
+                        asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
+                        asmgen.out("  jsr  math.multiply_words")
+                        assignRegisterpairWord(target, RegisterOrPair.AY)
+                    }
                     return true
                 }
                 else -> return false
@@ -567,8 +587,17 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                         asmgen.out("  jsr  math.mul_word_${value}")
                     }
                     else {
-                        asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
-                        asmgen.out("  jsr  math.multiply_words")
+                        if(expr.definingBlock()!!.veraFxMuls){
+                            // cx16 verafx hardware mul
+                            asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "cx16.r1")
+                            asmgen.out("""
+                                sta  cx16.r0
+                                sty  cx16.r0+1
+                                jsr  verafx.muls""")
+                        } else {
+                            asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
+                            asmgen.out("  jsr  math.multiply_words")
+                        }
                     }
                     assignRegisterpairWord(target, RegisterOrPair.AY)
                     return true
@@ -741,19 +770,31 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 else -> {
                     val rightArrayIndexer = expr.right as? PtArrayIndexer
                     if(rightArrayIndexer!=null && rightArrayIndexer.type in ByteDatatypes && left.type in ByteDatatypes) {
-                        // special optimization for  bytevalue +/- bytearr[y] :  no need to use a tempvar, just use adc array,y or sbc array,y
+                        // special optimization for  bytevalue +/- bytearr[y] :  no need to use a tempvar, just use adc array,y or sbc array,y  or  adc (ptr),y / sbc (ptr),y
                         assignExpressionToRegister(left, RegisterOrPair.A, left.type==DataType.BYTE)
-                        asmgen.out("  pha")
+                        if(!rightArrayIndexer.index.isSimple()) asmgen.out("  pha")
                         asmgen.assignExpressionToRegister(rightArrayIndexer.index, RegisterOrPair.Y, false)
-                        asmgen.out("  pla")
-                        val arrayvarname = if(rightArrayIndexer.usesPointerVariable)
+                        if(!rightArrayIndexer.index.isSimple()) asmgen.out("  pla")
+                        if(rightArrayIndexer.usesPointerVariable && !asmgen.isZpVar(rightArrayIndexer.variable)) {
+                            asmgen.out("""
+                                ldx  ${rightArrayIndexer.variable.name}
+                                stx  P8ZP_SCRATCH_W1
+                                ldx  ${rightArrayIndexer.variable.name}+1
+                                stx  P8ZP_SCRATCH_W1+1""")
+                            if (expr.operator == "+")
+                                asmgen.out("  clc |  adc  (P8ZP_SCRATCH_W1),y")
+                            else
+                                asmgen.out("  sec |  sbc  (P8ZP_SCRATCH_W1),y")
+                        } else {
+                            val arrayvarname = if (rightArrayIndexer.usesPointerVariable)
                                 "(${rightArrayIndexer.variable.name})"
                             else
                                 asmgen.asmSymbolName(rightArrayIndexer.variable)
-                        if (expr.operator == "+")
-                            asmgen.out("  clc |  adc  $arrayvarname,y")
-                        else
-                            asmgen.out("  sec |  sbc  $arrayvarname,y")
+                            if (expr.operator == "+")
+                                asmgen.out("  clc |  adc  $arrayvarname,y")
+                            else
+                                asmgen.out("  sec |  sbc  $arrayvarname,y")
+                        }
                         assignRegisterByte(target, CpuRegister.A, dt in SignedDatatypes)
                     } else {
                         assignExpressionToVariable(right, "P8ZP_SCRATCH_B1", right.type)
@@ -794,28 +835,32 @@ internal class AssignmentAsmGen(private val program: PtProgram,
 
             when (right) {
                 is PtAddressOf -> {
-                    assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD)
                     val symbol = asmgen.asmVariableName(right.identifier)
-                    if(expr.operator=="+")
-                        asmgen.out("""
-                                clc
-                                adc  #<$symbol
-                                tax
-                                tya
-                                adc  #>$symbol
-                                tay
-                                txa""")
-                    else
-                        asmgen.out("""
-                                sec
-                                sbc  #<$symbol
-                                tax
-                                tya
-                                sbc  #>$symbol
-                                tay
-                                txa""")
-                    assignRegisterpairWord(target, RegisterOrPair.AY)
-                    return true
+                    if(right.isFromArrayElement) {
+                        TODO("address-of array element $symbol at ${right.position}")
+                    } else {
+                        assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD)
+                        if(expr.operator=="+")
+                            asmgen.out("""
+                                    clc
+                                    adc  #<$symbol
+                                    tax
+                                    tya
+                                    adc  #>$symbol
+                                    tay
+                                    txa""")
+                        else
+                            asmgen.out("""
+                                    sec
+                                    sbc  #<$symbol
+                                    tax
+                                    tya
+                                    sbc  #>$symbol
+                                    tay
+                                    txa""")
+                        assignRegisterpairWord(target, RegisterOrPair.AY)
+                        return true
+                    }
                 }
                 is PtIdentifier -> {
                     val symname = asmgen.asmVariableName(right)
@@ -868,10 +913,34 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 is PtTypeCast -> {
                     val castedValue = right.value
                     if(right.type in WordDatatypes && castedValue.type in ByteDatatypes && castedValue is PtIdentifier) {
-                        val castedSymname = asmgen.asmVariableName(castedValue)
-                        assignExpressionToRegister(left, RegisterOrPair.AY, dt == DataType.WORD)
-                        if (expr.operator == "+")
-                            asmgen.out(
+                        if(right.type in SignedDatatypes) {
+                            // we need to sign extend, do this via temporary word variable
+                            asmgen.assignExpressionToVariable(right, "P8ZP_SCRATCH_W1", DataType.WORD)
+                            assignExpressionToRegister(left, RegisterOrPair.AY, dt == DataType.WORD)
+                            if(expr.operator=="+") {
+                                asmgen.out("""
+                                clc
+                                adc  P8ZP_SCRATCH_W1
+                                tax
+                                tya
+                                adc  P8ZP_SCRATCH_W1+1
+                                tay
+                                txa""")
+                            } else if(expr.operator=="-") {
+                                asmgen.out("""
+                                sec
+                                sbc  P8ZP_SCRATCH_W1
+                                tax
+                                tya
+                                sbc  P8ZP_SCRATCH_W1+1
+                                tay
+                                txa""")
+                            }
+                        } else {
+                            assignExpressionToRegister(left, RegisterOrPair.AY, dt == DataType.WORD)
+                            val castedSymname = asmgen.asmVariableName(castedValue)
+                            if (expr.operator == "+")
+                                asmgen.out(
                                 """
                                     clc
                                     adc  $castedSymname
@@ -879,8 +948,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                                     iny
 +"""
                             )
-                        else
-                            asmgen.out(
+                            else
+                                asmgen.out(
                                 """
                                     sec
                                     sbc  $castedSymname
@@ -888,6 +957,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                                     dey
 +"""
                             )
+                        }
                         assignRegisterpairWord(target, RegisterOrPair.AY)
                         return true
                     }
@@ -1526,11 +1596,6 @@ internal class AssignmentAsmGen(private val program: PtProgram,
     }
 
     private fun attemptAssignToByteCompareZero(expr: PtBinaryExpression, assign: AsmAssignment): Boolean {
-        // TODO optimized code for   (word1 & word2) == 0  :
-//        if(expr.left.type in WordDatatypes && (expr.operator=="==" || expr.operator=="!=") && expr.left is PtBinaryExpression) {
-//            ...
-//        }
-
         when (expr.operator) {
             "==" -> {
                 when(val dt = expr.left.type) {
@@ -1612,7 +1677,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 // use subroutine
                 assignExpressionToRegister(containment.element, RegisterOrPair.A, elementDt == DataType.BYTE)
                 asmgen.saveRegisterStack(CpuRegister.A, true)
-                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position,"P8ZP_SCRATCH_W1"), varname)
+                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position,"P8ZP_SCRATCH_W1"), varname, null, null)
                 asmgen.restoreRegisterStack(CpuRegister.A, false)
                 val stringVal = (variable as PtVariable).value as PtString
                 asmgen.out("  ldy  #${stringVal.value.length}")
@@ -1625,7 +1690,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
             DataType.ARRAY_B, DataType.ARRAY_UB -> {
                 assignExpressionToRegister(containment.element, RegisterOrPair.A, elementDt == DataType.BYTE)
                 asmgen.saveRegisterStack(CpuRegister.A, true)
-                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position, "P8ZP_SCRATCH_W1"), varname)
+                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position, "P8ZP_SCRATCH_W1"), varname, null, null)
                 asmgen.restoreRegisterStack(CpuRegister.A, false)
                 asmgen.out("  ldy  #$numElements")
                 asmgen.out("  jsr  prog8_lib.containment_bytearray")
@@ -1633,7 +1698,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
             }
             DataType.ARRAY_W, DataType.ARRAY_UW -> {
                 assignExpressionToVariable(containment.element, "P8ZP_SCRATCH_W1", elementDt)
-                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position, "P8ZP_SCRATCH_W2"), varname)
+                assignAddressOf(AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UWORD, containment.definingISub(), symbol.astNode.position, "P8ZP_SCRATCH_W2"), varname, null, null)
                 asmgen.out("  ldy  #$numElements")
                 asmgen.out("  jsr  prog8_lib.containment_wordarray")
                 return
@@ -1765,8 +1830,9 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 RegisterOrPair.AY,
                 RegisterOrPair.XY,
                 in Cx16VirtualRegisters -> {
-                    // cast an ubyte value to a 16 bits register, just assign it and make use of the value extension
-                    return assignExpressionToRegister(value, target.register!!, false)
+                    assignExpressionToRegister(value, RegisterOrPair.A, false)
+                    assignRegisterByte(target, CpuRegister.A, false)
+                    return
                 }
                 else -> {}
             }
@@ -1804,13 +1870,13 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                         assignCastViaLsbFunc(value, target)
                     } else if(valueDt in WordDatatypes && targetDt in WordDatatypes) {
                         // word to word, just assign
-                        assignExpressionToRegister(value, target.register!!, targetDt==DataType.BYTE || targetDt==DataType.WORD)
+                        assignExpressionToRegister(value, target.register!!, valueDt in SignedDatatypes)
                     } else if(valueDt in ByteDatatypes && targetDt in ByteDatatypes) {
                         // byte to byte, just assign
-                        assignExpressionToRegister(value, target.register!!, targetDt==DataType.BYTE || targetDt==DataType.WORD)
+                        assignExpressionToRegister(value, target.register!!, valueDt in SignedDatatypes)
                     } else if(valueDt in ByteDatatypes && targetDt in WordDatatypes) {
                         // byte to word, just assign
-                        assignExpressionToRegister(value, target.register!!, targetDt==DataType.WORD)
+                        assignExpressionToRegister(value, target.register!!, valueDt==DataType.WORD)
                     } else
                         throw AssemblyError("can't cast $valueDt to $targetDt, this should have been checked in the astchecker")
                 }
@@ -2160,12 +2226,44 @@ internal class AssignmentAsmGen(private val program: PtProgram,
         }
     }
 
-    private fun assignAddressOf(target: AsmAssignTarget, sourceName: String) {
+    private fun assignAddressOf(target: AsmAssignTarget, sourceName: String, arrayDt: DataType?, arrayIndexExpr: PtExpression?) {
+        val offset = if(arrayIndexExpr!=null) {
+            val constIndex = arrayIndexExpr.asConstInteger()
+            if(constIndex!=null) {
+                if(arrayDt in SplitWordArrayTypes)
+                    constIndex
+                else
+                    program.memsizer.memorySize(arrayDt!!, constIndex)  // add arrayIndexExpr * elementsize  to the address of the array variable.
+            } else {
+                val eltSize = program.memsizer.memorySize(ArrayToElementTypes.getValue(arrayDt!!))
+                assignExpressionToVariable(arrayIndexExpr, "P8ZP_SCRATCH_W1", DataType.UWORD)
+                when(eltSize) {
+                    1 -> {}
+                    2 -> {
+                        if(arrayDt !in SplitWordArrayTypes)
+                            asmgen.out("  asl  P8ZP_SCRATCH_W1 |  rol  P8ZP_SCRATCH_W1+1")
+                    }
+                    else -> TODO("address-of array element $sourceName size $eltSize with non-const index at ${target.position}")
+                }
+                asmgen.out("""
+                    lda  #<$sourceName
+                    clc
+                    adc  P8ZP_SCRATCH_W1
+                    tax
+                    lda  #>$sourceName
+                    adc  P8ZP_SCRATCH_W1+1
+                    tay
+                    txa""")
+                assignRegisterpairWord(target, RegisterOrPair.AY)
+                return
+            }
+        } else 0
+
         when(target.kind) {
             TargetStorageKind.VARIABLE -> {
                 asmgen.out("""
-                        lda  #<$sourceName
-                        ldy  #>$sourceName
+                        lda  #<$sourceName+$offset
+                        ldy  #>$sourceName+$offset
                         sta  ${target.asmVarname}
                         sty  ${target.asmVarname}+1
                     """)
@@ -2174,20 +2272,20 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 throw AssemblyError("can't store word into memory byte")
             }
             TargetStorageKind.ARRAY -> {
-                asmgen.out("  lda  #<$sourceName |  ldy #>$sourceName")
+                asmgen.out("  lda  #<$sourceName+$offset |  ldy #>$sourceName+$offset")
                 assignRegisterpairWord(target, RegisterOrPair.AY)
             }
             TargetStorageKind.REGISTER -> {
                 when(target.register!!) {
-                    RegisterOrPair.AX -> asmgen.out("  ldx  #>$sourceName |  lda  #<$sourceName")
-                    RegisterOrPair.AY -> asmgen.out("  ldy  #>$sourceName |  lda  #<$sourceName")
-                    RegisterOrPair.XY -> asmgen.out("  ldy  #>$sourceName |  ldx  #<$sourceName")
+                    RegisterOrPair.AX -> asmgen.out("  ldx  #>$sourceName+$offset |  lda  #<$sourceName+$offset")
+                    RegisterOrPair.AY -> asmgen.out("  ldy  #>$sourceName+$offset |  lda  #<$sourceName+$offset")
+                    RegisterOrPair.XY -> asmgen.out("  ldy  #>$sourceName+$offset |  ldx  #<$sourceName+$offset")
                     in Cx16VirtualRegisters -> {
                         asmgen.out(
                             """
-                            lda  #<$sourceName
+                            lda  #<$sourceName+$offset
                             sta  cx16.${target.register.toString().lowercase()}
-                            lda  #>$sourceName
+                            lda  #>$sourceName+$offset
                             sta  cx16.${target.register.toString().lowercase()}+1
                         """)
                     }
@@ -2227,15 +2325,22 @@ internal class AssignmentAsmGen(private val program: PtProgram,
     }
 
     private fun assignVariableWord(target: AsmAssignTarget, sourceName: String, sourceDt: DataType) {
+        if(sourceDt==DataType.BYTE) {
+            // need to sign extend
+            asmgen.out("  lda  $sourceName")
+            asmgen.signExtendAYlsb(DataType.BYTE)
+            assignRegisterpairWord(target, RegisterOrPair.AY)
+            return
+        }
         require(sourceDt in WordDatatypes || sourceDt==DataType.UBYTE)
         when(target.kind) {
             TargetStorageKind.VARIABLE -> {
                 if(sourceDt==DataType.UBYTE) {
                     asmgen.out("  lda  $sourceName |  sta  ${target.asmVarname}")
                     if(asmgen.isTargetCpu(CpuType.CPU65c02))
-                        asmgen.out("  stz  ${target.asmVarname}")
+                        asmgen.out("  stz  ${target.asmVarname}+1")
                     else
-                        asmgen.out("  lda  #0 |  sta  ${target.asmVarname}")
+                        asmgen.out("  lda  #0 |  sta  ${target.asmVarname}+1")
                 }
                 else
                     asmgen.out("""
@@ -2270,16 +2375,6 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                                     lda  $sourceName+1
                                     sta  ${target.asmVarname}+$scaledIdx+1""")
                         }
-                        DataType.FLOAT -> {
-                            asmgen.out("""
-                                lda  #<$sourceName
-                                ldy  #>$sourceName
-                                sta  P8ZP_SCRATCH_W1
-                                sty  P8ZP_SCRATCH_W1+1
-                                lda  #<(${target.asmVarname}+$scaledIdx)
-                                ldy  #>(${target.asmVarname}+$scaledIdx)
-                                jsr  floats.copy_float""")
-                        }
                         else -> throw AssemblyError("weird target variable type ${target.datatype}")
                     }
                 }
@@ -2305,20 +2400,6 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                                     lda  $sourceName+1
                                     sta  ${target.asmVarname}+1,y""")
                         }
-                        DataType.FLOAT -> {
-                            asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.A)
-                            asmgen.out("""
-                                ldy  #<$sourceName
-                                sty  P8ZP_SCRATCH_W1
-                                ldy  #>$sourceName
-                                sty  P8ZP_SCRATCH_W1+1
-                                ldy  #>${target.asmVarname}
-                                clc
-                                adc  #<${target.asmVarname}
-                                bcc  +
-                                iny
-+                               jsr  floats.copy_float""")
-                        }
                         else -> throw AssemblyError("weird dt")
                     }
                 }
@@ -2710,68 +2791,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
             }
             TargetStorageKind.ARRAY -> {
                 if(assignAsWord)
-                    TODO("assign register as word into Array not yet supported")
-                if(target.array!!.splitWords)
-                    TODO("assign register into split words ${target.position}")
-                if(assignsIndexedPointerVar(target)) {
-                    if (target.constArrayIndexValue!=null) {
-                        when (register) {
-                            CpuRegister.A -> {}
-                            CpuRegister.X -> asmgen.out(" txa")
-                            CpuRegister.Y -> asmgen.out(" tya")
-                        }
-                        if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
-                            asmgen.out("  ldy  #${target.constArrayIndexValue} |  sta  (${target.asmVarname}),y")
-                        } else {
-                            asmgen.out("""
-                                ldy  ${target.asmVarname}
-                                sty  P8ZP_SCRATCH_W1
-                                ldy  ${target.asmVarname}+1
-                                sty  P8ZP_SCRATCH_W1+1
-                                ldy  #${target.constArrayIndexValue}
-                                sta  (P8ZP_SCRATCH_W1),y""")
-                        }
-                    }
-                    else {
-                        when (register) {
-                            CpuRegister.A -> {}
-                            CpuRegister.X -> asmgen.out(" txa")
-                            CpuRegister.Y -> asmgen.out(" tya")
-                        }
-                        val indexVar = target.array.index as PtIdentifier
-                        if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
-                            asmgen.out("  ldy  ${asmgen.asmVariableName(indexVar)} |  sta  (${target.asmVarname}),y")
-                        } else {
-                            asmgen.out("""
-                                ldy  ${target.asmVarname}
-                                sty  P8ZP_SCRATCH_W1
-                                ldy  ${target.asmVarname}+1
-                                sty  P8ZP_SCRATCH_W1+1
-                                ldy  ${asmgen.asmVariableName(indexVar)}
-                                sta  (P8ZP_SCRATCH_W1),y""")
-                        }
-                    }
-                    return
-                } else {
-                    // assign regular array indexing
-                    if (target.constArrayIndexValue!=null) {
-                        when (register) {
-                            CpuRegister.A -> {}
-                            CpuRegister.X -> asmgen.out(" txa")
-                            CpuRegister.Y -> asmgen.out(" tya")
-                        }
-                        asmgen.out("  sta  ${target.asmVarname}+${target.constArrayIndexValue}")
-                    }
-                    else {
-                        when (register) {
-                            CpuRegister.A -> {}
-                            CpuRegister.X -> asmgen.out(" txa")
-                            CpuRegister.Y -> asmgen.out(" tya")
-                        }
-                        val indexVar = target.array.index as PtIdentifier
-                        asmgen.out("  ldy  ${asmgen.asmVariableName(indexVar)} |  sta  ${target.asmVarname},y")
-                    }
-                }
+                    TODO("assign register byte as word into Array not yet supported")
+                assignRegisterByteToArray(target, register)
             }
             TargetStorageKind.REGISTER -> {
                 when(register) {
@@ -2919,6 +2940,79 @@ internal class AssignmentAsmGen(private val program: PtProgram,
         }
     }
 
+    private fun assignRegisterByteToArray(target: AsmAssignTarget, register: CpuRegister) {
+        if(target.array!!.splitWords)
+            throw AssemblyError("cannot assign byte to split word array here ${target.position}")
+
+        if(assignsIndexedPointerVar(target)) {
+            if (target.constArrayIndexValue!=null) {
+                when (register) {
+                    CpuRegister.A -> {}
+                    CpuRegister.X -> asmgen.out(" txa")
+                    CpuRegister.Y -> asmgen.out(" tya")
+                }
+                if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
+                    asmgen.out("  ldy  #${target.constArrayIndexValue} |  sta  (${target.asmVarname}),y")
+                } else {
+                    asmgen.out("""
+                                ldy  ${target.asmVarname}
+                                sty  P8ZP_SCRATCH_W1
+                                ldy  ${target.asmVarname}+1
+                                sty  P8ZP_SCRATCH_W1+1
+                                ldy  #${target.constArrayIndexValue}
+                                sta  (P8ZP_SCRATCH_W1),y""")
+                }
+            }
+            else {
+                when (register) {
+                    CpuRegister.A -> {}
+                    CpuRegister.X -> asmgen.out(" txa")
+                    CpuRegister.Y -> asmgen.out(" tya")
+                }
+                val indexVar = target.array.index as PtIdentifier
+                if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
+                    asmgen.out("  ldy  ${asmgen.asmVariableName(indexVar)} |  sta  (${target.asmVarname}),y")
+                } else {
+                    asmgen.out("""
+                                ldy  ${target.asmVarname}
+                                sty  P8ZP_SCRATCH_W1
+                                ldy  ${target.asmVarname}+1
+                                sty  P8ZP_SCRATCH_W1+1
+                                ldy  ${asmgen.asmVariableName(indexVar)}
+                                sta  (P8ZP_SCRATCH_W1),y""")
+                }
+            }
+            return
+        } else {
+            // assign regular array indexing
+            if (target.constArrayIndexValue!=null) {
+                when (register) {
+                    CpuRegister.A -> {}
+                    CpuRegister.X -> asmgen.out(" txa")
+                    CpuRegister.Y -> asmgen.out(" tya")
+                }
+                asmgen.out("  sta  ${target.asmVarname}+${target.constArrayIndexValue}")
+            }
+            else {
+                when (register) {
+                    CpuRegister.A -> {}
+                    CpuRegister.X -> asmgen.out(" txa")
+                    CpuRegister.Y -> asmgen.out(" tya")
+                }
+                val indexVar = target.array.index as? PtIdentifier
+                if(indexVar!=null) {
+                    asmgen.out("  ldy  ${asmgen.asmVariableName(indexVar)} |  sta  ${target.asmVarname},y")
+                } else {
+                    require(target.array.index.type in ByteDatatypes)
+                    asmgen.saveRegisterStack(register, false)
+                    asmgen.assignExpressionToRegister(target.array.index, RegisterOrPair.Y, false)
+                    asmgen.restoreRegisterStack(CpuRegister.A, false)
+                    asmgen.out("  sta  ${target.asmVarname},y")
+                }
+            }
+        }
+    }
+
     internal fun assignRegisterpairWord(target: AsmAssignTarget, regs: RegisterOrPair) {
         require(target.datatype in NumericDatatypes || target.datatype in PassByReferenceDatatypes) {
             "assign target must be word type ${target.position}"
@@ -3198,7 +3292,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
         }
     }
 
-    private fun assignConstantByte(target: AsmAssignTarget, byte: Int) {
+    internal fun assignConstantByte(target: AsmAssignTarget, byte: Int) {
         if(byte==0 && asmgen.isTargetCpu(CpuType.CPU65c02)) {
             // optimize setting zero value for this cpu
             when(target.kind) {
@@ -3226,14 +3320,14 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                         return
                     }
                     if(target.array!!.splitWords)
-                        TODO("assign into split words ${target.position}")
+                        throw AssemblyError("cannot assign byte to split word array here ${target.position}")
                     if (target.constArrayIndexValue!=null) {
                         val indexValue = target.constArrayIndexValue!!
                         asmgen.out("  stz  ${target.asmVarname}+$indexValue")
                     }
                     else {
-                        asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UBYTE, CpuRegister.Y)
-                        asmgen.out("  lda  #0 |  sta  ${target.asmVarname},y")
+                        asmgen.assignExpressionToRegister(target.array.index, RegisterOrPair.X, false)
+                        asmgen.out("  stz  ${target.asmVarname},x")
                     }
                 }
                 TargetStorageKind.REGISTER -> when(target.register!!) {
@@ -3299,17 +3393,11 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                 RegisterOrPair.XY -> asmgen.out("  ldy  #0 |  ldx  #${byte.toHex()}")
                 RegisterOrPair.FAC1, RegisterOrPair.FAC2 -> throw AssemblyError("expected typecasted byte to float")
                 in Cx16VirtualRegisters -> {
-                    asmgen.out(
-                        "  lda  #${byte.toHex()} |  sta  cx16.${
-                            target.register.toString().lowercase()
-                        }")
+                    asmgen.out("  lda  #${byte.toHex()} |  sta  cx16.${target.register.toString().lowercase()}")
                     if(asmgen.isTargetCpu(CpuType.CPU65c02))
                         asmgen.out("  stz  cx16.${target.register.toString().lowercase()}+1\n")
                     else
-                        asmgen.out(
-                            "  lda  #0 |  sta  cx16.${
-                                target.register.toString().lowercase()
-                            }+1\n")
+                        asmgen.out("  lda  #0 |  sta  cx16.${target.register.toString().lowercase()}+1\n")
                 }
                 else -> throw AssemblyError("weird register")
             }
@@ -3582,9 +3670,10 @@ internal class AssignmentAsmGen(private val program: PtProgram,
         }
     }
 
-    private fun storeRegisterAInMemoryAddress(memoryAddress: PtMemoryByte) {
+    internal fun storeRegisterAInMemoryAddress(memoryAddress: PtMemoryByte) {
         val addressExpr = memoryAddress.address
         val addressLv = addressExpr as? PtNumber
+        val addressOf = addressExpr as? PtAddressOf
 
         fun storeViaExprEval() {
             when(addressExpr) {
@@ -3606,10 +3695,29 @@ internal class AssignmentAsmGen(private val program: PtProgram,
             addressLv != null -> {
                 asmgen.out("  sta  ${addressLv.number.toHex()}")
             }
+            addressOf != null -> {
+                if(addressOf.isFromArrayElement) {
+                    TODO("address-of array element $addressOf")
+                } else {
+                    asmgen.out("  sta  ${asmgen.asmSymbolName(addressOf.identifier)}")
+                }
+            }
             addressExpr is PtIdentifier -> {
                 asmgen.storeAIntoPointerVar(addressExpr)
             }
             addressExpr is PtBinaryExpression -> {
+                if(addressExpr.operator=="+" || addressExpr.operator=="-") {
+                    val addrOf = addressExpr.left as? PtAddressOf
+                    val offset = (addressExpr.right as? PtNumber)?.number?.toInt()
+                    if(addrOf!=null && offset!=null) {
+                        if(addrOf.isFromArrayElement) {
+                            TODO("address-of array element $addrOf")
+                        } else {
+                            asmgen.out("  sta  ${asmgen.asmSymbolName(addrOf.identifier)}${addressExpr.operator}${offset}")
+                            return
+                        }
+                    }
+                }
                 if(!asmgen.tryOptimizedPointerAccessWithA(addressExpr, addressExpr.operator, true))
                     storeViaExprEval()
             }

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt

@@ -83,19 +83,20 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                         }
                     }
                     in WordDatatypes -> {
+                        val block = target.origAstTarget?.definingBlock()
                         when(value.kind) {
-                            SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(target.asmVarname, target.datatype, operator, value.number!!.number.toInt())
-                            SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, value.asmVarname, value.datatype)
-                            SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, regName(value), value.datatype)
+                            SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(target.asmVarname, target.datatype, operator, value.number!!.number.toInt(), block)
+                            SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, value.asmVarname, value.datatype, block)
+                            SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, regName(value), value.datatype, block)
                             SourceStorageKind.MEMORY -> inplacemodificationWordWithMemread(target.asmVarname, target.datatype, operator, value.memory!!)
-                            SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.array!!)
+                            SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.array!!, block)
                             SourceStorageKind.EXPRESSION -> {
                                 if(value.expression is PtTypeCast) {
                                     if (tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) return
-                                    inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression)
+                                    inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression, block)
                                 }
                                 else {
-                                    inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression!!)
+                                    inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression!!, block)
                                 }
                             }
                         }
@@ -230,18 +231,19 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                 }
                             }
                             in WordDatatypes -> {
+                                val block = target.origAstTarget?.definingBlock()
                                 when(value.kind) {
-                                    SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(targetVarName, target.datatype, operator, value.number!!.number.toInt())
-                                    SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, value.asmVarname, value.datatype)
-                                    SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, regName(value), value.datatype)
+                                    SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(targetVarName, target.datatype, operator, value.number!!.number.toInt(), block)
+                                    SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, value.asmVarname, value.datatype, block)
+                                    SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, regName(value), value.datatype, block)
                                     SourceStorageKind.MEMORY -> inplacemodificationWordWithMemread(targetVarName, target.datatype, operator, value.memory!!)
-                                    SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.array!!)
+                                    SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.array!!, block)
                                     SourceStorageKind.EXPRESSION -> {
                                         if(value.expression is PtTypeCast) {
                                             if (tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) return
-                                            inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression)
+                                            inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression, block)
                                         } else {
-                                            inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression!!)
+                                            inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression!!, block)
                                         }
                                     }
                                 }
@@ -327,12 +329,13 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                     asmgen.out("  lda  ${target.array.variable.name},y")
                                     asmgen.out("  ldx  ${target.array.variable.name}+1,y")
                                 }
+                                val block = target.origAstTarget?.definingBlock()
                                 when(value.kind) {
                                     SourceStorageKind.LITERALNUMBER -> {
                                         val number = value.number!!.number.toInt()
                                         if(!inplacemodificationRegisterAXwithLiteralval(operator, number)) {
                                             asmgen.out("  sta  P8ZP_SCRATCH_W1 |  stx  P8ZP_SCRATCH_W1+1")
-                                            inplacemodificationWordWithLiteralval("P8ZP_SCRATCH_W1", target.datatype, operator, number)
+                                            inplacemodificationWordWithLiteralval("P8ZP_SCRATCH_W1", target.datatype, operator, number, block)
                                             asmgen.out("  lda  P8ZP_SCRATCH_W1 |  ldx  P8ZP_SCRATCH_W1+1")
                                         }
                                     }
@@ -343,7 +346,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                                 value.datatype
                                             )) {
                                             asmgen.out("  sta  P8ZP_SCRATCH_W1 |  stx  P8ZP_SCRATCH_W1+1")
-                                            inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, value.asmVarname, value.datatype)
+                                            inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, value.asmVarname, value.datatype, block)
                                             asmgen.out("  lda  P8ZP_SCRATCH_W1 |  ldx  P8ZP_SCRATCH_W1+1")
                                         }
                                     }
@@ -354,7 +357,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                                 value.datatype
                                             )) {
                                             asmgen.out("  sta  P8ZP_SCRATCH_W1 |  stx  P8ZP_SCRATCH_W1+1")
-                                            inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, regName(value), value.datatype)
+                                            inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, regName(value), value.datatype, block)
                                             asmgen.out("  lda  P8ZP_SCRATCH_W1 |  ldx  P8ZP_SCRATCH_W1+1")
                                         }
                                     }
@@ -365,15 +368,15 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                     }
                                     SourceStorageKind.ARRAY -> {
                                         asmgen.out("  sta  P8ZP_SCRATCH_W1 |  stx  P8ZP_SCRATCH_W1+1")
-                                        inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.array!!)
+                                        inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.array!!, block)
                                         asmgen.out("  lda  P8ZP_SCRATCH_W1 |  ldx  P8ZP_SCRATCH_W1+1")
                                     }
                                     SourceStorageKind.EXPRESSION -> {
                                         asmgen.out("  sta  P8ZP_SCRATCH_W1 |  stx  P8ZP_SCRATCH_W1+1")
                                         if(value.expression is PtTypeCast)
-                                            inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression)
+                                            inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression, block)
                                         else
-                                            inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression!!)
+                                            inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression!!, block)
                                         asmgen.out("  lda  P8ZP_SCRATCH_W1 |  ldx  P8ZP_SCRATCH_W1+1")
                                     }
                                 }
@@ -915,8 +918,9 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
             "<<" -> {
                 asmgen.out("""
                     tay
-                    beq  +
                     lda  $variable
+                    cpy  #0
+                    beq  +
 -                   asl  a
                     dey
                     bne  -
@@ -926,8 +930,9 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                 if(!signed) {
                     asmgen.out("""
                         tay
-                        beq  +
                         lda  $variable
+                        cpy  #0
+                        beq  +
 -                       lsr  a
                         dey
                         bne  -
@@ -935,8 +940,9 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                 } else {
                     asmgen.out("""
                         tay
-                        beq  +
                         lda  $variable
+                        cpy  #0
+                        beq  +
                         sta  P8ZP_SCRATCH_B1
 -                       asl  a
                         ror  P8ZP_SCRATCH_B1
@@ -1277,12 +1283,12 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                 asmgen.out("  eor  $name  |  sta  $name")
             }
             else -> {
-                inplacemodificationWordWithValue(name, dt, operator, memread)
+                inplacemodificationWordWithValue(name, dt, operator, memread, memread.definingBlock())
             }
         }
     }
 
-    private fun inplacemodificationWordWithLiteralval(name: String, dt: DataType, operator: String, value: Int) {
+    private fun inplacemodificationWordWithLiteralval(name: String, dt: DataType, operator: String, value: Int, block: PtBlock?) {
         // note: this contains special optimized cases because we know the exact value. Don't replace this with another routine.
         when (operator) {
             "+" -> {
@@ -1342,16 +1348,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                 if(value in asmgen.optimizedWordMultiplications) {
                     asmgen.out("  lda  $name |  ldy  $name+1 |  jsr  math.mul_word_$value |  sta  $name |  sty  $name+1")
                 } else {
-                    asmgen.out("""
-                        lda  $name
-                        sta  math.multiply_words.multiplier
-                        lda  $name+1
-                        sta  math.multiply_words.multiplier+1
-                        lda  #<$value
-                        ldy  #>$value
-                        jsr  math.multiply_words
-                        sta  $name
-                        sty  $name+1""")
+                    if(block?.veraFxMuls==true)
+                        // cx16 verafx hardware mul
+                        asmgen.out("""
+                            lda  $name
+                            ldy  $name+1
+                            sta  cx16.r0
+                            sty  cx16.r0+1
+                            lda  #<$value
+                            ldy  #>$value
+                            sta  cx16.r1
+                            sty  cx16.r1+1
+                            jsr  verafx.muls
+                            sta  $name
+                            sty  $name+1""")
+                    else
+                        asmgen.out("""
+                            lda  $name
+                            sta  math.multiply_words.multiplier
+                            lda  $name+1
+                            sta  math.multiply_words.multiplier+1
+                            lda  #<$value
+                            ldy  #>$value
+                            jsr  math.multiply_words
+                            sta  $name
+                            sty  $name+1""")
                 }
             }
             "/" -> {
@@ -1741,7 +1762,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
         }
     }
 
-    private fun inplacemodificationWordWithVariable(name: String, dt: DataType, operator: String, otherName: String, valueDt: DataType) {
+    private fun inplacemodificationWordWithVariable(name: String, dt: DataType, operator: String, otherName: String, valueDt: DataType, block: PtBlock?) {
         when (valueDt) {
             in ByteDatatypes -> {
                 // the other variable is a BYTE type so optimize for that
@@ -1794,23 +1815,46 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                                 sta  $name+1""")
                     }
                     "*" -> {
-                        if(valueDt==DataType.UBYTE) {
-                            asmgen.out("  lda  $otherName |  sta  math.multiply_words.multiplier")
-                            if(asmgen.isTargetCpu(CpuType.CPU65c02))
-                                asmgen.out("  stz  math.multiply_words.multiplier+1")
-                            else
-                                asmgen.out("  lda  #0 |  sta  math.multiply_words.multiplier+1")
-                        } else {
-                            asmgen.out("  lda  $otherName")
-                            asmgen.signExtendAYlsb(valueDt)
-                            asmgen.out("  sta  math.multiply_words.multiplier |  sty  math.multiply_words.multiplier+1")
-                        }
-                        asmgen.out("""
+                        if(block?.veraFxMuls==true) {
+                            // cx16 verafx hardware muls
+                            if(valueDt==DataType.UBYTE) {
+                                asmgen.out("  lda  $otherName |  sta  cx16.r1")
+                                if(asmgen.isTargetCpu(CpuType.CPU65c02))
+                                    asmgen.out("  stz  cx16.r1+1")
+                                else
+                                    asmgen.out("  lda  #0 |  sta  cx16.r1+1")
+                            } else {
+                                asmgen.out("  lda  $otherName")
+                                asmgen.signExtendAYlsb(valueDt)
+                                asmgen.out("  sta  cx16.r1 |  sty  cx16.r1+1")
+                            }
+                            asmgen.out("""
                                 lda  $name
                                 ldy  $name+1
-                                jsr  math.multiply_words
+                                sta  cx16.r0
+                                sty  cx16.r0+1
+                                jsr  verafx.muls
                                 sta  $name
                                 sty  $name+1""")
+                        } else {
+                            if(valueDt==DataType.UBYTE) {
+                                asmgen.out("  lda  $otherName |  sta  math.multiply_words.multiplier")
+                                if(asmgen.isTargetCpu(CpuType.CPU65c02))
+                                    asmgen.out("  stz  math.multiply_words.multiplier+1")
+                                else
+                                    asmgen.out("  lda  #0 |  sta  math.multiply_words.multiplier+1")
+                            } else {
+                                asmgen.out("  lda  $otherName")
+                                asmgen.signExtendAYlsb(valueDt)
+                                asmgen.out("  sta  math.multiply_words.multiplier |  sty  math.multiply_words.multiplier+1")
+                            }
+                            asmgen.out("""
+                                    lda  $name
+                                    ldy  $name+1
+                                    jsr  math.multiply_words
+                                    sta  $name
+                                    sty  $name+1""")
+                        }
                     }
                     "/" -> {
                         if(dt==DataType.UWORD) {
@@ -1858,12 +1902,12 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                     }
                     "<<" -> {
                         asmgen.out("""
-                        ldy  $otherName
-                        beq  +
--                       asl  $name
-                        rol  $name+1
-                        dey
-                        bne  -
+                            ldy  $otherName
+                            beq  +
+-                           asl  $name
+                            rol  $name+1
+                            dey
+                            bne  -
 +""")
                     }
                     ">>" -> {
@@ -1939,16 +1983,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
                     "+" -> asmgen.out("  lda  $name |  clc |  adc  $otherName |  sta  $name |  lda  $name+1 |  adc  $otherName+1 |  sta  $name+1")
                     "-" -> asmgen.out("  lda  $name |  sec |  sbc  $otherName |  sta  $name |  lda  $name+1 |  sbc  $otherName+1 |  sta  $name+1")
                     "*" -> {
-                        asmgen.out("""
-                            lda  $otherName
-                            ldy  $otherName+1
-                            sta  math.multiply_words.multiplier
-                            sty  math.multiply_words.multiplier+1
-                            lda  $name
-                            ldy  $name+1
-                            jsr  math.multiply_words
-                            sta  $name
-                            sty  $name+1""")
+                        if(block?.veraFxMuls==true)
+                            // cx16 verafx hardware muls
+                            asmgen.out("""
+                                lda  $name
+                                ldy  $name+1
+                                sta  cx16.r0
+                                sty  cx16.r0+1
+                                lda  $otherName
+                                ldy  $otherName+1
+                                sta  cx16.r1
+                                sty  cx16.r1+1
+                                jsr  verafx.muls
+                                sta  $name
+                                sty  $name+1""")
+                        else
+                            asmgen.out("""
+                                lda  $otherName
+                                ldy  $otherName+1
+                                sta  math.multiply_words.multiplier
+                                sty  math.multiply_words.multiplier+1
+                                lda  $name
+                                ldy  $name+1
+                                jsr  math.multiply_words
+                                sta  $name
+                                sty  $name+1""")
                     }
                     "/" -> {
                         if(dt==DataType.WORD) {
@@ -2126,17 +2185,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
         }
     }
 
-    private fun inplacemodificationWordWithValue(name: String, dt: DataType, operator: String, value: PtExpression) {
+    private fun inplacemodificationWordWithValue(name: String, dt: DataType, operator: String, value: PtExpression, block: PtBlock?) {
         fun multiplyVarByWordInAY() {
-            asmgen.out("""
-                sta  math.multiply_words.multiplier
-                sty  math.multiply_words.multiplier+1
-                lda  $name
-                ldy  $name+1
-                jsr  math.multiply_words
-                sta  $name
-                sty  $name+1
-            """)
+            if(block?.veraFxMuls==true)
+                // cx16 verafx hardware muls
+                asmgen.out("""
+                    sta  cx16.r1
+                    sty  cx16.r1+1
+                    lda  $name
+                    ldy  $name+1
+                    sta  cx16.r0
+                    sty  cx16.r0+1
+                    jsr  verafx.muls
+                    sta  $name
+                    sty  $name+1
+                """)
+            else
+                asmgen.out("""
+                    sta  math.multiply_words.multiplier
+                    sty  math.multiply_words.multiplier+1
+                    lda  $name
+                    ldy  $name+1
+                    jsr  math.multiply_words
+                    sta  $name
+                    sty  $name+1
+                """)
         }
 
         fun divideVarByWordInAY() {

codeGenCpu6502/test/TestCodegen.kt

@@ -44,7 +44,7 @@ class TestCodegen: FunSpec({
 //}
         val codegen = AsmGen6502(prefixSymbols = false)
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("pi", DataType.UBYTE, ZeropageWish.DONTCARE, PtNumber(DataType.UBYTE, 0.0, Position.DUMMY), null, Position.DUMMY))
         sub.add(PtVariable("particleX", DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, 3u, Position.DUMMY))
@@ -94,7 +94,7 @@ class TestCodegen: FunSpec({
         program.add(block)
 
         // define the "cx16.r0" virtual register
-        val cx16block = PtBlock("cx16", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val cx16block = PtBlock("cx16", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         cx16block.add(PtMemMapped("r0", DataType.UWORD, 100u, null, Position.DUMMY))
         program.add(cx16block)
 

codeGenExperimental/build.gradle

@@ -36,10 +36,10 @@ dependencies {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
 }

codeGenIntermediate/build.gradle

@@ -30,16 +30,16 @@ dependencies {
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.18"
 
-    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.6.2'
+    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.7.2'
 }
 
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
     test {

codeGenIntermediate/src/prog8/codegen/intermediate/BuiltinFuncGen.kt

@@ -40,6 +40,8 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
             "max__byte", "max__ubyte", "max__word", "max__uword" -> funcMax(call)
             "sort" -> funcSort(call)
             "reverse" -> funcReverse(call)
+            "setlsb" -> funcSetLsbMsb(call, false)
+            "setmsb" -> funcSetLsbMsb(call, true)
             "rol" -> funcRolRor(Opcode.ROXL, call)
             "ror" -> funcRolRor(Opcode.ROXR, call)
             "rol2" -> funcRolRor(Opcode.ROL, call)
@@ -69,6 +71,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
 
     private fun funcCallfar(call: PtBuiltinFunctionCall): ExpressionCodeResult {
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 3), null)
         val bankTr = exprGen.translateExpression(call.args[0])
         val addressTr = exprGen.translateExpression(call.args[1])
         val argumentwordTr = exprGen.translateExpression(call.args[2])
@@ -110,6 +113,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
 
     private fun funcStringCompare(call: PtBuiltinFunctionCall): ExpressionCodeResult {
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
         val left  = exprGen.translateExpression(call.args[0])
         val right = exprGen.translateExpression(call.args[1])
         addToResult(result, left, left.resultReg, -1)
@@ -144,6 +148,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
                 else -> throw IllegalArgumentException("weird type")
             }
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
         val tr = exprGen.translateExpression(call.args[0])
         addToResult(result, tr, tr.resultReg, -1)
         val lengthReg = codeGen.registers.nextFree()
@@ -165,6 +170,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
                 else -> throw IllegalArgumentException("weird type")
             }
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
         val tr = exprGen.translateExpression(call.args[0])
         addToResult(result, tr, tr.resultReg, -1)
         val lengthReg = codeGen.registers.nextFree()
@@ -308,6 +314,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
                 else -> throw IllegalArgumentException("weird type to reverse")
             }
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
         val tr = exprGen.translateExpression(call.args[0])
         addToResult(result, tr, tr.resultReg, -1)
         val lengthReg = codeGen.registers.nextFree()
@@ -331,6 +338,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
                 else -> throw IllegalArgumentException("weird type to sort")
             }
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
         val tr = exprGen.translateExpression(call.args[0])
         addToResult(result, tr, tr.resultReg, -1)
         val lengthReg = codeGen.registers.nextFree()
@@ -354,6 +362,7 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
 
     private fun funcClamp(call: PtBuiltinFunctionCall): ExpressionCodeResult {
         val result = mutableListOf<IRCodeChunkBase>()
+        addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 3), null)
         val type = irType(call.type)
         val valueTr = exprGen.translateExpression(call.args[0])
         val minimumTr = exprGen.translateExpression(call.args[1])
@@ -576,6 +585,122 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
         return ExpressionCodeResult(result, vmDt, -1, -1)
     }
 
+    private fun funcSetLsbMsb(call: PtBuiltinFunctionCall, msb: Boolean): ExpressionCodeResult {
+        val result = mutableListOf<IRCodeChunkBase>()
+        val target = call.args[0]
+        val isConstZeroValue = call.args[1].asConstInteger()==0
+        when(target) {
+            is PtIdentifier -> {
+                if(isConstZeroValue) {
+                    result += IRCodeChunk(null, null).also {
+                        val pointerReg = codeGen.registers.nextFree()
+                        it += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1 = pointerReg, labelSymbol = target.name)
+                        if (msb)
+                            it += IRInstruction(Opcode.INC, IRDataType.WORD, reg1 = pointerReg)
+                        it += IRInstruction(Opcode.STOREZI, IRDataType.BYTE, reg1 = pointerReg)
+                    }
+                } else {
+                    val valueTr = exprGen.translateExpression(call.args[1])
+                    addToResult(result, valueTr, valueTr.resultReg, -1)
+                    result += IRCodeChunk(null, null).also {
+                        val pointerReg = codeGen.registers.nextFree()
+                        it += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1 = pointerReg, labelSymbol = target.name)
+                        if (msb)
+                            it += IRInstruction(Opcode.INC, IRDataType.WORD, reg1 = pointerReg)
+                        it += IRInstruction(Opcode.STOREI, IRDataType.BYTE, reg1 = valueTr.resultReg, reg2 = pointerReg)
+                    }
+                }
+            }
+            is PtArrayIndexer -> {
+                require(!target.usesPointerVariable)
+                if(target.splitWords) {
+                    // lsb/msb in split arrays, element index 'size' is always 1
+                    val constIndex = target.index.asConstInteger()
+                    val varName = target.variable.name + if(msb) "_msb" else "_lsb"
+                    if(isConstZeroValue) {
+                        if(constIndex!=null) {
+                            val offsetReg = codeGen.registers.nextFree()
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=offsetReg, immediate = constIndex)
+                                it += IRInstruction(Opcode.STOREZX, IRDataType.BYTE, reg1=offsetReg, labelSymbol = varName)
+                            }
+                        } else {
+                            val indexTr = exprGen.translateExpression(target.index)
+                            addToResult(result, indexTr, indexTr.resultReg, -1)
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.STOREZX, IRDataType.BYTE, reg1=indexTr.resultReg, labelSymbol = varName)
+                            }
+                        }
+                    } else {
+                        val valueTr = exprGen.translateExpression(call.args[1])
+                        addToResult(result, valueTr, valueTr.resultReg, -1)
+                        if(constIndex!=null) {
+                            val offsetReg = codeGen.registers.nextFree()
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=offsetReg, immediate = constIndex)
+                                it += IRInstruction(Opcode.STOREX, IRDataType.BYTE, reg1=valueTr.resultReg, reg2=offsetReg, labelSymbol = varName)
+                            }
+                        } else {
+                            val indexTr = exprGen.translateExpression(target.index)
+                            addToResult(result, indexTr, indexTr.resultReg, -1)
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.STOREX, IRDataType.BYTE, reg1=valueTr.resultReg, reg2=indexTr.resultReg, labelSymbol = varName)
+                            }
+                        }
+                    }
+                }
+                else {
+                    val eltSize = codeGen.program.memsizer.memorySize(target.type)
+                    val constIndex = target.index.asConstInteger()
+                    if(isConstZeroValue) {
+                        if(constIndex!=null) {
+                            val offsetReg = codeGen.registers.nextFree()
+                            val offset = eltSize*constIndex + if(msb) 1 else 0
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=offsetReg, immediate = offset)
+                                it += IRInstruction(Opcode.STOREZX, IRDataType.BYTE, reg1=offsetReg, labelSymbol = target.variable.name)
+                            }
+                        } else {
+                            val indexTr = exprGen.translateExpression(target.index)
+                            addToResult(result, indexTr, indexTr.resultReg, -1)
+                            result += IRCodeChunk(null, null).also {
+                                if(eltSize>1)
+                                    it += codeGen.multiplyByConst(IRDataType.BYTE, indexTr.resultReg, eltSize)
+                                if(msb)
+                                    it += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=indexTr.resultReg)
+                                it += IRInstruction(Opcode.STOREZX, IRDataType.BYTE, reg1=indexTr.resultReg, labelSymbol = target.variable.name)
+                            }
+                        }
+                    } else {
+                        val valueTr = exprGen.translateExpression(call.args[1])
+                        addToResult(result, valueTr, valueTr.resultReg, -1)
+                        if(constIndex!=null) {
+                            val offsetReg = codeGen.registers.nextFree()
+                            val offset = eltSize*constIndex + if(msb) 1 else 0
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=offsetReg, immediate = offset)
+                                it += IRInstruction(Opcode.STOREX, IRDataType.BYTE, reg1=valueTr.resultReg, reg2=offsetReg, labelSymbol = target.variable.name)
+                            }
+                        } else {
+                            val indexTr = exprGen.translateExpression(target.index)
+                            addToResult(result, indexTr, indexTr.resultReg, -1)
+                            result += IRCodeChunk(null, null).also {
+                                if(eltSize>1)
+                                    it += codeGen.multiplyByConst(IRDataType.BYTE, indexTr.resultReg, eltSize)
+                                if(msb)
+                                    it += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=indexTr.resultReg)
+                                it += IRInstruction(Opcode.STOREX, IRDataType.BYTE, reg1=valueTr.resultReg, reg2=indexTr.resultReg, labelSymbol = target.variable.name)
+                            }
+                        }
+                    }
+                }
+            }
+            else -> throw AssemblyError("weird target for setlsb/setmsb: $target")
+        }
+        return ExpressionCodeResult(result, IRDataType.WORD, -1, -1)
+    }
+
+
     private fun assignRegisterTo(target: PtExpression, register: Int): IRCodeChunks {
         val assignment = PtAssignment(target.position)
         val assignTarget = PtAssignTarget(target.position)

codeGenIntermediate/src/prog8/codegen/intermediate/ExpressionGen.kt

@@ -3,10 +3,7 @@ package prog8.codegen.intermediate
 import prog8.code.StRomSub
 import prog8.code.StSub
 import prog8.code.ast.*
-import prog8.code.core.AssemblyError
-import prog8.code.core.DataType
-import prog8.code.core.PassByValueDatatypes
-import prog8.code.core.SignedDatatypes
+import prog8.code.core.*
 import prog8.intermediate.*
 
 internal class ExpressionCodeResult(val chunks: IRCodeChunks, val dt: IRDataType, val resultReg: Int, val resultFpReg: Int) {
@@ -69,10 +66,28 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
                 val vmDt = irType(expr.type)
                 val symbol = expr.identifier.name
                 // note: LOAD <symbol>  gets you the address of the symbol, whereas LOADM <symbol> would get you the value stored at that location
-                val code = IRCodeChunk(null, null)
+                val result = mutableListOf<IRCodeChunkBase>()
                 val resultRegister = codeGen.registers.nextFree()
-                code += IRInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, labelSymbol = symbol)
-                ExpressionCodeResult(code, vmDt, resultRegister, -1)
+                addInstr(result, IRInstruction(Opcode.LOAD, vmDt, reg1 = resultRegister, labelSymbol = symbol), null)
+                if(expr.isFromArrayElement) {
+                    val indexTr = translateExpression(expr.arrayIndexExpr!!)
+                    addToResult(result, indexTr, indexTr.resultReg, -1)
+                    if(expr.identifier.type in SplitWordArrayTypes) {
+                        result += IRCodeChunk(null, null).also {
+                            // multiply indexTr resultreg by the eltSize and add this to the resultRegister.
+                            it += IRInstruction(Opcode.ADDR, IRDataType.BYTE, reg1=resultRegister, reg2=indexTr.resultReg)
+                        }
+                    } else {
+                        val eltSize = codeGen.program.memsizer.memorySize(expr.identifier.type, 1)
+                        result += IRCodeChunk(null, null).also {
+                            // multiply indexTr resultreg by the eltSize and add this to the resultRegister.
+                            if(eltSize>1)
+                                it += IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=indexTr.resultReg, immediate = eltSize)
+                            it += IRInstruction(Opcode.ADDR, IRDataType.BYTE, reg1=resultRegister, reg2=indexTr.resultReg)
+                        }
+                    }
+                }
+                ExpressionCodeResult(result, vmDt, resultRegister, -1)
             }
             is PtMemoryByte -> {
                 val result = mutableListOf<IRCodeChunkBase>()
@@ -107,6 +122,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
         val result = mutableListOf<IRCodeChunkBase>()
         when(check.iterable.type) {
             DataType.STR -> {
+                addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 2), null)
                 val elementTr = translateExpression(check.element)
                 addToResult(result, elementTr, elementTr.resultReg, -1)
                 val iterableTr = translateExpression(check.iterable)
@@ -115,6 +131,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
                 return ExpressionCodeResult(result, IRDataType.BYTE, elementTr.resultReg, -1)
             }
             DataType.ARRAY_UB, DataType.ARRAY_B -> {
+                addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 3), null)
                 val elementTr = translateExpression(check.element)
                 addToResult(result, elementTr, elementTr.resultReg, -1)
                 val iterableTr = translateExpression(check.iterable)
@@ -126,6 +143,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
                 return ExpressionCodeResult(result, IRDataType.BYTE, elementTr.resultReg, -1)
             }
             DataType.ARRAY_UW, DataType.ARRAY_W -> {
+                addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = 3), null)
                 val elementTr = translateExpression(check.element)
                 addToResult(result, elementTr, elementTr.resultReg, -1)
                 val iterableTr = translateExpression(check.iterable)
@@ -366,6 +384,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
         when (val callTarget = codeGen.symbolTable.flat.getValue(fcall.name)) {
             is StSub -> {
                 val result = mutableListOf<IRCodeChunkBase>()
+                addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = callTarget.parameters.size), null)
                 // assign the arguments
                 val argRegisters = mutableListOf<FunctionCallArgs.ArgumentSpec>()
                 for ((arg, parameter) in fcall.args.zip(callTarget.parameters)) {
@@ -386,8 +405,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
                         FunctionCallArgs.RegSpec(returnIrType, codeGen.registers.nextFree(), null)
                 }
                 // create the call
-                val call = IRInstruction(Opcode.CALL, labelSymbol = fcall.name, fcallArgs = FunctionCallArgs(argRegisters, returnRegSpec))
-                addInstr(result, call, null)
+                addInstr(result, IRInstruction(Opcode.CALL, labelSymbol = fcall.name, fcallArgs = FunctionCallArgs(argRegisters, returnRegSpec)), null)
                 return if(fcall.void)
                     ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
                 else if(fcall.type==DataType.FLOAT)
@@ -397,6 +415,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
             }
             is StRomSub -> {
                 val result = mutableListOf<IRCodeChunkBase>()
+                addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = callTarget.parameters.size), null)
                 // assign the arguments
                 val argRegisters = mutableListOf<FunctionCallArgs.ArgumentSpec>()
                 for ((arg, parameter) in fcall.args.zip(callTarget.parameters)) {
@@ -543,14 +562,16 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
             val resultRegister = codeGen.registers.nextFree()
             val valueReg = codeGen.registers.nextFree()
             val label = codeGen.createLabelName()
-            addInstr(result, IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=resultRegister, immediate = 1), null)
-            addInstr(result, IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1=valueReg, fpReg1 = leftTr.resultFpReg, fpReg2 = rightTr.resultFpReg), null)
-            if (notEquals) {
-                addInstr(result, IRInstruction(Opcode.BNE, IRDataType.BYTE, reg1=valueReg, immediate = 0, labelSymbol = label), null)
-            } else {
-                addInstr(result, IRInstruction(Opcode.BEQ, IRDataType.BYTE, reg1=valueReg, immediate = 0, labelSymbol = label), null)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=resultRegister, immediate = 1)
+                it += IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1=valueReg, fpReg1 = leftTr.resultFpReg, fpReg2 = rightTr.resultFpReg)
+                it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=valueReg, immediate = 0)
+                it += if (notEquals)
+                    IRInstruction(Opcode.BSTNE, labelSymbol = label)
+                else
+                    IRInstruction(Opcode.BSTEQ, labelSymbol = label)
+                it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=resultRegister, immediate = 0)
             }
-            addInstr(result, IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=resultRegister, immediate = 0), null)
             result += IRCodeChunk(label, null)
             return ExpressionCodeResult(result, IRDataType.BYTE, resultRegister, -1)
         } else {

codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt

@@ -415,13 +415,19 @@ class IRCodeGen(
                 if(choice.statements.children.isEmpty()) {
                     // no statements for this choice value, jump to the end immediately
                     choice.values.children.map { it as PtNumber }.sortedBy { it.number }.forEach { value ->
-                        addInstr(result, IRInstruction(Opcode.BEQ, valueDt, reg1=valueTr.resultReg, immediate = value.number.toInt(), labelSymbol = endLabel), null)
+                        result += IRCodeChunk(null, null).also {
+                            it += IRInstruction(Opcode.CMPI, valueDt, reg1=valueTr.resultReg, immediate = value.number.toInt())
+                            it += IRInstruction(Opcode.BSTEQ, labelSymbol = endLabel)
+                        }
                     }
                 } else {
                     val choiceLabel = createLabelName()
                     choices.add(choiceLabel to choice)
                     choice.values.children.map { it as PtNumber }.sortedBy { it.number }.forEach { value ->
-                        addInstr(result, IRInstruction(Opcode.BEQ, valueDt, reg1=valueTr.resultReg, immediate = value.number.toInt(), labelSymbol = choiceLabel), null)
+                        result += IRCodeChunk(null, null).also {
+                            it += IRInstruction(Opcode.CMPI, valueDt, reg1=valueTr.resultReg, immediate = value.number.toInt())
+                            it += IRInstruction(Opcode.BSTEQ, labelSymbol = choiceLabel)
+                        }
                     }
                 }
             }
@@ -464,7 +470,8 @@ class IRCodeGen(
                         addInstr(result, IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = indexReg, immediate = 0), null)
                         result += IRCodeChunk(loopLabel, null).also {
                             it += IRInstruction(Opcode.LOADX, IRDataType.BYTE, reg1 = tmpReg, reg2 = indexReg, labelSymbol = iterable.name)
-                            it += IRInstruction(Opcode.BEQ, IRDataType.BYTE, reg1 = tmpReg, immediate = 0, labelSymbol = endLabel)
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = tmpReg, immediate = 0)
+                            it += IRInstruction(Opcode.BSTEQ, labelSymbol = endLabel)
                             it += IRInstruction(Opcode.STOREM, IRDataType.BYTE, reg1 = tmpReg, labelSymbol = loopvarSymbol)
                         }
                         result += translateNode(forLoop.statements)
@@ -492,7 +499,8 @@ class IRCodeGen(
                         result += translateNode(forLoop.statements)
                         result += IRCodeChunk(null, null).also {
                             it += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=indexReg)
-                            it += IRInstruction(Opcode.BNE, IRDataType.BYTE, reg1=indexReg, immediate = if(iterableLength==256) 0 else iterableLength, labelSymbol = loopLabel)
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = if(iterableLength==256) 0 else iterableLength)
+                            it += IRInstruction(Opcode.BSTNE, labelSymbol = loopLabel)
                         }
                     }
                     else -> {
@@ -507,7 +515,10 @@ class IRCodeGen(
                         }
                         result += translateNode(forLoop.statements)
                         result += addConstReg(IRDataType.BYTE, indexReg, elementSize)
-                        addInstr(result, IRInstruction(Opcode.BNE, IRDataType.BYTE, reg1=indexReg, immediate = if(lengthBytes==256) 0 else lengthBytes, labelSymbol = loopLabel), null)
+                        result += IRCodeChunk(null, null).also {
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = if(lengthBytes==256) 0 else lengthBytes)
+                            it += IRInstruction(Opcode.BSTNE, labelSymbol = loopLabel)
+                        }
                     }
                 }
             }
@@ -555,8 +566,11 @@ class IRCodeGen(
         result += labelFirstChunk(translateNode(forLoop.statements), loopLabel)
         if(step==1 || step==-1) {
             // if endvalue == loopvar, stop loop, else iterate
-            addInstr(result, IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = fromTr.resultReg, labelSymbol = loopvarSymbol), null)
-            addInstr(result, IRInstruction(Opcode.BEQR, loopvarDtIr, reg1=toTr.resultReg, reg2=fromTr.resultReg, labelSymbol = labelAfterFor), null)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = fromTr.resultReg, labelSymbol = loopvarSymbol)
+                it += IRInstruction(Opcode.CMP, loopvarDtIr, reg1=toTr.resultReg, reg2=fromTr.resultReg)
+                it += IRInstruction(Opcode.BSTEQ, labelSymbol = labelAfterFor)
+            }
             result += addConstMem(loopvarDtIr, null, loopvarSymbol, step)
             addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = loopLabel), null)
         } else {
@@ -601,8 +615,8 @@ class IRCodeGen(
         result += labelFirstChunk(translateNode(forLoop.statements), loopLabel)
         val chunk2 = addConstMem(loopvarDtIr, null, loopvarSymbol, iterable.step)
         chunk2 += IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = indexReg, labelSymbol = loopvarSymbol)
-        chunk2 += IRInstruction(Opcode.XOR, loopvarDtIr, reg1 = 999, immediate = 111)
-        chunk2 += IRInstruction(Opcode.BNE, loopvarDtIr, reg1 = indexReg, immediate = rangeEndExclusiveWrapped, labelSymbol = loopLabel)
+        chunk2 += IRInstruction(Opcode.CMPI, loopvarDtIr, reg1 = indexReg, immediate = rangeEndExclusiveWrapped)
+        chunk2 += IRInstruction(Opcode.BSTNE, labelSymbol = loopLabel)
         result += chunk2
         return result
     }
@@ -961,21 +975,33 @@ class IRCodeGen(
                         fpReg1 = leftTr.resultFpReg,
                         fpReg2 = rightTr.resultFpReg
                     )
-                    val gotoOpcode = when (condition.operator) {
-                        "==" -> Opcode.BEQ
-                        "!=" -> Opcode.BNE
-                        "<" -> Opcode.BLTS
-                        ">" -> Opcode.BGTS
-                        "<=" -> Opcode.BLES
-                        ">=" -> Opcode.BGES
-                        else -> throw AssemblyError("weird operator")
+                    when(condition.operator) {
+                        // TODO: the converted list of operators
+                        "==" -> {
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = compResultReg, immediate = 0)
+                            it += branchInstr(goto, Opcode.BSTEQ)
+                        }
+                        "!=" -> {
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = compResultReg, immediate = 0)
+                            it += branchInstr(goto, Opcode.BSTNE)
+                        }
+                        else -> {
+                            // TODO: the old list of operators, still to be converted
+                            val gotoOpcode = when (condition.operator) {
+                                "<" -> Opcode.BLTS
+                                ">" -> Opcode.BGTS
+                                "<=" -> Opcode.BLES
+                                ">=" -> Opcode.BGES
+                                else -> throw AssemblyError("weird operator")
+                            }
+                            it += if (goto.address != null)
+                                IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, address = goto.address?.toInt())
+                            else if (goto.generatedLabel != null)
+                                IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = goto.generatedLabel)
+                            else
+                                IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = goto.identifier!!.name)
+                        }
                     }
-                    it += if (goto.address != null)
-                        IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, address = goto.address?.toInt())
-                    else if (goto.generatedLabel != null)
-                        IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = goto.generatedLabel)
-                    else
-                        IRInstruction(gotoOpcode, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = goto.identifier!!.name)
                 }
                 return result
             } else {
@@ -990,6 +1016,14 @@ class IRCodeGen(
         }
     }
 
+    // TODO use this everywhere
+    private fun branchInstr(goto: PtJump, branchOpcode: Opcode) = if (goto.address != null)
+        IRInstruction(branchOpcode, address = goto.address?.toInt())
+    else if (goto.generatedLabel != null)
+        IRInstruction(branchOpcode, labelSymbol = goto.generatedLabel)
+    else
+        IRInstruction(branchOpcode, labelSymbol = goto.identifier!!.name)
+
     private fun ifZeroIntThenJump(
         result: MutableList<IRCodeChunkBase>,
         ifElse: PtIfElse,
@@ -1000,21 +1034,33 @@ class IRCodeGen(
         val condition = ifElse.condition as PtBinaryExpression
         val leftTr = expressionEval.translateExpression(condition.left)
         addToResult(result, leftTr, leftTr.resultReg, -1)
-        val opcode = when (condition.operator) {
-            "==" -> Opcode.BEQ
-            "!=" -> Opcode.BNE
-            "<" -> if (signed) Opcode.BLTS else Opcode.BLT
-            ">" -> if (signed) Opcode.BGTS else Opcode.BGT
-            "<=" -> if (signed) Opcode.BLES else Opcode.BLE
-            ">=" -> if (signed) Opcode.BGES else Opcode.BGE
-            else -> throw AssemblyError("invalid comparison operator")
+        when(condition.operator) {
+            // TODO: converted list of operators
+            "==" -> {
+                addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
+                addInstr(result, branchInstr(goto, Opcode.BSTEQ), null)
+            }
+            "!=" -> {
+                addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
+                addInstr(result, branchInstr(goto, Opcode.BSTNE), null)
+            }
+            else -> {
+                // TODO: to-be converted operators
+                val opcode = when (condition.operator) {
+                    "<" -> if (signed) Opcode.BLTS else Opcode.BLT
+                    ">" -> if (signed) Opcode.BGTS else Opcode.BGT
+                    "<=" -> if (signed) Opcode.BLES else Opcode.BLE
+                    ">=" -> if (signed) Opcode.BGES else Opcode.BGE
+                    else -> throw AssemblyError("invalid comparison operator")
+                }
+                if (goto.address != null)
+                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, address = goto.address?.toInt()), null)
+                else if (goto.generatedLabel != null)
+                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, labelSymbol = goto.generatedLabel), null)
+                else
+                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, labelSymbol = goto.identifier!!.name), null)
+            }
         }
-        if (goto.address != null)
-            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, address = goto.address?.toInt()), null)
-        else if (goto.generatedLabel != null)
-            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, labelSymbol = goto.generatedLabel), null)
-        else
-            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = leftTr.resultReg, immediate = 0, labelSymbol = goto.identifier!!.name), null)
     }
 
     private fun ifNonZeroIntThenJump(
@@ -1028,47 +1074,60 @@ class IRCodeGen(
         if(condition==null) {
             val tr = expressionEval.translateExpression(ifElse.condition)
             result += tr.chunks
-            if (goto.address != null)
-                addInstr(result, IRInstruction(Opcode.BNE, irDtLeft, reg1 = tr.resultReg, immediate = 0, address = goto.address?.toInt()), null)
-            else if (goto.generatedLabel != null)
-                addInstr(result, IRInstruction(Opcode.BNE, irDtLeft, reg1 = tr.resultReg, immediate = 0, labelSymbol = goto.generatedLabel), null)
-            else
-                addInstr(result, IRInstruction(Opcode.BNE, irDtLeft, reg1 = tr.resultReg, immediate = 0, labelSymbol = goto.identifier!!.name), null)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.CMPI, irDtLeft, reg1 = tr.resultReg, immediate = 0)
+                it += branchInstr(goto, Opcode.BSTNE)
+            }
         } else {
             val leftTr = expressionEval.translateExpression(condition.left)
             addToResult(result, leftTr, leftTr.resultReg, -1)
-            val opcode: Opcode
             val number = (condition.right as? PtNumber)?.number?.toInt()
             if(number!=null) {
                 val firstReg = leftTr.resultReg
-                opcode = when (condition.operator) {
-                    "==" -> Opcode.BEQ
-                    "!=" -> Opcode.BNE
-                    "<" -> if(signed) Opcode.BLTS else Opcode.BLT
-                    ">" -> if(signed) Opcode.BGTS else Opcode.BGT
-                    "<=" -> if(signed) Opcode.BLES else Opcode.BLE
-                    ">=" -> if(signed) Opcode.BGES else Opcode.BGE
-                    else -> throw AssemblyError("invalid comparison operator")
+                when(condition.operator) {
+                    // TODO: the converted operators
+                    "==" -> {
+                        addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = firstReg, immediate = number), null)
+                        addInstr(result, branchInstr(goto, Opcode.BSTEQ), null)
+                    }
+                    "!=" -> {
+                        addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = firstReg, immediate = number), null)
+                        addInstr(result, branchInstr(goto, Opcode.BSTNE), null)
+                    }
+                    else -> {
+                        // TODO: to-be converted operators
+                        val opcode = when (condition.operator) {
+                            "<" -> if(signed) Opcode.BLTS else Opcode.BLT
+                            ">" -> if(signed) Opcode.BGTS else Opcode.BGT
+                            "<=" -> if(signed) Opcode.BLES else Opcode.BLE
+                            ">=" -> if(signed) Opcode.BGES else Opcode.BGE
+                            else -> throw AssemblyError("invalid comparison operator")
+                        }
+                        if (goto.address != null)
+                            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, address = goto.address?.toInt()), null)
+                        else if (goto.generatedLabel != null)
+                            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, labelSymbol = goto.generatedLabel), null)
+                        else
+                            addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, labelSymbol = goto.identifier!!.name), null)
+                    }
                 }
-                if (goto.address != null)
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, address = goto.address?.toInt()), null)
-                else if (goto.generatedLabel != null)
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, labelSymbol = goto.generatedLabel), null)
-                else
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, immediate = number, labelSymbol = goto.identifier!!.name), null)
             } else {
                 val rightTr = expressionEval.translateExpression(condition.right)
                 addToResult(result, rightTr, rightTr.resultReg, -1)
                 val firstReg: Int
                 val secondReg: Int
+                val opcode: Opcode
+                var useCmp = false
                 when (condition.operator) {
                     "==" -> {
-                        opcode = Opcode.BEQR
+                        useCmp = true
+                        opcode = Opcode.BSTEQ
                         firstReg = leftTr.resultReg
                         secondReg = rightTr.resultReg
                     }
                     "!=" -> {
-                        opcode = Opcode.BNER
+                        useCmp = true
+                        opcode = Opcode.BSTNE
                         firstReg = leftTr.resultReg
                         secondReg = rightTr.resultReg
                     }
@@ -1096,12 +1155,20 @@ class IRCodeGen(
                     }
                     else -> throw AssemblyError("invalid comparison operator")
                 }
-                if (goto.address != null)
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, address = goto.address?.toInt()), null)
-                else if (goto.generatedLabel != null)
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, labelSymbol = goto.generatedLabel), null)
-                else
-                    addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, labelSymbol = goto.identifier!!.name), null)
+
+                if(useCmp) {
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.CMP, irDtLeft, reg1 = firstReg, reg2 = secondReg)
+                        it += branchInstr(goto, opcode)
+                    }
+                } else {
+                    if (goto.address != null)
+                        addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, address = goto.address?.toInt()), null)
+                    else if (goto.generatedLabel != null)
+                        addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, labelSymbol = goto.generatedLabel), null)
+                    else
+                        addInstr(result, IRInstruction(opcode, irDtLeft, reg1 = firstReg, reg2 = secondReg, labelSymbol = goto.identifier!!.name), null)
+                }
             }
         }
     }
@@ -1109,6 +1176,7 @@ class IRCodeGen(
     private fun translateIfElseZeroComparison(ifElse: PtIfElse, irDtLeft: IRDataType, signed: Boolean): IRCodeChunks {
         val result = mutableListOf<IRCodeChunkBase>()
         val elseBranch: Opcode
+        var useCmpi = false     // for the branch opcodes that have been converted to CMPI + BSTxx form already
         val compResultReg: Int
         val branchDt: IRDataType
         val condition = ifElse.condition as PtBinaryExpression
@@ -1122,13 +1190,19 @@ class IRCodeGen(
                 it += IRInstruction(Opcode.LOAD, IRDataType.FLOAT, fpReg1 = rightFpReg, immediateFp = 0f)
                 it += IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1=compResultReg, fpReg1 = leftTr.resultFpReg, fpReg2 = rightFpReg)
             }
-            elseBranch = when (condition.operator) {
-                "==" -> Opcode.BNE
-                "!=" -> Opcode.BEQ
-                "<" -> Opcode.BGES
-                ">" -> Opcode.BLES
-                "<=" -> Opcode.BGTS
-                ">=" -> Opcode.BLTS
+            when (condition.operator) {
+                "==" -> {
+                    elseBranch = Opcode.BSTNE
+                    useCmpi = true
+                }
+                "!=" -> {
+                    elseBranch = Opcode.BSTEQ
+                    useCmpi = true
+                }
+                "<" -> elseBranch = Opcode.BGES
+                ">" -> elseBranch = Opcode.BLES
+                "<=" -> elseBranch = Opcode.BGTS
+                ">=" -> elseBranch = Opcode.BLTS
                 else -> throw AssemblyError("weird operator")
             }
         } else {
@@ -1137,13 +1211,19 @@ class IRCodeGen(
             val tr = expressionEval.translateExpression(condition.left)
             compResultReg = tr.resultReg
             addToResult(result, tr, tr.resultReg, -1)
-            elseBranch = when (condition.operator) {
-                "==" -> Opcode.BNE
-                "!=" -> Opcode.BEQ
-                "<" -> if (signed) Opcode.BGES else Opcode.BGE
-                ">" -> if (signed) Opcode.BLES else Opcode.BLE
-                "<=" -> if (signed) Opcode.BGTS else Opcode.BGT
-                ">=" -> if (signed) Opcode.BLTS else Opcode.BLT
+            when (condition.operator) {
+                "==" -> {
+                    elseBranch = Opcode.BSTNE
+                    useCmpi = true
+                }
+                "!=" -> {
+                    elseBranch = Opcode.BSTEQ
+                    useCmpi = true
+                }
+                "<" -> elseBranch = if (signed) Opcode.BGES else Opcode.BGE
+                ">" -> elseBranch = if (signed) Opcode.BLES else Opcode.BLE
+                "<=" -> elseBranch = if (signed) Opcode.BGTS else Opcode.BGT
+                ">=" -> elseBranch = if (signed) Opcode.BLTS else Opcode.BLT
                 else -> throw AssemblyError("weird operator")
             }
         }
@@ -1151,14 +1231,26 @@ class IRCodeGen(
         if(ifElse.elseScope.children.isEmpty()) {
             // just if
             val afterIfLabel = createLabelName()
-            addInstr(result, IRInstruction(elseBranch, branchDt, reg1=compResultReg, immediate = 0, labelSymbol = afterIfLabel), null)
+            if(useCmpi) {
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.CMPI, branchDt, reg1=compResultReg, immediate = 0)
+                    it += IRInstruction(elseBranch, labelSymbol = afterIfLabel)
+                }
+            } else
+                addInstr(result, IRInstruction(elseBranch, branchDt, reg1=compResultReg, immediate = 0, labelSymbol = afterIfLabel), null)
             result += translateNode(ifElse.ifScope)
             result += IRCodeChunk(afterIfLabel, null)
         } else {
             // if and else
             val elseLabel = createLabelName()
             val afterIfLabel = createLabelName()
-            addInstr(result, IRInstruction(elseBranch, branchDt, reg1=compResultReg, immediate = 0, labelSymbol = elseLabel), null)
+            if(useCmpi) {
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.CMPI, branchDt, reg1=compResultReg, immediate = 0)
+                    it += IRInstruction(elseBranch, labelSymbol = elseLabel)
+                }
+            } else
+                addInstr(result, IRInstruction(elseBranch, branchDt, reg1=compResultReg, immediate = 0, labelSymbol = elseLabel), null)
             result += translateNode(ifElse.ifScope)
             addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
             result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
@@ -1169,31 +1261,39 @@ class IRCodeGen(
 
     private fun translateIfElseNonZeroComparison(ifElse: PtIfElse, irDtLeft: IRDataType, signed: Boolean): IRCodeChunks {
         val result = mutableListOf<IRCodeChunkBase>()
-        val elseBranchOpcode: Opcode
         val elseBranchFirstReg: Int
         val elseBranchSecondReg: Int
         val branchDt: IRDataType
         val condition = ifElse.condition as? PtBinaryExpression
         if(condition==null) {
-            if(irDtLeft==IRDataType.FLOAT)
-                throw AssemblyError("condition value should not be float")
-            val tr = expressionEval.translateExpression(ifElse.condition)
-            result += tr.chunks
-            if(ifElse.elseScope.children.isNotEmpty()) {
-                val elseLabel = createLabelName()
-                val afterIfLabel = createLabelName()
-                addInstr(result, IRInstruction(Opcode.BEQ, irDtLeft, reg1=tr.resultReg, immediate = 0, labelSymbol = elseLabel), null)
-                result += translateNode(ifElse.ifScope)
-                addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
-                result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
-                result += IRCodeChunk(afterIfLabel, null)
-            } else {
-                val afterIfLabel = createLabelName()
-                addInstr(result, IRInstruction(Opcode.BEQ, irDtLeft, reg1=tr.resultReg, immediate = 0, labelSymbol = afterIfLabel), null)
-                result += translateNode(ifElse.ifScope)
-                result += IRCodeChunk(afterIfLabel, null)
-            }
-            return result
+            throw AssemblyError("if-else condition is not a binaryexpression, should have been converted?")
+//            if(irDtLeft==IRDataType.FLOAT)
+//                throw AssemblyError("condition value should not be float")
+//            val tr = expressionEval.translateExpression(ifElse.condition)
+//            result += tr.chunks
+//            if(ifElse.elseScope.children.isNotEmpty()) {
+//                val elseLabel = createLabelName()
+//                result += IRCodeChunk(null, null).also {
+//                    it += IRInstruction(Opcode.CMPI, irDtLeft, reg1=tr.resultReg, immediate = 0)
+//                    it += IRInstruction(Opcode.BSTEQ, labelSymbol = elseLabel)
+//                    TODO("test this")
+//                }
+//                result += translateNode(ifElse.ifScope)
+//                val afterIfLabel = createLabelName()
+//                addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
+//                result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
+//                result += IRCodeChunk(afterIfLabel, null)
+//            } else {
+//                val afterIfLabel = createLabelName()
+//                result += IRCodeChunk(null, null).also {
+//                    it += IRInstruction(Opcode.CMPI, irDtLeft, reg1=tr.resultReg, immediate = 0)
+//                    it += IRInstruction(Opcode.BSTEQ, labelSymbol = afterIfLabel)
+//                    TODO("test this")
+//                }
+//                result += translateNode(ifElse.ifScope)
+//                result += IRCodeChunk(afterIfLabel, null)
+//            }
+//            return result
         } else {
             if (irDtLeft == IRDataType.FLOAT) {
                 val leftTr = expressionEval.translateExpression(condition.left)
@@ -1201,35 +1301,35 @@ class IRCodeGen(
                 val rightTr = expressionEval.translateExpression(condition.right)
                 addToResult(result, rightTr, -1, rightTr.resultFpReg)
                 val compResultReg = registers.nextFree()
-                addInstr(
-                    result,
-                    IRInstruction(
-                        Opcode.FCOMP,
-                        IRDataType.FLOAT,
-                        reg1 = compResultReg,
-                        fpReg1 = leftTr.resultFpReg,
-                        fpReg2 = rightTr.resultFpReg
-                    ),
-                    null
-                )
-                val elseBranch = when (condition.operator) {
-                    "==" -> Opcode.BNE
-                    "!=" -> Opcode.BEQ
-                    "<" -> Opcode.BGES
-                    ">" -> Opcode.BLES
-                    "<=" -> Opcode.BGTS
-                    ">=" -> Opcode.BLTS
+                addInstr(result, IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1 = compResultReg, fpReg1 = leftTr.resultFpReg, fpReg2 = rightTr.resultFpReg), null)
+                val elseBranch: Opcode
+                var useCmpi = false     // for the branch opcodes that have been converted to CMPI + BSTxx form already
+                when (condition.operator) {
+                    "==" -> {
+                        elseBranch = Opcode.BSTNE
+                        useCmpi = true
+                    }
+                    "!=" -> {
+                        elseBranch = Opcode.BSTEQ
+                        useCmpi = true
+                    }
+                    "<" -> elseBranch = Opcode.BGES
+                    ">" -> elseBranch = Opcode.BLES
+                    "<=" -> elseBranch = Opcode.BGTS
+                    ">=" -> elseBranch = Opcode.BLTS
                     else -> throw AssemblyError("weird operator")
                 }
                 if (ifElse.elseScope.children.isNotEmpty()) {
                     // if and else parts
                     val elseLabel = createLabelName()
                     val afterIfLabel = createLabelName()
-                    addInstr(
-                        result,
-                        IRInstruction(elseBranch, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = elseLabel),
-                        null
-                    )
+                    if(useCmpi) {
+                        result += IRCodeChunk(null, null).also {
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = compResultReg, immediate = 0)
+                            it += IRInstruction(elseBranch, labelSymbol = elseLabel)
+                        }
+                    } else
+                        addInstr(result, IRInstruction(elseBranch, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = elseLabel), null)
                     result += translateNode(ifElse.ifScope)
                     addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
                     result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
@@ -1237,11 +1337,13 @@ class IRCodeGen(
                 } else {
                     // only if part
                     val afterIfLabel = createLabelName()
-                    addInstr(
-                        result,
-                        IRInstruction(elseBranch, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = afterIfLabel),
-                        null
-                    )
+                    if(useCmpi) {
+                        result += IRCodeChunk(null, null).also {
+                            it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = compResultReg, immediate = 0)
+                            it += IRInstruction(elseBranch, labelSymbol = afterIfLabel)
+                        }
+                    } else
+                        addInstr(result, IRInstruction(elseBranch, IRDataType.BYTE, reg1 = compResultReg, immediate = 0, labelSymbol = afterIfLabel), null)
                     result += translateNode(ifElse.ifScope)
                     result += IRCodeChunk(afterIfLabel, null)
                 }
@@ -1252,26 +1354,34 @@ class IRCodeGen(
                 addToResult(result, leftTr, leftTr.resultReg, -1)
                 val number = (condition.right as? PtNumber)?.number?.toInt()
                 if (number!=null) {
-                    elseBranchOpcode = when (condition.operator) {
-                        "==" -> Opcode.BNE
-                        "!=" -> Opcode.BEQ
-                        "<" -> if(signed) Opcode.BGES else Opcode.BGE
-                        ">" -> if(signed) Opcode.BLES else Opcode.BLE
-                        "<=" -> if(signed) Opcode.BGTS else Opcode.BGT
-                        ">=" -> if(signed) Opcode.BLTS else Opcode.BLT
+                    val elseBranch: Opcode
+                    var useCmpi = false     // for the branch opcodes that have been converted to CMPI + BSTxx form already
+                    when (condition.operator) {
+                        "==" -> {
+                            elseBranch = Opcode.BSTNE
+                            useCmpi = true
+                        }
+                        "!=" -> {
+                            elseBranch = Opcode.BSTEQ
+                            useCmpi = true
+                        }
+                        "<" -> elseBranch = if(signed) Opcode.BGES else Opcode.BGE
+                        ">" -> elseBranch = if(signed) Opcode.BLES else Opcode.BLE
+                        "<=" -> elseBranch = if(signed) Opcode.BGTS else Opcode.BGT
+                        ">=" -> elseBranch = if(signed) Opcode.BLTS else Opcode.BLT
                         else -> throw AssemblyError("invalid comparison operator")
                     }
                     if (ifElse.elseScope.children.isNotEmpty()) {
                         // if and else parts
                         val elseLabel = createLabelName()
                         val afterIfLabel = createLabelName()
-                        addInstr(
-                            result, IRInstruction(
-                                elseBranchOpcode, branchDt,
-                                reg1 = leftTr.resultReg, immediate = number,
-                                labelSymbol = elseLabel
-                            ), null
-                        )
+                        if(useCmpi) {
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.CMPI, branchDt, reg1 = leftTr.resultReg, immediate = number)
+                                it += IRInstruction(elseBranch, labelSymbol = elseLabel)
+                            }
+                        } else
+                            addInstr(result, IRInstruction(elseBranch, branchDt, reg1 = leftTr.resultReg, immediate = number, labelSymbol = elseLabel), null)
                         result += translateNode(ifElse.ifScope)
                         addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
                         result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
@@ -1279,52 +1389,56 @@ class IRCodeGen(
                     } else {
                         // only if part
                         val afterIfLabel = createLabelName()
-                        addInstr(
-                            result, IRInstruction(
-                                elseBranchOpcode, branchDt,
-                                reg1 = leftTr.resultReg, immediate = number,
-                                labelSymbol = afterIfLabel
-                            ), null
-                        )
+                        if(useCmpi) {
+                            result += IRCodeChunk(null, null).also {
+                                it += IRInstruction(Opcode.CMPI, branchDt, reg1 = leftTr.resultReg, immediate = number)
+                                it += IRInstruction(elseBranch, labelSymbol = afterIfLabel)
+                            }
+                        } else
+                            addInstr(result, IRInstruction(elseBranch, branchDt, reg1 = leftTr.resultReg, immediate = number, labelSymbol = afterIfLabel), null)
                         result += translateNode(ifElse.ifScope)
                         result += IRCodeChunk(afterIfLabel, null)
                     }
                 } else {
                     val rightTr = expressionEval.translateExpression(condition.right)
+                    val elseBranch: Opcode
+                    var useCmp = false
                     addToResult(result, rightTr, rightTr.resultReg, -1)
                     when (condition.operator) {
                         "==" -> {
-                            elseBranchOpcode = Opcode.BNER
+                            useCmp = true
+                            elseBranch = Opcode.BSTNE
                             elseBranchFirstReg = leftTr.resultReg
                             elseBranchSecondReg = rightTr.resultReg
                         }
                         "!=" -> {
-                            elseBranchOpcode = Opcode.BEQR
+                            useCmp = true
+                            elseBranch = Opcode.BSTEQ
                             elseBranchFirstReg = leftTr.resultReg
                             elseBranchSecondReg = rightTr.resultReg
                         }
                         "<" -> {
                             // else part when left >= right
-                            elseBranchOpcode = if (signed) Opcode.BGESR else Opcode.BGER
+                            elseBranch = if (signed) Opcode.BGESR else Opcode.BGER
                             elseBranchFirstReg = leftTr.resultReg
                             elseBranchSecondReg = rightTr.resultReg
                         }
                         ">" -> {
                             // else part when left <= right --> right >= left
-                            elseBranchOpcode = if (signed) Opcode.BGESR else Opcode.BGER
+                            elseBranch = if (signed) Opcode.BGESR else Opcode.BGER
                             elseBranchFirstReg = rightTr.resultReg
                             elseBranchSecondReg = leftTr.resultReg
                         }
                         "<=" -> {
                             // else part when left > right
-                            elseBranchOpcode = if (signed) Opcode.BGTSR else Opcode.BGTR
+                            elseBranch = if (signed) Opcode.BGTSR else Opcode.BGTR
                             elseBranchFirstReg = leftTr.resultReg
                             elseBranchSecondReg = rightTr.resultReg
                         }
 
                         ">=" -> {
                             // else part when left < right --> right > left
-                            elseBranchOpcode = if (signed) Opcode.BGTSR else Opcode.BGTR
+                            elseBranch = if (signed) Opcode.BGTSR else Opcode.BGTR
                             elseBranchFirstReg = rightTr.resultReg
                             elseBranchSecondReg = leftTr.resultReg
                         }
@@ -1334,13 +1448,14 @@ class IRCodeGen(
                         // if and else parts
                         val elseLabel = createLabelName()
                         val afterIfLabel = createLabelName()
-                        addInstr(
-                            result, IRInstruction(
-                                elseBranchOpcode, branchDt,
-                                reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg,
-                                labelSymbol = elseLabel
-                            ), null
-                        )
+                        if(useCmp) {
+                            result += IRCodeChunk(null,null).also {
+                                it += IRInstruction(Opcode.CMP, branchDt, reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg)
+                                it += IRInstruction(elseBranch, labelSymbol = elseLabel)
+                            }
+                        } else {
+                            addInstr(result, IRInstruction(elseBranch, branchDt, reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg, labelSymbol = elseLabel), null)
+                        }
                         result += translateNode(ifElse.ifScope)
                         addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
                         result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
@@ -1348,13 +1463,14 @@ class IRCodeGen(
                     } else {
                         // only if part
                         val afterIfLabel = createLabelName()
-                        addInstr(
-                            result, IRInstruction(
-                                elseBranchOpcode, branchDt,
-                                reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg,
-                                labelSymbol = afterIfLabel
-                            ), null
-                        )
+                        if(useCmp) {
+                            result += IRCodeChunk(null,null).also {
+                                it += IRInstruction(Opcode.CMP, branchDt, reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg)
+                                it += IRInstruction(elseBranch, labelSymbol = afterIfLabel)
+                            }
+                        } else {
+                            addInstr(result, IRInstruction(elseBranch, branchDt, reg1 = elseBranchFirstReg, reg2 = elseBranchSecondReg, labelSymbol = afterIfLabel), null)
+                        }
                         result += translateNode(ifElse.ifScope)
                         result += IRCodeChunk(afterIfLabel, null)
                     }
@@ -1525,12 +1641,15 @@ class IRCodeGen(
         addToResult(result, countTr, countTr.resultReg, -1)
         if(constIntValue(repeat.count)==null) {
             // check if the counter is already zero
-            addInstr(result, IRInstruction(Opcode.BEQ, irDt, reg1=countTr.resultReg, immediate = 0, labelSymbol = skipRepeatLabel), null)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.CMPI, irDt, reg1=countTr.resultReg, immediate = 0)
+                it += IRInstruction(Opcode.BSTEQ, labelSymbol = skipRepeatLabel)
+            }
         }
         result += labelFirstChunk(translateNode(repeat.statements), repeatLabel)
         result += IRCodeChunk(null, null).also {
-            it += IRInstruction(Opcode.DEC, irDt, reg1 = countTr.resultReg)
-            it += IRInstruction(Opcode.BNE, irDt, reg1 = countTr.resultReg, immediate = 0, labelSymbol = repeatLabel)
+            it += IRInstruction(Opcode.DEC, irDt, reg1 = countTr.resultReg)  // sets status bits
+            it += IRInstruction(Opcode.BSTNE, labelSymbol = repeatLabel)
         }
         result += IRCodeChunk(skipRepeatLabel, null)
         return result

codeGenIntermediate/src/prog8/codegen/intermediate/IRUnusedCodeRemover.kt

@@ -25,18 +25,29 @@ class IRUnusedCodeRemover(
     }
 
     private fun pruneSymboltable(blockLabel: String) {
-        // we could clean up the SymbolTable as well, but ONLY if these symbols aren't referenced somewhere still in an instruction
+        // we could clean up the SymbolTable as well, but ONLY if these symbols aren't referenced somewhere still in an instruction or variable initializer value
         val prefix = "$blockLabel."
         val blockVars = irprog.st.allVariables().filter { it.name.startsWith(prefix) }
         blockVars.forEach { stVar ->
-            irprog. allSubs().flatMap { it.chunks }.forEach { chunk ->
+            irprog.allSubs().flatMap { it.chunks }.forEach { chunk ->
                 chunk.instructions.forEach { ins ->
                     if(ins.labelSymbol == stVar.name) {
-                        return
+                        return  // symbol occurs in an instruction
                     }
                 }
             }
+
+            irprog.st.allVariables().forEach { stVar->
+                val initValue = stVar.onetimeInitializationArrayValue
+                if(initValue!=null && !initValue.isEmpty()) {
+                    if(initValue.any {
+                        it.addressOfSymbol?.startsWith(blockLabel)==true
+                    })
+                        return   // symbol occurs in an initializer value (address-of this symbol)_
+                }
+            }
         }
+
         irprog.st.removeTree(blockLabel)
     }
 
@@ -207,9 +218,7 @@ class IRUnusedCodeRemover(
         return removeUnlinkedChunks(linkedChunks)
     }
 
-    private fun removeUnlinkedChunks(
-        linkedChunks: Set<IRCodeChunkBase>
-    ): Int {
+    private fun removeUnlinkedChunks(linkedChunks: Set<IRCodeChunkBase>): Int {
         var numRemoved = 0
         irprog.foreachSub { sub ->
             sub.chunks.withIndex().reversed().forEach { (index, chunk) ->

codeGenIntermediate/test/TestVmCodeGen.kt

@@ -41,7 +41,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("pi", DataType.UBYTE, ZeropageWish.DONTCARE, PtNumber(DataType.UBYTE, 0.0, Position.DUMMY), null, Position.DUMMY))
         sub.add(PtVariable("particleX", DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, 3u, Position.DUMMY))
@@ -91,7 +91,7 @@ class TestVmCodeGen: FunSpec({
         program.add(block)
 
         // define the "cx16.r0" virtual register
-        val cx16block = PtBlock("cx16", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val cx16block = PtBlock("cx16", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         cx16block.add(PtMemMapped("r0", DataType.UWORD, 100u, null, Position.DUMMY))
         program.add(cx16block)
 
@@ -120,7 +120,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -183,7 +183,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -242,7 +242,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -289,7 +289,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("sb1", DataType.BYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -352,7 +352,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("sb1", DataType.BYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -411,7 +411,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
         sub.add(PtVariable("ub1", DataType.UBYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
         val if1 = PtIfElse(Position.DUMMY)
@@ -451,7 +451,7 @@ class TestVmCodeGen: FunSpec({
 //}
         val codegen = VmCodeGen()
         val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
+        val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
         val romsub = PtAsmSub("routine", 0x5000u, setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
         block.add(romsub)
         val sub = PtSub("start", emptyList(), null, Position.DUMMY)
@@ -466,7 +466,11 @@ class TestVmCodeGen: FunSpec({
         val result = codegen.generate(program, st, options, errors) as VmAssemblyProgram
         val irChunks = (result.irProgram.blocks.first().children.single() as IRSubroutine).chunks
         irChunks.size shouldBe 1
-        val callInstr = irChunks.single().instructions.single()
+        irChunks[0].instructions.size shouldBe 2
+        val preparecallInstr = irChunks[0].instructions[0]
+        preparecallInstr.opcode shouldBe Opcode.PREPARECALL
+        preparecallInstr.immediate shouldBe 0
+        val callInstr = irChunks[0].instructions[1]
         callInstr.opcode shouldBe Opcode.CALL
         callInstr.address shouldBe 0x5000
     }

codeOptimizers/build.gradle

@@ -33,10 +33,10 @@ dependencies {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
 }

codeOptimizers/src/prog8/optimizer/ConstantFoldingOptimizer.kt

@@ -19,12 +19,13 @@ import kotlin.math.floor
 class ConstantFoldingOptimizer(private val program: Program) : AstWalker() {
 
     override fun before(memread: DirectMemoryRead, parent: Node): Iterable<IAstModification> {
-        // @( &thing )  -->  thing
+        // @( &thing )  -->  thing  (but only if thing is a byte type!)
         val addrOf = memread.addressExpression as? AddressOf
-        return if(addrOf!=null)
-            listOf(IAstModification.ReplaceNode(memread, addrOf.identifier, parent))
-        else
-            noModifications
+        if(addrOf!=null) {
+            if(addrOf.identifier.inferType(program).isBytes)
+                return listOf(IAstModification.ReplaceNode(memread, addrOf.identifier, parent))
+        }
+        return noModifications
     }
 
     override fun after(containment: ContainmentCheck, parent: Node): Iterable<IAstModification> {

codeOptimizers/src/prog8/optimizer/ConstantIdentifierReplacer.kt

@@ -276,107 +276,10 @@ internal class ConstantIdentifierReplacer(private val program: Program, private
                         return listOf(IAstModification.ReplaceNode(decl.value!!, newValue, decl))
                     }
                 }
-                DataType.ARRAY_UB, DataType.ARRAY_B, DataType.ARRAY_UW, DataType.ARRAY_W, DataType.ARRAY_W_SPLIT, DataType.ARRAY_UW_SPLIT -> {
-                    val rangeExpr = decl.value as? RangeExpression
-                    if(rangeExpr!=null) {
-                        // convert the initializer range expression to an actual array
-                        val constRange = rangeExpr.toConstantIntegerRange()
-                        if(constRange?.isEmpty()==true) {
-                            if(constRange.first>constRange.last && constRange.step>=0)
-                                errors.err("descending range with positive step", decl.value?.position!!)
-                            else if(constRange.first<constRange.last && constRange.step<=0)
-                                errors.err("ascending range with negative step", decl.value?.position!!)
-                        }
-                        val declArraySize = decl.arraysize?.constIndex()
-                        if(declArraySize!=null && declArraySize!=rangeExpr.size())
-                            errors.err("range expression size (${rangeExpr.size()}) doesn't match declared array size ($declArraySize)", decl.value?.position!!)
-                        if(constRange!=null) {
-                            val eltType = rangeExpr.inferType(program).getOr(DataType.UBYTE)
-                            val newValue = if(eltType in ByteDatatypes) {
-                                ArrayLiteral(InferredTypes.InferredType.known(decl.datatype),
-                                        constRange.map { NumericLiteral(eltType, it.toDouble(), decl.value!!.position) }.toTypedArray(),
-                                        position = decl.value!!.position)
-                            } else {
-                                ArrayLiteral(InferredTypes.InferredType.known(decl.datatype),
-                                        constRange.map { NumericLiteral(eltType, it.toDouble(), decl.value!!.position) }.toTypedArray(),
-                                        position = decl.value!!.position)
-                            }
-                            return listOf(IAstModification.ReplaceNode(decl.value!!, newValue, decl))
-                        }
-                    }
-                    val numericLv = decl.value as? NumericLiteral
-                    if(numericLv!=null && numericLv.type== DataType.FLOAT)
-                        errors.err("arraysize requires only integers here", numericLv.position)
-                    val size = decl.arraysize?.constIndex() ?: return noModifications
-                    if (rangeExpr==null && numericLv!=null) {
-                        // arraysize initializer is empty or a single int, and we know the size; create the arraysize.
-                        val fillvalue = numericLv.number.toInt()
-                        when(decl.datatype){
-                            DataType.ARRAY_UB -> {
-                                if(fillvalue !in 0..255)
-                                    errors.err("ubyte value overflow", numericLv.position)
-                            }
-                            DataType.ARRAY_B -> {
-                                if(fillvalue !in -128..127)
-                                    errors.err("byte value overflow", numericLv.position)
-                            }
-                            DataType.ARRAY_UW -> {
-                                if(fillvalue !in 0..65535)
-                                    errors.err("uword value overflow", numericLv.position)
-                            }
-                            DataType.ARRAY_W -> {
-                                if(fillvalue !in -32768..32767)
-                                    errors.err("word value overflow", numericLv.position)
-                            }
-                            else -> {}
-                        }
-                        // create the array itself, filled with the fillvalue.
-                        val array = Array(size) {fillvalue}.map { NumericLiteral(ArrayToElementTypes.getValue(decl.datatype), it.toDouble(), numericLv.position) }.toTypedArray<Expression>()
-                        val refValue = ArrayLiteral(InferredTypes.InferredType.known(decl.datatype), array, position = numericLv.position)
-                        return listOf(IAstModification.ReplaceNode(decl.value!!, refValue, decl))
-                    }
-                }
-                DataType.ARRAY_F -> {
-                    val rangeExpr = decl.value as? RangeExpression
-                    if(rangeExpr!=null) {
-                        // convert the initializer range expression to an actual array of floats
-                        val declArraySize = decl.arraysize?.constIndex()
-                        if(declArraySize!=null && declArraySize!=rangeExpr.size())
-                            errors.err("range expression size (${rangeExpr.size()}) doesn't match declared array size ($declArraySize)", decl.value?.position!!)
-                        val constRange = rangeExpr.toConstantIntegerRange()
-                        if(constRange!=null) {
-                            val newValue = ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_F),
-                                    constRange.map { NumericLiteral(DataType.FLOAT, it.toDouble(), decl.value!!.position) }.toTypedArray(),
-                                    position = decl.value!!.position)
-                            return listOf(IAstModification.ReplaceNode(decl.value!!, newValue, decl))
-                        }
-                    }
-
-                    val numericLv = decl.value as? NumericLiteral
-                    val size = decl.arraysize?.constIndex() ?: return noModifications
-                    if(rangeExpr==null && numericLv!=null) {
-                        // arraysize initializer is a single int, and we know the size.
-                        val fillvalue = numericLv.number
-                        if (fillvalue < compTarget.machine.FLOAT_MAX_NEGATIVE || fillvalue > compTarget.machine.FLOAT_MAX_POSITIVE)
-                            errors.err("float value overflow", numericLv.position)
-                        else {
-                            // create the array itself, filled with the fillvalue.
-                            val array = Array(size) {fillvalue}.map { NumericLiteral(DataType.FLOAT, it, numericLv.position) }.toTypedArray<Expression>()
-                            val refValue = ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_F), array, position = numericLv.position)
-                            return listOf(IAstModification.ReplaceNode(decl.value!!, refValue, decl))
-                        }
-                    }
-                }
-                DataType.ARRAY_BOOL -> {
-                    val numericLv = decl.value as? NumericLiteral
-                    val size = decl.arraysize?.constIndex() ?: return noModifications
-                    if(numericLv!=null) {
-                        // arraysize initializer is a single int, and we know the size.
-                        val fillvalue = if(numericLv.number==0.0) 0.0 else 1.0
-                        val array = Array(size) {fillvalue}.map { NumericLiteral(DataType.UBYTE, fillvalue, numericLv.position) }.toTypedArray<Expression>()
-                        val refValue = ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_BOOL), array, position = numericLv.position)
-                        return listOf(IAstModification.ReplaceNode(decl.value!!, refValue, decl))
-                    }
+                in ArrayDatatypes -> {
+                    val replacedArrayInitializer = createConstArrayInitializerValue(decl)
+                    if(replacedArrayInitializer!=null)
+                        return listOf(IAstModification.ReplaceNode(decl.value!!, replacedArrayInitializer, decl))
                 }
                 else -> {
                     // nothing to do for this type
@@ -386,4 +289,109 @@ internal class ConstantIdentifierReplacer(private val program: Program, private
 
         return noModifications
     }
+
+    private fun createConstArrayInitializerValue(decl: VarDecl): ArrayLiteral? {
+        // convert the initializer range expression from a range or int, to an actual array.
+
+        when(decl.datatype) {
+            DataType.ARRAY_UB, DataType.ARRAY_B, DataType.ARRAY_UW, DataType.ARRAY_W, DataType.ARRAY_W_SPLIT, DataType.ARRAY_UW_SPLIT -> {
+                val rangeExpr = decl.value as? RangeExpression
+                if(rangeExpr!=null) {
+                    val constRange = rangeExpr.toConstantIntegerRange()
+                    if(constRange?.isEmpty()==true) {
+                        if(constRange.first>constRange.last && constRange.step>=0)
+                            errors.err("descending range with positive step", decl.value?.position!!)
+                        else if(constRange.first<constRange.last && constRange.step<=0)
+                            errors.err("ascending range with negative step", decl.value?.position!!)
+                    }
+                    val declArraySize = decl.arraysize?.constIndex()
+                    if(declArraySize!=null && declArraySize!=rangeExpr.size())
+                        errors.err("range expression size (${rangeExpr.size()}) doesn't match declared array size ($declArraySize)", decl.value?.position!!)
+                    if(constRange!=null) {
+                        val eltType = rangeExpr.inferType(program).getOr(DataType.UBYTE)
+                        return if(eltType in ByteDatatypes) {
+                            ArrayLiteral(InferredTypes.InferredType.known(decl.datatype),
+                                constRange.map { NumericLiteral(eltType, it.toDouble(), decl.value!!.position) }.toTypedArray(),
+                                position = decl.value!!.position)
+                        } else {
+                            ArrayLiteral(InferredTypes.InferredType.known(decl.datatype),
+                                constRange.map { NumericLiteral(eltType, it.toDouble(), decl.value!!.position) }.toTypedArray(),
+                                position = decl.value!!.position)
+                        }
+                    }
+                }
+                val numericLv = decl.value as? NumericLiteral
+                if(numericLv!=null && numericLv.type== DataType.FLOAT)
+                    errors.err("arraysize requires only integers here", numericLv.position)
+                val size = decl.arraysize?.constIndex() ?: return null
+                if (rangeExpr==null && numericLv!=null) {
+                    // arraysize initializer is empty or a single int, and we know the size; create the arraysize.
+                    val fillvalue = numericLv.number.toInt()
+                    when(decl.datatype){
+                        DataType.ARRAY_UB -> {
+                            if(fillvalue !in 0..255)
+                                errors.err("ubyte value overflow", numericLv.position)
+                        }
+                        DataType.ARRAY_B -> {
+                            if(fillvalue !in -128..127)
+                                errors.err("byte value overflow", numericLv.position)
+                        }
+                        DataType.ARRAY_UW -> {
+                            if(fillvalue !in 0..65535)
+                                errors.err("uword value overflow", numericLv.position)
+                        }
+                        DataType.ARRAY_W -> {
+                            if(fillvalue !in -32768..32767)
+                                errors.err("word value overflow", numericLv.position)
+                        }
+                        else -> {}
+                    }
+                    // create the array itself, filled with the fillvalue.
+                    val array = Array(size) {fillvalue}.map { NumericLiteral(ArrayToElementTypes.getValue(decl.datatype), it.toDouble(), numericLv.position) }.toTypedArray<Expression>()
+                    return ArrayLiteral(InferredTypes.InferredType.known(decl.datatype), array, position = numericLv.position)
+                }
+            }
+            DataType.ARRAY_F -> {
+                val rangeExpr = decl.value as? RangeExpression
+                if(rangeExpr!=null) {
+                    // convert the initializer range expression to an actual array of floats
+                    val declArraySize = decl.arraysize?.constIndex()
+                    if(declArraySize!=null && declArraySize!=rangeExpr.size())
+                        errors.err("range expression size (${rangeExpr.size()}) doesn't match declared array size ($declArraySize)", decl.value?.position!!)
+                    val constRange = rangeExpr.toConstantIntegerRange()
+                    if(constRange!=null) {
+                        return ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_F),
+                            constRange.map { NumericLiteral(DataType.FLOAT, it.toDouble(), decl.value!!.position) }.toTypedArray(),
+                            position = decl.value!!.position)
+                    }
+                }
+
+                val numericLv = decl.value as? NumericLiteral
+                val size = decl.arraysize?.constIndex() ?: return null
+                if(rangeExpr==null && numericLv!=null) {
+                    // arraysize initializer is a single int, and we know the size.
+                    val fillvalue = numericLv.number
+                    if (fillvalue < compTarget.machine.FLOAT_MAX_NEGATIVE || fillvalue > compTarget.machine.FLOAT_MAX_POSITIVE)
+                        errors.err("float value overflow", numericLv.position)
+                    else {
+                        // create the array itself, filled with the fillvalue.
+                        val array = Array(size) {fillvalue}.map { NumericLiteral(DataType.FLOAT, it, numericLv.position) }.toTypedArray<Expression>()
+                        return ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_F), array, position = numericLv.position)
+                    }
+                }
+            }
+            DataType.ARRAY_BOOL -> {
+                val numericLv = decl.value as? NumericLiteral
+                val size = decl.arraysize?.constIndex() ?: return null
+                if(numericLv!=null) {
+                    // arraysize initializer is a single int, and we know the size.
+                    val fillvalue = if(numericLv.number==0.0) 0.0 else 1.0
+                    val array = Array(size) {fillvalue}.map { NumericLiteral(DataType.UBYTE, fillvalue, numericLv.position) }.toTypedArray<Expression>()
+                    return ArrayLiteral(InferredTypes.InferredType.known(DataType.ARRAY_BOOL), array, position = numericLv.position)
+                }
+            }
+            else -> return null
+        }
+        return null
+    }
 }

codeOptimizers/src/prog8/optimizer/StatementOptimizer.kt

@@ -30,7 +30,7 @@ class StatementOptimizer(private val program: Program,
         if(functionCallStatement.target.nameInSource==listOf("txt", "print")) {
             val arg = functionCallStatement.args.single()
             val stringVar: IdentifierReference? = if(arg is AddressOf) {
-                arg.identifier
+                if(arg.arrayIndex==null) arg.identifier else null
             } else {
                 arg as? IdentifierReference
             }

compiler/build.gradle

@@ -33,14 +33,14 @@ dependencies {
     implementation project(':codeGenIntermediate')
     implementation project(':codeGenExperimental')
     implementation project(':virtualmachine')
-    implementation "org.antlr:antlr4-runtime:4.12.0"
+    implementation "org.antlr:antlr4-runtime:4.13.1"
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
-    implementation 'org.jetbrains.kotlinx:kotlinx-cli:0.3.5'
+    implementation 'org.jetbrains.kotlinx:kotlinx-cli:0.3.6'
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.18"
 
     testImplementation project(':intermediate')
-    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.6.2'
+    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.7.2'
 }
 
 configurations.all {
@@ -59,10 +59,10 @@ configurations {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
     test {

compiler/res/prog8lib/c128/graphics.p8

@@ -1,62 +0,0 @@
-%import syslib
-%import textio
-
-; Bitmap pixel graphics module for the Commodore 128
-
-; TODO c128 actually implement the graphics routines. Ideally a way to 'borrow' the code form the C64 version without just copy-pasting that here?
-
-graphics {
-    %option no_symbol_prefixing
-
-    const uword WIDTH = 320
-    const ubyte HEIGHT = 200
-
-    sub enable_bitmap_mode() {
-        ; enable bitmap screen, erase it and set colors to black/white.
-        ; TODO
-    }
-
-    sub disable_bitmap_mode() {
-        ; enables text mode, erase the text screen, color white
-        ; TODO
-    }
-
-
-    sub clear_screen(ubyte pixelcolor, ubyte bgcolor) {
-        ; TODO
-    }
-
-    sub line(uword @zp x1, ubyte @zp y1, uword @zp x2, ubyte @zp y2) {
-        ; TODO
-    }
-
-    sub fillrect(uword x, uword y, uword width, uword height) {
-        ; TODO
-    }
-
-    sub rect(uword x, uword y, uword width, uword height) {
-        ; TODO
-    }
-
-    sub horizontal_line(uword x, uword y, uword length) {
-        ; TODO
-    }
-
-    sub vertical_line(uword x, uword y, uword height) {
-        ; TODO
-    }
-
-    sub circle(uword xcenter, ubyte ycenter, ubyte radius) {
-        ; TODO
-    }
-
-    sub disc(uword xcenter, ubyte ycenter, ubyte radius) {
-        ; TODO
-    }
-
-    inline asmsub  plot(uword plotx @R0, uword ploty @R1) clobbers(A, X, Y) {
-        %asm {{
-            nop     ; TODO
-        }}
-    }
-}

compiler/res/prog8lib/c64/graphics.p8

@@ -10,15 +10,16 @@ graphics {
     const uword WIDTH = 320
     const ubyte HEIGHT = 200
 
-    const uword BITMAP_ADDRESS = $6000      ; MUST BE IN REGULAR RAM if you are not messing with ROM/RAM banking.
-    const uword CHARS_ADDRESS = $5c00       ; must be in same vic bank as the bitmap
+    const uword BITMAP_ADDRESS = $6000      ; MUST BE IN REGULAR RAM if you are not messing with ROM/RAM banking. (and $2000-aligned)
+                                            ; note: this constant is also used in a asm multiplication table below!
+    const uword CHARS_ADDRESS = $5c00       ; must be in same vic memory bank as the bitmap.
 
     sub enable_bitmap_mode() {
         ; enable bitmap screen, erase it and set colors to black/white.
         clear_screen(1, 0)
         c64.SCROLY = %00111011      ; enable bitmap graphics mode
         c64.SCROLX = %00001000      ; 40 column mode, no scrolling, multicolor bitmap off
-        c64.VMCSB = (lsb(CHARS_ADDRESS >> 6) & $F0) | (((BITMAP_ADDRESS & $3fff) / $0800) << 1)     ; set bitmap address
+        c64.VMCSB = (lsb(CHARS_ADDRESS >> 6) & $F0) | (lsb((BITMAP_ADDRESS & $3fff) / $0800) << 1)     ; set bitmap address
         c64.CIA2DDRA |= %11
         c64.CIA2PRA = lsb(BITMAP_ADDRESS >> 14) ^ 3     ; set VIC bank.
     }

compiler/res/prog8lib/c64/syslib.p8

@@ -136,7 +136,8 @@ c64 {
     %option no_symbol_prefixing
 
         ; the default locations of the 8 sprite pointers (store address of sprite / 64)
-        ; (depending on the VIC bank and screen ram address selection these can be shifted around though)
+        ; (depending on the VIC bank and screen ram address selection these can be shifted around though,
+        ; see the two routines after this for a dynamic way of determining the correct memory location)
         &ubyte  SPRPTR0         = 2040
         &ubyte  SPRPTR1         = 2041
         &ubyte  SPRPTR2         = 2042
@@ -285,6 +286,39 @@ c64 {
 
 ; ---- end of SID registers ----
 
+
+    sub get_vic_memory_base() -> uword {
+        ; one of the 4 possible banks. $0000/$4000/$8000/$c000.
+        c64.CIA2DDRA |= %11
+        return ((c64.CIA2PRA & 3) ^ 3) as uword << 14
+    }
+
+    sub get_char_matrix_ptr() -> uword {
+        ; Usually the character screen matrix is at 1024-2039 (see above)
+        ; However the vic memory configuration can be altered and this moves these registers with it.
+        ; So this routine determines it dynamically from the VIC memory setup.
+        uword chars_matrix_offset = (c64.VMCSB & $f0) as uword << 6
+        return get_vic_memory_base() + chars_matrix_offset
+    }
+
+    sub get_bitmap_ptr() -> uword {
+        return get_vic_memory_base() + ((c64.VMCSB & %00001000) as uword << 10)
+    }
+
+    sub get_sprite_addr_ptrs() -> uword {
+        ; Usually the sprite address pointers are at addresses 2040-2047 (see above)
+        ; However the vic memory configuration can be altered and this moves these registers with it.
+        ; So this routine determines it dynamically from the VIC memory setup.
+        return get_char_matrix_ptr() + 1016
+    }
+
+    sub set_sprite_ptr(ubyte sprite_num, uword sprite_data_address) {
+        ; Sets the sprite data pointer to the given address.
+        ; Because it takes some time to calculate things based on the vic memory setup,
+        ; its only suitable if you're not continuously changing the data address.
+        ; Otherwise store the correct sprite data pointer location somewhere yourself and reuse it.
+        @(get_sprite_addr_ptrs() + sprite_num) = lsb(sprite_data_address / 64)
+    }
 }
 
 sys {

compiler/res/prog8lib/cx16/diskio.p8

@@ -8,22 +8,33 @@
 diskio {
     %option no_symbol_prefixing
 
+    const ubyte READ_IO_CHANNEL=12
+    const ubyte WRITE_IO_CHANNEL=13
+
     ubyte drivenumber = 8
 
     sub set_drive(ubyte number) {
         drivenumber = number
     }
 
+    sub reset_read_channel() {
+        void cbm.CHKIN(READ_IO_CHANNEL)
+    }
+
+    sub reset_write_channel() {
+        cbm.CHKOUT(WRITE_IO_CHANNEL)
+    }
+
     sub directory() -> bool {
         ; -- Prints the directory contents to the screen. Returns success.
 
         cbm.SETNAM(1, "$")
-        cbm.SETLFS(12, drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, 0)
         ubyte status = 1
         void cbm.OPEN()          ; open 12,8,0,"$"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -61,7 +72,7 @@ diskio {
 
 io_error:
         cbm.CLRCHN()        ; restore default i/o devices
-        cbm.CLOSE(12)
+        cbm.CLOSE(READ_IO_CHANNEL)
 
         if status and status & $40 == 0 {            ; bit 6=end of file
             txt.print("\ni/o error, status: ")
@@ -76,12 +87,12 @@ io_error:
     sub diskname() -> uword {
         ; returns disk label name or 0 if error
         cbm.SETNAM(3, "$")
-        cbm.SETLFS(12, diskio.drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, diskio.drivenumber, 0)
         ubyte status = 1
         void cbm.OPEN()          ; open 12,8,0,"$=c"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -106,7 +117,7 @@ io_error:
 
 io_error:
         cbm.CLRCHN()
-        cbm.CLOSE(12)
+        cbm.CLOSE(READ_IO_CHANNEL)
         if status and status & $40 == 0
             return 0
         return diskio.list_filename
@@ -124,7 +135,7 @@ io_error:
 
     sub list_filenames(uword pattern_ptr, uword filenames_buffer, uword filenames_buf_size) -> ubyte {
         ; -- fill the provided buffer with the names of the files on the disk (until buffer is full).
-        ;    Files in the buffer are separeted by a 0 byte. You can provide an optional pattern to match against.
+        ;    Files in the buffer are separated by a 0 byte. You can provide an optional pattern to match against.
         ;    After the last filename one additional 0 byte is placed to indicate the end of the list.
         ;    Returns number of files (it skips 'dir' entries i.e. subdirectories).
         ;    Also sets carry on exit: Carry clear = all files returned, Carry set = directory has more files that didn't fit in the buffer.
@@ -150,7 +161,7 @@ io_error:
         return files_found
     }
 
-    ; ----- iterative file lister functions (uses io channel 12) -----
+    ; ----- iterative file lister functions (uses the read io channel) -----
 
     sub lf_start_list(uword pattern_ptr) -> bool {
         ; -- start an iterative file listing with optional pattern matching.
@@ -161,11 +172,11 @@ io_error:
         iteration_in_progress = true
 
         cbm.SETNAM(1, "$")
-        cbm.SETLFS(12, drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, 0)
         void cbm.OPEN()          ; open 12,8,0,"$"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -190,7 +201,7 @@ io_error:
             return false
 
         repeat {
-            void cbm.CHKIN(12)        ; use #12 as input channel again
+            reset_read_channel()        ; use the input io channel again
 
             uword nameptr = &list_filename
             ubyte blocks_lsb = cbm.CHRIN()
@@ -251,13 +262,13 @@ close_end:
         ; -- end an iterative file listing session (close channels).
         if iteration_in_progress {
             cbm.CLRCHN()
-            cbm.CLOSE(12)
+            cbm.CLOSE(READ_IO_CHANNEL)
             iteration_in_progress = false
         }
     }
 
 
-    ; ----- iterative file loader functions (uses io channel 12) -----
+    ; ----- iterative file loader functions (uses the read io channel) -----
 
     sub f_open(uword filenameptr) -> bool {
         ; -- open a file for iterative reading with f_read
@@ -265,18 +276,18 @@ close_end:
         f_close()
 
         cbm.SETNAM(string.length(filenameptr), filenameptr)
-        cbm.SETLFS(12, drivenumber, 12)     ; note: has to be 12,x,12 because otherwise f_seek doesn't work
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, READ_IO_CHANNEL)     ; note: has to be Channel,x,Channel because otherwise f_seek doesn't work
         void cbm.OPEN()          ; open 12,8,12,"filename"
         if_cc {
             if cbm.READST()==0 {
                 iteration_in_progress = true
-                void cbm.CHKIN(12)          ; use #12 as input channel
+                reset_read_channel()
                 if_cc {
                     void cbm.CHRIN()        ; read first byte to test for file not found
                     if not cbm.READST() {
-                        cbm.CLOSE(12)           ; close file because we already consumed first byte
+                        cbm.CLOSE(READ_IO_CHANNEL)           ; close file because we already consumed first byte
                         void cbm.OPEN()         ; re-open the file
-                        void cbm.CHKIN(12)
+                        cbm.CLRCHN()            ; reset default i/o channels
                         return true
                     }
                 }
@@ -290,21 +301,22 @@ close_end:
     sub f_read(uword bufferpointer, uword num_bytes) -> uword {
         ; -- read from the currently open file, up to the given number of bytes.
         ;    returns the actual number of bytes read.  (checks for End-of-file and error conditions)
-        ;    NOTE: cannot be used to load into VRAM.  Use vload() or call cx16.macptr() yourself with the vera data register as address.
+        ;    NOTE: cannot be used to load into VRAM.  Use vload() or call cx16.MACPTR() yourself with the vera data register as address.
         if not iteration_in_progress or not num_bytes
             return 0
 
+        reset_read_channel()
         list_blocks = 0     ; we reuse this variable for the total number of bytes read
 
-        ; commander X16 supports fast block-read via macptr() kernal call
+        ; commander X16 supports fast block-read via MACPTR() kernal call
         uword readsize
         while num_bytes {
             readsize = 255
             if num_bytes<readsize
                 readsize = num_bytes
-            readsize = cx16.macptr(lsb(readsize), bufferpointer, false)
+            readsize = cx16.MACPTR(lsb(readsize), bufferpointer, false)
             if_cs
-                goto byte_read_loop     ; macptr block read not supported, do fallback loop
+                goto byte_read_loop     ; MACPTR block read not supported, do fallback loop
             list_blocks += readsize
             bufferpointer += readsize
             if msb(bufferpointer) == $c0
@@ -317,7 +329,7 @@ close_end:
         }
         return list_blocks  ; number of bytes read
 
-byte_read_loop:         ; fallback if macptr() isn't supported on the device
+byte_read_loop:         ; fallback if MACPTR isn't supported on the device
         %asm {{
             lda  bufferpointer
             sta  m_in_buffer+1
@@ -348,10 +360,11 @@ m_in_buffer     sta  $ffff
     ; optimized for Commander X16 to use MACPTR block read kernal call
     sub f_read_all(uword bufferpointer) -> uword {
         ; -- read the full contents of the file, returns number of bytes read.
-        ;    NOTE: cannot be used to load into VRAM.  Use vload() or call cx16.macptr() yourself with the vera data register as address.
+        ;    NOTE: cannot be used to load into VRAM.  Use vload() or call cx16.MACPTR() yourself with the vera data register as address.
         if not iteration_in_progress
             return 0
 
+        reset_read_channel()
         uword total_read = 0
         while not cbm.READST() {
             cx16.r0 = f_read(bufferpointer, 256)
@@ -370,8 +383,7 @@ m_in_buffer     sta  $ffff
         %asm {{
             sta  P8ZP_SCRATCH_W1
             sty  P8ZP_SCRATCH_W1+1
-            ldx  #12
-            jsr  cbm.CHKIN              ; use channel 12 again for input
+            jsr  reset_read_channel
             ldy  #0
 _loop       jsr  cbm.CHRIN
             sta  (P8ZP_SCRATCH_W1),y
@@ -392,25 +404,23 @@ _end        rts
         ; -- end an iterative file loading session (close channels).
         if iteration_in_progress {
             cbm.CLRCHN()
-            cbm.CLOSE(12)
+            cbm.CLOSE(READ_IO_CHANNEL)
             iteration_in_progress = false
         }
     }
 
 
-    ; ----- iterative file writing functions (uses io channel 13) -----
+    ; ----- iterative file writing functions (uses write io channel) -----
 
     sub f_open_w(uword filenameptr) -> bool {
         ; -- open a file for iterative writing with f_write
         f_close_w()
 
         cbm.SETNAM(string.length(filenameptr), filenameptr)
-        cbm.SETLFS(13, drivenumber, 1)
+        cbm.SETLFS(WRITE_IO_CHANNEL, drivenumber, 1)
         void cbm.OPEN()             ; open 13,8,1,"filename"
-        if_cc {
-            cbm.CHKOUT(13)          ; use #13 as output channel
+        if_cc
             return not cbm.READST()
-        }
         f_close_w()
         return false
     }
@@ -418,7 +428,7 @@ _end        rts
     sub f_write(uword bufferpointer, uword num_bytes) -> bool {
         ; -- write the given number of bytes to the currently open file
         if num_bytes!=0 {
-            cbm.CHKOUT(13)        ; use #13 as output channel again
+            reset_write_channel()
             repeat num_bytes {
                 cbm.CHROUT(@(bufferpointer))
                 bufferpointer++
@@ -431,7 +441,7 @@ _end        rts
     sub f_close_w() {
         ; -- end an iterative file writing session (close channels).
         cbm.CLRCHN()
-        cbm.CLOSE(13)
+        cbm.CLOSE(WRITE_IO_CHANNEL)
     }
 
 
@@ -693,11 +703,11 @@ internal_vload:
         cx16.r12 = reversebuffer + MAX_PATH_LEN-1
         @(cx16.r12)=0
         cbm.SETNAM(3, "$=c")
-        cbm.SETLFS(12, diskio.drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, diskio.drivenumber, 0)
         void cbm.OPEN()          ; open 12,8,0,"$=c"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -734,7 +744,7 @@ internal_vload:
 
 io_error:
         cbm.CLRCHN()
-        cbm.CLOSE(12)
+        cbm.CLOSE(READ_IO_CHANNEL)
         if status and status & $40 == 0
             return 0
         if @(cx16.r12)==0 {
@@ -767,7 +777,7 @@ io_error:
     sub f_seek(uword pos_hiword, uword pos_loword) {
         ; -- seek in the reading file opened with f_open, to the given 32-bits position
         ubyte[6] command = ['p',0,0,0,0,0]
-        command[1] = 12       ; f_open uses channel 12
+        command[1] = READ_IO_CHANNEL       ; f_open uses the read io channel
         command[2] = lsb(pos_loword)
         command[3] = msb(pos_loword)
         command[4] = lsb(pos_hiword)
@@ -777,13 +787,14 @@ io_error:
         cbm.SETLFS(15, drivenumber, 15)
         void cbm.OPEN()
         cbm.CLOSE(15)
+        reset_read_channel()       ; back to the read io channel
     }
 
 
     ; NOTE: f_seek_w() doesn't work reliably right now. I only manage to corrupt the fat32 filesystem on the sdcard with it...
 ;    sub f_seek_w(uword pos_hiword, uword pos_loword) {
 ;        ; -- seek in the output file opened with f_open_w, to the given 32-bits position
-;        diskio.f_seek.command[1] = 13       ; f_open_w uses channel 13
+;        diskio.f_seek.command[1] = WRITE_IO_CHANNEL       ; f_open_w uses the write io channel
 ;        diskio.f_seek.command[2] = lsb(pos_loword)
 ;        diskio.f_seek.command[3] = msb(pos_loword)
 ;        diskio.f_seek.command[4] = lsb(pos_hiword)

compiler/res/prog8lib/cx16/emudbg.p8

@@ -0,0 +1,60 @@
+; Emulator debug interface.
+; Docs: https://github.com/X16Community/x16-emulator#debug-io-registers
+
+emudbg {
+
+    const uword EMU_BASE = $9fb0
+
+    &ubyte EMU_DBG_HOTKEY_ENABLED = EMU_BASE + 0
+    &ubyte EMU_LOG_VIDEO          = EMU_BASE + 1
+    &ubyte EMU_LOG_KEYBOARD       = EMU_BASE + 2
+    &ubyte EMU_ECHO_MODE          = EMU_BASE + 3
+    &ubyte EMU_SAVE_ON_EXIT       = EMU_BASE + 4
+    &ubyte EMU_RECORD_GIF         = EMU_BASE + 5
+    &ubyte EMU_RECORD_WAV         = EMU_BASE + 6
+    &ubyte EMU_CMDKEYS_DISABLED   = EMU_BASE + 7
+    &ubyte EMU_CPUCLK_L           = EMU_BASE + 8     ; write: reset cpu clock to 0
+    &ubyte EMU_CPUCLK_M           = EMU_BASE + 9     ; write: outputs "User debug 1: $xx"
+    &ubyte EMU_CPUCLK_H           = EMU_BASE + 10    ; write: outputs "User debug 2: $xx"
+    &ubyte EMU_CPUCLK_U           = EMU_BASE + 11    ; write: outputs as character to console
+    ; 12 is unused for now
+    &ubyte EMU_KEYMAP             = EMU_BASE + 13
+    &ubyte EMU_EMU_DETECT1        = EMU_BASE + 14
+    &ubyte EMU_EMU_DETECT2        = EMU_BASE + 15
+
+    sub is_emulator() -> bool {
+        ; Test for emulator presence.
+        ; It is recommended to only use the other debug routines if this returns true.
+        return EMU_EMU_DETECT1=='1' and EMU_EMU_DETECT2=='6'
+    }
+
+    asmsub console_write(str isoString @R0) clobbers(Y) {
+        %asm {{
+            ldy  #0
+-           lda  (cx16.r0),y
+            beq  +
+            sta  p8_EMU_CPUCLK_U
+            iny
+            bne  -
++
+        }}
+    }
+
+    asmsub console_chrout(ubyte char @A) {
+        %asm {{
+            sta  p8_EMU_CPUCLK_U
+        }}
+    }
+
+    asmsub console_value1(ubyte value @A) {
+        %asm {{
+            sta  p8_EMU_CPUCLK_M
+        }}
+    }
+
+    asmsub console_value2(ubyte value @A) {
+        %asm {{
+            sta  p8_EMU_CPUCLK_H
+        }}
+    }
+}

compiler/res/prog8lib/cx16/gfx2.p8

@@ -4,6 +4,7 @@
 ;
 ; No text layer is currently shown, text can be drawn as part of the bitmap itself.
 ; Note: for similar graphics routines that also work on the C-64, use the "graphics" module instead.
+; Note: for identical routines for a monochrome 1 bpp screen, use the "monogfx" module instead.
 ; Note: for color palette manipulation, use the "palette" module or write Vera registers yourself.
 ; Note: this library implements code for various resolutions and color depths. This takes up memory.
 ;       If you're memory constrained you should probably not use this built-in library,
@@ -12,13 +13,11 @@
 ;
 ; SCREEN MODE LIST:
 ;   mode 0 = reset back to default text mode
-;   mode 1 = bitmap 320 x 240 monochrome
-;   mode 2 = bitmap 320 x 240 x 4c (not yet implemented: just use 256c, there's enough vram for that)
+;   mode 1 = bitmap 320 x 240 x 256c (8 bpp)
+;   mode 2 = bitmap 640 x 480 x 4c (2 bpp. there's not enough vram for more colors in hires mode.)
 ;   mode 3 = bitmap 320 x 240 x 16c (not yet implemented: just use 256c, there's enough vram for that)
-;   mode 4 = bitmap 320 x 240 x 256c  (like SCREEN $80 but using this api instead of kernal)
-;   mode 5 = bitmap 640 x 480 monochrome
-;   mode 6 = bitmap 640 x 480 x 4c
-;   higher color dephts in highres are not supported due to lack of VRAM
+;   mode 4 = bitmap 320 x 240 x 4c (not yet implemented: just use 256c, there's enough vram for that)
+;   higher color depths in highres are not supported due to lack of VRAM
 
 gfx2 {
 
@@ -29,24 +28,11 @@ gfx2 {
     uword width = 0
     uword height = 0
     ubyte bpp = 0
-    bool monochrome_dont_stipple_flag = false            ; set to false to enable stippling mode in monochrome displaymodes
 
     sub screen_mode(ubyte mode) {
+        cx16.VERA_CTRL=0
         when mode {
             1 -> {
-                ; lores monochrome
-                cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
-                cx16.VERA_DC_HSCALE = 64
-                cx16.VERA_DC_VSCALE = 64
-                cx16.VERA_L1_CONFIG = %00000100
-                cx16.VERA_L1_MAPBASE = 0
-                cx16.VERA_L1_TILEBASE = 0
-                width = 320
-                height = 240
-                bpp = 1
-            }
-            ; TODO modes 2, 3
-            4 -> {
                 ; lores 256c
                 cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
                 cx16.VERA_DC_HSCALE = 64
@@ -58,19 +44,7 @@ gfx2 {
                 height = 240
                 bpp = 8
             }
-            5 -> {
-                ; highres monochrome
-                cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
-                cx16.VERA_DC_HSCALE = 128
-                cx16.VERA_DC_VSCALE = 128
-                cx16.VERA_L1_CONFIG = %00000100
-                cx16.VERA_L1_MAPBASE = 0
-                cx16.VERA_L1_TILEBASE = %00000001
-                width = 640
-                height = 480
-                bpp = 1
-            }
-            6 -> {
+            2 -> {
                 ; highres 4c
                 cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
                 cx16.VERA_DC_HSCALE = 128
@@ -96,43 +70,28 @@ gfx2 {
 
         active_mode = mode
         if bpp
-            clear_screen()
+            clear_screen(0)
     }
 
-    sub clear_screen() {
-        monochrome_stipple(false)
+    sub clear_screen(ubyte color) {
         position(0, 0)
         when active_mode {
             1 -> {
-                ; lores monochrome
-                repeat 240/2/8
-                    cs_innerloop640()
-            }
-            ; TODO modes 2, 3
-            4 -> {
                 ; lores 256c
                 repeat 240/2
-                    cs_innerloop640()
+                    cs_innerloop640(color)
             }
-            5 -> {
-                ; highres monochrome
-                repeat 480/8
-                    cs_innerloop640()
-            }
-            6 -> {
+            2 -> {
                 ; highres 4c
+                ubyte[] colors = [%00000000, %01010101, %10101010, %11111111]
+                color = colors[color&3]
                 repeat 480/4
-                    cs_innerloop640()
+                    cs_innerloop640(color)
             }
-            ; modes 7 and 8 not supported due to lack of VRAM
         }
         position(0, 0)
     }
 
-    sub monochrome_stipple(bool enable) {
-        monochrome_dont_stipple_flag = not enable
-    }
-
     sub rect(uword xx, uword yy, uword rwidth, uword rheight, ubyte color) {
         if rwidth==0 or rheight==0
             return
@@ -147,6 +106,8 @@ gfx2 {
     }
 
     sub fillrect(uword xx, uword yy, uword rwidth, uword rheight, ubyte color) {
+        ; Draw a filled rectangle of the given size and color.
+        ; To fill the whole screen, use clear_screen(color) instead - it is much faster.
         if rwidth==0
             return
         repeat rheight {
@@ -156,87 +117,10 @@ gfx2 {
     }
 
     sub horizontal_line(uword xx, uword yy, uword length, ubyte color) {
-        ubyte[9] masked_starts = [ 0, %00000001, %00000011, %00000111, %00001111, %00011111, %00111111, %01111111, %11111111]
-        ubyte[9] masked_ends   = [ 0, %10000000, %11000000, %11100000, %11110000, %11111000, %11111100, %11111110, %11111111]
-
         if length==0
             return
         when active_mode {
-            1, 5 -> {
-                ; monochrome modes, either resolution
-                ubyte separate_pixels = (8-lsb(xx)) & 7
-                if separate_pixels as uword > length
-                    separate_pixels = lsb(length)
-                if separate_pixels {
-                    if monochrome_dont_stipple_flag {
-                        position(xx,yy)
-                        cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off
-                        if color
-                            cx16.VERA_DATA0 |= masked_starts[separate_pixels]
-                        else
-                            cx16.VERA_DATA0 &= ~masked_starts[separate_pixels]
-                        xx += separate_pixels
-                    } else {
-                        repeat separate_pixels {
-                            plot(xx, yy, color)
-                            xx++
-                        }
-                    }
-                    length -= separate_pixels
-                }
-                if length {
-                    position(xx, yy)
-                    separate_pixels = lsb(length) & 7
-                    xx += length & $fff8
-                    %asm {{
-                        lsr  length+1
-                        ror  length
-                        lsr  length+1
-                        ror  length
-                        lsr  length+1
-                        ror  length
-                        lda  color
-                        bne  +
-                        ldy  #0     ; black
-                        bra  _loop
-+                       lda  monochrome_dont_stipple_flag
-                        beq  _stipple
-                        ldy  #255       ; don't stipple
-                        bra  _loop
-_stipple                lda  yy
-                        and  #1         ; determine stipple pattern to use
-                        bne  +
-                        ldy  #%01010101
-                        bra  _loop
-+                       ldy  #%10101010
-_loop                   lda  length
-                        ora  length+1
-                        beq  _done
-                        sty  cx16.VERA_DATA0
-                        lda  length
-                        bne  +
-                        dec  length+1
-+                       dec  length
-                        bra  _loop
-_done
-                    }}
-
-                    if monochrome_dont_stipple_flag {
-                        cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off
-                        if color
-                            cx16.VERA_DATA0 |= masked_ends[separate_pixels]
-                        else
-                            cx16.VERA_DATA0 &= ~masked_ends[separate_pixels]
-                    } else {
-                        repeat separate_pixels {
-                            plot(xx, yy, color)
-                            xx++
-                        }
-                    }
-                }
-                cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off again
-            }
-            4 -> {
+            1 -> {
                 ; lores 256c
                 position(xx, yy)
                 %asm {{
@@ -257,8 +141,8 @@ _done
 +
                 }}
             }
-            6 -> {
-                ; highres 4c ....also mostly usable for mode 2, lores 4c?
+            2 -> {
+                ; highres 4c ....also mostly usable for lores 4c?
                 color &= 3
                 ubyte[4] colorbits
                 ubyte ii
@@ -307,60 +191,7 @@ _done
 
     sub vertical_line(uword xx, uword yy, uword lheight, ubyte color) {
         when active_mode {
-            1, 5 -> {
-                ; monochrome, lo-res
-                cx16.r15L = gfx2.plot.maskbits[xx as ubyte & 7]           ; bitmask
-                if color {
-                    if monochrome_dont_stipple_flag {
-                        ; draw continuous line.
-                        position2(xx,yy,true)
-                        if active_mode==1
-                            set_both_strides(11)    ; 40 increment = 1 line in 320 px monochrome
-                        else
-                            set_both_strides(12)    ; 80 increment = 1 line in 640 px monochrome
-                        repeat lheight {
-                            %asm {{
-                                lda  cx16.VERA_DATA0
-                                ora  cx16.r15L
-                                sta  cx16.VERA_DATA1
-                            }}
-                        }
-                    } else {
-                        ; draw stippled line.
-                        if xx&1 {
-                            yy++
-                            lheight--
-                        }
-                        position2(xx,yy,true)
-                        if active_mode==1
-                            set_both_strides(12)    ; 80 increment = 2 line in 320 px monochrome
-                        else
-                            set_both_strides(13)    ; 160 increment = 2 line in 640 px monochrome
-                        repeat lheight/2 {
-                            %asm {{
-                                lda  cx16.VERA_DATA0
-                                ora  cx16.r15L
-                                sta  cx16.VERA_DATA1
-                            }}
-                        }
-                    }
-                } else {
-                    position2(xx,yy,true)
-                    cx16.r15 = ~cx16.r15    ; erase pixels
-                    if active_mode==1
-                        set_both_strides(11)    ; 40 increment = 1 line in 320 px monochrome
-                    else
-                        set_both_strides(12)    ; 80 increment = 1 line in 640 px monochrome
-                    repeat lheight {
-                        %asm {{
-                            lda  cx16.VERA_DATA0
-                            and  cx16.r15L
-                            sta  cx16.VERA_DATA1
-                        }}
-                    }
-                }
-            }
-            4 -> {
+            1 -> {
                 ; lores 256c
                 ; set vera auto-increment to 320 pixel increment (=next line)
                 position(xx,yy)
@@ -375,7 +206,7 @@ _done
 +
                 }}
             }
-            6 -> {
+            2 -> {
                 ; highres 4c
                 ; use TWO vera adress pointers simultaneously one for reading, one for writing, so auto-increment is possible
                 if lheight==0
@@ -570,7 +401,6 @@ _done
     }
 
     sub plot(uword @zp xx, uword @zp yy, ubyte @zp color) {
-        ubyte[8] @shared maskbits = [128, 64, 32, 16, 8, 4, 2, 1]
         ubyte[4] @shared mask4c = [%00111111, %11001111, %11110011, %11111100]
         ubyte[4] @shared shift4c = [6,4,2,0]
         ubyte[4] shiftedleft_4c_1 = [1<<6, 1<<4, 1<<2, 1<<0]
@@ -579,31 +409,6 @@ _done
 
         when active_mode {
             1 -> {
-                ; lores monochrome
-                if color {
-                    ; solid color or perhaps stipple
-                    %asm {{
-                        lda  xx
-                        eor  yy
-                        ora  monochrome_dont_stipple_flag
-                        and  #1
-                    }}
-                    if_nz {
-                        mode_1_prepare()
-                        %asm {{
-                            tsb  cx16.VERA_DATA0
-                        }}
-                    }
-                } else {
-                    ; only erase
-                    mode_1_prepare()
-                    %asm {{
-                        trb  cx16.VERA_DATA0
-                    }}
-                }
-            }
-            ; TODO modes 2, 3
-            4 -> {
                 ; lores 256c
                 void addr_mul_24_for_lores_256c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
                 %asm {{
@@ -619,32 +424,8 @@ _done
                     sta  cx16.VERA_DATA0
                 }}
             }
-            5 -> {
-                ; highres monochrome
-                if color {
-                    ; solid color or perhaps stipple
-                    %asm {{
-                        lda  xx
-                        eor  yy
-                        ora  monochrome_dont_stipple_flag
-                        and  #1
-                    }}
-                    if_nz {
-                        mode_5_prepare()
-                        %asm {{
-                            tsb  cx16.VERA_DATA0
-                        }}
-                    }
-                } else {
-                    ; only erase
-                    mode_5_prepare()
-                    %asm {{
-                        trb  cx16.VERA_DATA0
-                    }}
-                }
-            }
-            6 -> {
-                ; highres 4c   ....also mostly usable for mode 2, lores 4c?
+            2 -> {
+                ; highres 4c   ....also mostly usable for lores 4c?
                 void addr_mul_24_for_highres_4c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
                 cx16.r2L = lsb(xx) & 3       ; xbits
                 ; color &= 3
@@ -670,76 +451,11 @@ _done
                 }}
             }
         }
-
-        sub mode_1_prepare() {
-            %asm {{
-                lda  xx
-                and  #7
-                pha     ; xbits
-            }}
-            xx /= 8
-            xx += yy*(320/8)
-            %asm {{
-                stz  cx16.VERA_CTRL
-                stz  cx16.VERA_ADDR_H
-                lda  xx+1
-                sta  cx16.VERA_ADDR_M
-                lda  xx
-                sta  cx16.VERA_ADDR_L
-                ply     ; xbits
-                lda  maskbits,y
-            }}
-        }
-
-        sub mode_5_prepare() {
-            %asm {{
-                lda  xx
-                and  #7
-                pha     ; xbits
-            }}
-            xx /= 8
-            xx += yy*(640/8)
-            %asm {{
-                stz  cx16.VERA_CTRL
-                stz  cx16.VERA_ADDR_H
-                lda  xx+1
-                sta  cx16.VERA_ADDR_M
-                lda  xx
-                sta  cx16.VERA_ADDR_L
-                ply     ; xbits
-                lda  maskbits,y
-            }}
-        }
     }
 
     sub pget(uword @zp xx, uword yy) -> ubyte {
         when active_mode {
             1 -> {
-                ; lores monochrome
-                %asm {{
-                    lda  xx
-                    and  #7
-                    pha     ; xbits
-                }}
-                xx /= 8
-                xx += yy*(320/8)
-                %asm {{
-                    stz  cx16.VERA_CTRL
-                    stz  cx16.VERA_ADDR_H
-                    lda  xx+1
-                    sta  cx16.VERA_ADDR_M
-                    lda  xx
-                    sta  cx16.VERA_ADDR_L
-                    ply         ; xbits
-                    lda  plot.maskbits,y
-                    and  cx16.VERA_DATA0
-                    beq  +
-                    lda  #1
-+
-                }}
-            }
-            ; TODO modes 2, 3
-            4 -> {
                 ; lores 256c
                 void addr_mul_24_for_lores_256c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
                 %asm {{
@@ -753,31 +469,7 @@ _done
                     lda  cx16.VERA_DATA0
                 }}
             }
-            5 -> {
-                ; hires monochrome
-                %asm {{
-                    lda  xx
-                    and  #7
-                    pha     ; xbits
-                }}
-                xx /= 8
-                xx += yy*(640/8)
-                %asm {{
-                    stz  cx16.VERA_CTRL
-                    stz  cx16.VERA_ADDR_H
-                    lda  xx+1
-                    sta  cx16.VERA_ADDR_M
-                    lda  xx
-                    sta  cx16.VERA_ADDR_L
-                    ply     ; xbits
-                    lda  plot.maskbits,y
-                    and  cx16.VERA_DATA0
-                    beq  +
-                    lda  #1
-+
-                }}
-            }
-            6 -> {
+            2 -> {
                 ; hires 4c
                 void addr_mul_24_for_highres_4c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
                 %asm {{
@@ -789,11 +481,20 @@ _done
                     lda  cx16.r0L
                     sta  cx16.VERA_ADDR_L
                     lda  cx16.VERA_DATA0
-                    sta  cx16.r0L
+                    pha
+                    lda  xx
+                    and  #3
+                    tay
+                    lda  gfx2.plot.shift4c,y
+                    tay
+                    pla
+                    cpy  #0
+                    beq  +
+-                   lsr  a
+                    dey
+                    bne  -
++                   and #3
                 }}
-                cx16.r1L = lsb(xx) & 3
-                cx16.r0L >>= gfx2.plot.shift4c[cx16.r1L]
-                return cx16.r0L & 3
             }
             else -> return 0
         }
@@ -882,11 +583,12 @@ _done
         while cx16.r12L {
             pop_stack()
             xx = x1
-            while xx >= 0 and pget(xx as uword, yy as uword) == cx16.r11L {
-                plot(xx as uword, yy as uword, cx16.r10L)
+            ; TODO: if mode==1 (256c) use vera autodecrement instead of pget(), but code bloat not worth it?
+            while xx >= 0 and pget(xx as uword, yy as uword) == cx16.r11L
                 xx--
-            }
-            if xx >= x1
+            if x1!=xx
+                horizontal_line(xx as uword+1, yy as uword, x1-xx as uword, cx16.r10L)
+            else
                 goto skip
 
             left = xx + 1
@@ -895,10 +597,13 @@ _done
             xx = x1 + 1
 
             do {
-                while xx <= width-1 and pget(xx as uword, yy as uword) == cx16.r11L {
-                    plot(xx as uword, yy as uword, cx16.r10L)
+                cx16.r9 = xx
+                ; TODO: if mode==1 (256c) use vera autoincrement instead of pget(), but code bloat not worth it?
+                while xx <= width-1 and pget(xx as uword, yy as uword) == cx16.r11L
                     xx++
-                }
+                if cx16.r9!=xx
+                    horizontal_line(cx16.r9, yy as uword, (xx as uword)-cx16.r9, cx16.r10L)
+
                 push_stack(left, xx - 1, yy, dy)
                 if xx > x2 + 1
                     push_stack(x2 + 1, xx - 1, yy, -dy)
@@ -914,29 +619,16 @@ skip:
     sub position(uword @zp xx, uword yy) {
         when active_mode {
             1 -> {
-                ; lores monochrome
-                cx16.r0 = yy*(320/8) + xx/8
-                cx16.vaddr(0, cx16.r0, 0, 1)
-            }
-            ; TODO modes 2, 3
-            4 -> {
                 ; lores 256c
                 void addr_mul_24_for_lores_256c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
-                cx16.r2L = cx16.r1L
-                cx16.vaddr(cx16.r2L, cx16.r0, 0, 1)
             }
-            5 -> {
-                ; highres monochrome
-                cx16.r0 = yy*(640/8) + xx/8
-                cx16.vaddr(0, cx16.r0, 0, 1)
-            }
-            6 -> {
+            2 -> {
                 ; highres 4c
                 void addr_mul_24_for_highres_4c(yy, xx)      ; 24 bits result is in r0 and r1L (highest byte)
-                cx16.r2L = cx16.r1L
-                cx16.vaddr(cx16.r2L, cx16.r0, 0, 1)
             }
         }
+        cx16.r2L = cx16.r1L
+        cx16.vaddr(cx16.r2L, cx16.r0, 0, 1)
     }
 
     sub position2(uword @zp xx, uword yy, bool also_port_1) {
@@ -948,7 +640,6 @@ skip:
     inline asmsub next_pixel(ubyte color @A) {
         ; -- sets the next pixel byte to the graphics chip.
         ;    for 8 bpp screens this will plot 1 pixel.
-        ;    for 1 bpp screens it will plot 8 pixels at once (color = bit pattern).
         ;    for 2 bpp screens it will plot 4 pixels at once (color = bit pattern).
         %asm {{
             sta  cx16.VERA_DATA0
@@ -958,7 +649,6 @@ skip:
     asmsub next_pixels(uword pixels @AY, uword amount @R0) clobbers(A, X, Y)  {
         ; -- sets the next bunch of pixels from a prepared array of bytes.
         ;    for 8 bpp screens this will plot 1 pixel per byte.
-        ;    for 1 bpp screens it will plot 8 pixels at once (colors are the bit patterns per byte).
         ;    for 2 bpp screens it will plot 4 pixels at once (colors are the bit patterns per byte).
         %asm {{
             sta  P8ZP_SCRATCH_W1
@@ -1019,92 +709,7 @@ skip:
         ubyte[8] @shared char_bitmap_bytes_right
 
         when active_mode {
-            1, 5 -> {
-                ; monochrome mode, either resolution
-                cx16.r3 = sctextptr
-                while @(cx16.r3) {
-                    chardataptr = charset_addr + @(cx16.r3) * $0008
-                    ; copy the character bitmap into RAM
-                    cx16.vaddr_autoincr(charset_bank, chardataptr, 0, 1)
-                    %asm {{
-                        ; pre-shift the bits
-                        lda  text.xx
-                        and  #7
-                        sta  P8ZP_SCRATCH_B1
-                        ldy  #0
--                       lda  cx16.VERA_DATA0
-                        stz  P8ZP_SCRATCH_REG
-                        ldx  P8ZP_SCRATCH_B1
-                        cpx  #0
-                        beq  +
--                       lsr  a
-                        ror  P8ZP_SCRATCH_REG
-                        dex
-                        bne  -
-+                       sta  char_bitmap_bytes_left,y
-                        lda  P8ZP_SCRATCH_REG
-                        sta  char_bitmap_bytes_right,y
-                        iny
-                        cpy  #8
-                        bne  --
-                    }}
-                    ; left part of shifted char
-                    position2(xx, yy, true)
-                    set_autoincrs_mode1_or_5()
-                    if color {
-                        %asm {{
-                            ldy  #0
--                           lda  char_bitmap_bytes_left,y
-                            ora  cx16.VERA_DATA1
-                            sta  cx16.VERA_DATA0
-                            iny
-                            cpy  #8
-                            bne  -
-                        }}
-                    } else {
-                        %asm {{
-                            ldy  #0
--                           lda  char_bitmap_bytes_left,y
-                            eor  #255
-                            and  cx16.VERA_DATA1
-                            sta  cx16.VERA_DATA0
-                            iny
-                            cpy  #8
-                            bne  -
-                        }}
-                    }
-                    ; right part of shifted char
-                    if lsb(xx) & 7 {
-                        position2(xx+8, yy, true)
-                        set_autoincrs_mode1_or_5()
-                        if color {
-                            %asm {{
-                                ldy  #0
-    -                           lda  char_bitmap_bytes_right,y
-                                ora  cx16.VERA_DATA1
-                                sta  cx16.VERA_DATA0
-                                iny
-                                cpy  #8
-                                bne  -
-                            }}
-                        } else {
-                            %asm {{
-                                ldy  #0
-    -                           lda  char_bitmap_bytes_right,y
-                                eor  #255
-                                and  cx16.VERA_DATA1
-                                sta  cx16.VERA_DATA0
-                                iny
-                                cpy  #8
-                                bne  -
-                            }}
-                        }
-                    }
-                    cx16.r3++
-                    xx += 8
-                }
-            }
-            4 -> {
+            1 -> {
                 ; lores 256c
                 while @(sctextptr) {
                     chardataptr = charset_addr + (@(sctextptr) as uword)*8
@@ -1131,7 +736,7 @@ skip:
                     sctextptr++
                 }
             }
-            6 -> {
+            2 -> {
                 ; hires 4c
                 ; we're going to use a few cx16 registers to make sure every variable is in zeropage in the inner loop.
                 cx16.r11L = color
@@ -1194,34 +799,19 @@ skip:
                 }
             }
         }
-
-        sub set_autoincrs_mode1_or_5() {
-            ; set autoincrements to go to next pixel row (40 or 80 increment)
-            if active_mode==1 {
-                cx16.VERA_CTRL = 0
-                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (11<<4)
-                cx16.VERA_CTRL = 1
-                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (11<<4)
-            } else {
-                cx16.VERA_CTRL = 0
-                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (12<<4)
-                cx16.VERA_CTRL = 1
-                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (12<<4)
-            }
-        }
     }
 
-    asmsub cs_innerloop640() clobbers(Y) {
+    asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
         %asm {{
             ldy  #80
--           stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
-            stz  cx16.VERA_DATA0
+-           sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
             dey
             bne  -
             rts

compiler/res/prog8lib/cx16/graphics.p8

@@ -5,7 +5,7 @@
 ; Wraps the graphics functions that are in ROM.
 ; Only lo-res 320x240 256 color mode for now.
 ; Unlike graphics module on the C64, you can use colors() to set new drawing colors for every draw operation.
-; For other resolutions or other color modes, use the "gfx2" module instead. (which is Cx16-specific)
+; For other resolutions or other color modes, use the "gfx2" or "monogfx" module instead. (which is Cx16-specific)
 ; Note: there is no color palette manipulation here, you have to do that yourself or use the "palette" module.
 
 

compiler/res/prog8lib/cx16/monogfx.p8

@@ -0,0 +1,791 @@
+; Monochrome Bitmap pixel graphics routines for the CommanderX16
+; Using the full-screen 640x480 and 320x240 screen modes, in 1 bpp mode (black/white).
+;
+; No text layer is currently shown, but text can be drawn as part of the bitmap itself.
+; For color bitmap graphics, see the gfx2 library.
+;
+; NOTE: a lot of the code here is similar or the same to that in gfx2
+
+monogfx {
+
+    %option no_symbol_prefixing
+
+    ; read-only control variables:
+    uword width = 0
+    uword height = 0
+    bool dont_stipple_flag = true            ; set to false to enable stippling mode
+
+    sub lores() {
+        ; enable 320*240 bitmap mode
+        cx16.VERA_CTRL=0
+        cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
+        cx16.VERA_DC_HSCALE = 64
+        cx16.VERA_DC_VSCALE = 64
+        cx16.VERA_L1_CONFIG = %00000100
+        cx16.VERA_L1_MAPBASE = 0
+        cx16.VERA_L1_TILEBASE = 0
+        width = 320
+        height = 240
+        clear_screen(0)
+    }
+
+    sub hires() {
+        ; enable 640*480 bitmap mode
+        cx16.VERA_CTRL=0
+        cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
+        cx16.VERA_DC_HSCALE = 128
+        cx16.VERA_DC_VSCALE = 128
+        cx16.VERA_L1_CONFIG = %00000100
+        cx16.VERA_L1_MAPBASE = 0
+        cx16.VERA_L1_TILEBASE = %00000001
+        width = 640
+        height = 480
+        clear_screen(0)
+    }
+
+    sub textmode() {
+        ; back to normal text mode
+        cx16.r15L = cx16.VERA_DC_VIDEO & %00000111 ; retain chroma + output mode
+        cbm.CINT()
+        cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11111000) | cx16.r15L
+    }
+
+    sub clear_screen(ubyte color) {
+        stipple(false)
+        position(0, 0)
+        when width {
+            320 -> {
+                repeat 240/2/8
+                    cs_innerloop640(color)
+            }
+            640 -> {
+                repeat 480/8
+                    cs_innerloop640(color)
+            }
+        }
+        position(0, 0)
+    }
+
+    sub stipple(bool enable) {
+        dont_stipple_flag = not enable
+    }
+
+    sub rect(uword xx, uword yy, uword rwidth, uword rheight, bool draw) {
+        if rwidth==0 or rheight==0
+            return
+        horizontal_line(xx, yy, rwidth, draw)
+        if rheight==1
+            return
+        horizontal_line(xx, yy+rheight-1, rwidth, draw)
+        vertical_line(xx, yy+1, rheight-2, draw)
+        if rwidth==1
+            return
+        vertical_line(xx+rwidth-1, yy+1, rheight-2, draw)
+    }
+
+    sub fillrect(uword xx, uword yy, uword rwidth, uword rheight, bool draw) {
+        ; Draw a filled rectangle of the given size and color.
+        ; To fill the whole screen, use clear_screen(color) instead - it is much faster.
+        if rwidth==0
+            return
+        repeat rheight {
+            horizontal_line(xx, yy, rwidth, draw)
+            yy++
+        }
+    }
+
+    sub horizontal_line(uword xx, uword yy, uword length, bool draw) {
+        ubyte[9] masked_starts = [ 0, %00000001, %00000011, %00000111, %00001111, %00011111, %00111111, %01111111, %11111111]
+        ubyte[9] masked_ends   = [ 0, %10000000, %11000000, %11100000, %11110000, %11111000, %11111100, %11111110, %11111111]
+
+        if length==0
+            return
+        if length<=8 {
+            ; just use 2 byte writes with shifted mask
+            position2(xx,yy,true)
+            %asm {{
+                ldy  length
+                lda  masked_ends,y
+                sta  cx16.r0L           ; save left byte
+                stz  P8ZP_SCRATCH_B1
+                lda  xx
+                and  #7
+                beq  +
+                tay
+                lda  cx16.r0L
+-               lsr  a
+                ror  P8ZP_SCRATCH_B1
+                dey
+                bne  -
+                sta  cx16.r0L           ; new left byte
++
+                lda  dont_stipple_flag
+                bne  _dontstipple
+                ; determine stipple pattern
+                lda  yy
+                and  #1
+                beq  +
+                lda  #%10101010
+                bne  ++
++               lda  #%01010101
++               sta  P8ZP_SCRATCH_REG
+                lda  cx16.r0L
+                and  P8ZP_SCRATCH_REG
+                sta  cx16.r0L
+                lda  P8ZP_SCRATCH_B1
+                and  P8ZP_SCRATCH_REG
+                sta  P8ZP_SCRATCH_B1
+_dontstipple
+                lda  draw
+                beq  _clear
+                lda  cx16.r0L           ; left byte
+                ora  cx16.VERA_DATA1
+                sta  cx16.VERA_DATA0
+                lda  P8ZP_SCRATCH_B1    ; right byte
+                ora  cx16.VERA_DATA1
+                sta  cx16.VERA_DATA0
+                rts
+_clear
+                lda  cx16.r0L           ; left byte
+                eor  #255
+                and  cx16.VERA_DATA1
+                sta  cx16.VERA_DATA0
+                lda  P8ZP_SCRATCH_B1    ; right byte
+                eor  #255
+                and  cx16.VERA_DATA1
+                sta  cx16.VERA_DATA0
+                rts
+            }}
+        }
+
+        ubyte separate_pixels = (8-lsb(xx)) & 7
+        if separate_pixels {
+            if dont_stipple_flag {
+                position(xx,yy)
+                cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off
+                if draw
+                    cx16.VERA_DATA0 |= masked_starts[separate_pixels]
+                else
+                    cx16.VERA_DATA0 &= ~masked_starts[separate_pixels]
+                xx += separate_pixels
+            } else {
+                repeat separate_pixels {
+                    plot(xx, yy, draw)
+                    xx++
+                }
+            }
+            length -= separate_pixels
+        }
+        if length {
+            position(xx, yy)
+            separate_pixels = lsb(length) & 7
+            xx += length & $fff8
+            %asm {{
+                lsr  length+1
+                ror  length
+                lsr  length+1
+                ror  length
+                lsr  length+1
+                ror  length
+                lda  draw
+                bne  +
+                ldy  #0     ; black
+                bra  _loop
++               lda  dont_stipple_flag
+                beq  _stipple
+                ldy  #255       ; don't stipple
+                bra  _loop
+_stipple        lda  yy
+                and  #1         ; determine stipple pattern to use
+                bne  +
+                ldy  #%01010101
+                bra  _loop
++               ldy  #%10101010
+_loop           lda  length
+                ora  length+1
+                beq  _done
+                sty  cx16.VERA_DATA0
+                lda  length
+                bne  +
+                dec  length+1
++               dec  length
+                bra  _loop
+_done
+            }}
+
+            if dont_stipple_flag {
+                cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off
+                if draw
+                    cx16.VERA_DATA0 |= masked_ends[separate_pixels]
+                else
+                    cx16.VERA_DATA0 &= ~masked_ends[separate_pixels]
+            } else {
+                repeat separate_pixels {
+                    plot(xx, yy, draw)
+                    xx++
+                }
+            }
+        }
+        cx16.VERA_ADDR_H &= %00000111   ; vera auto-increment off again
+    }
+
+    sub vertical_line(uword xx, uword yy, uword lheight, bool draw) {
+        cx16.r15L = monogfx.plot.maskbits[xx as ubyte & 7]           ; bitmask
+        if draw {
+            if dont_stipple_flag {
+                ; draw continuous line.
+                position2(xx,yy,true)
+                if width==320
+                    set_both_strides(11)    ; 40 increment = 1 line in 320 px monochrome
+                else
+                    set_both_strides(12)    ; 80 increment = 1 line in 640 px monochrome
+                repeat lheight {
+                    %asm {{
+                        lda  cx16.VERA_DATA0
+                        ora  cx16.r15L
+                        sta  cx16.VERA_DATA1
+                    }}
+                }
+            } else {
+                ; draw stippled line.
+                if (xx ^ yy)&1==0  {
+                    yy++
+                    lheight--
+                }
+                lheight++   ; because it is divided by 2 later, don't round off the last pixel
+                position2(xx,yy,true)
+                if width==320
+                    set_both_strides(12)    ; 80 increment = 2 line in 320 px monochrome
+                else
+                    set_both_strides(13)    ; 160 increment = 2 line in 640 px monochrome
+                repeat lheight/2 {
+                    %asm {{
+                        lda  cx16.VERA_DATA0
+                        ora  cx16.r15L
+                        sta  cx16.VERA_DATA1
+                    }}
+                }
+            }
+        } else {
+            position2(xx,yy,true)
+            cx16.r15 = ~cx16.r15    ; erase pixels
+            if width==320
+                set_both_strides(11)    ; 40 increment = 1 line in 320 px monochrome
+            else
+                set_both_strides(12)    ; 80 increment = 1 line in 640 px monochrome
+            repeat lheight {
+                %asm {{
+                    lda  cx16.VERA_DATA0
+                    and  cx16.r15L
+                    sta  cx16.VERA_DATA1
+                }}
+            }
+        }
+
+        sub set_both_strides(ubyte stride) {
+            stride <<= 4
+            cx16.VERA_CTRL = 0
+            cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | stride
+            cx16.VERA_CTRL = 1
+            cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | stride
+        }
+
+    }
+
+    sub line(uword @zp x1, uword @zp y1, uword @zp x2, uword @zp y2, bool draw) {
+        ; Bresenham algorithm.
+        ; This code special-cases various quadrant loops to allow simple ++ and -- operations.
+        if y1>y2 {
+            ; make sure dy is always positive to have only 4 instead of 8 special cases
+            cx16.r0 = x1
+            x1 = x2
+            x2 = cx16.r0
+            cx16.r0 = y1
+            y1 = y2
+            y2 = cx16.r0
+        }
+        word @zp dx = (x2 as word)-x1
+        word @zp dy = (y2 as word)-y1
+
+        if dx==0 {
+            vertical_line(x1, y1, abs(dy) as uword +1, draw)
+            return
+        }
+        if dy==0 {
+            if x1>x2
+                x1=x2
+            horizontal_line(x1, y1, abs(dx) as uword +1, draw)
+            return
+        }
+
+        word @zp d = 0
+        cx16.r1L = true      ; 'positive_ix'
+        if dx < 0 {
+            dx = -dx
+            cx16.r1L = false
+        }
+        word @zp dx2 = dx*2
+        word @zp dy2 = dy*2
+        cx16.r14 = x1       ; internal plot X
+
+        if dx >= dy {
+            if cx16.r1L {
+                repeat {
+                    plot(cx16.r14, y1, draw)
+                    if cx16.r14==x2
+                        return
+                    cx16.r14++
+                    d += dy2
+                    if d > dx {
+                        y1++
+                        d -= dx2
+                    }
+                }
+            } else {
+                repeat {
+                    plot(cx16.r14, y1, draw)
+                    if cx16.r14==x2
+                        return
+                    cx16.r14--
+                    d += dy2
+                    if d > dx {
+                        y1++
+                        d -= dx2
+                    }
+                }
+            }
+        }
+        else {
+            if cx16.r1L {
+                repeat {
+                    plot(cx16.r14, y1, draw)
+                    if y1 == y2
+                        return
+                    y1++
+                    d += dx2
+                    if d > dy {
+                        cx16.r14++
+                        d -= dy2
+                    }
+                }
+            } else {
+                repeat {
+                    plot(cx16.r14, y1, draw)
+                    if y1 == y2
+                        return
+                    y1++
+                    d += dx2
+                    if d > dy {
+                        cx16.r14--
+                        d -= dy2
+                    }
+                }
+            }
+        }
+    }
+
+    sub circle(uword @zp xcenter, uword @zp ycenter, ubyte radius, bool draw) {
+        ; Midpoint algorithm.
+        if radius==0
+            return
+
+        ubyte @zp xx = radius
+        ubyte @zp yy = 0
+        word @zp decisionOver2 = (1 as word)-xx
+        ; R14 = internal plot X
+        ; R15 = internal plot Y
+
+        while xx>=yy {
+            cx16.r14 = xcenter + xx
+            cx16.r15 = ycenter + yy
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter - xx
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter + xx
+            cx16.r15 = ycenter - yy
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter - xx
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter + yy
+            cx16.r15 = ycenter + xx
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter - yy
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter + yy
+            cx16.r15 = ycenter - xx
+            plot(cx16.r14, cx16.r15, draw)
+            cx16.r14 = xcenter - yy
+            plot(cx16.r14, cx16.r15, draw)
+
+            yy++
+            if decisionOver2<=0
+                decisionOver2 += (yy as word)*2+1
+            else {
+                xx--
+                decisionOver2 += (yy as word -xx)*2+1
+            }
+        }
+    }
+
+    sub disc(uword @zp xcenter, uword @zp ycenter, ubyte @zp radius, bool draw) {
+        ; Midpoint algorithm, filled
+        if radius==0
+            return
+        ubyte @zp yy = 0
+        word @zp decisionOver2 = (1 as word)-radius
+
+        while radius>=yy {
+            horizontal_line(xcenter-radius, ycenter+yy, radius*$0002+1, draw)
+            horizontal_line(xcenter-radius, ycenter-yy, radius*$0002+1, draw)
+            horizontal_line(xcenter-yy, ycenter+radius, yy*$0002+1, draw)
+            horizontal_line(xcenter-yy, ycenter-radius, yy*$0002+1, draw)
+            yy++
+            if decisionOver2<=0
+                decisionOver2 += (yy as word)*2+1
+            else {
+                radius--
+                decisionOver2 += (yy as word -radius)*2+1
+            }
+        }
+    }
+
+    sub plot(uword @zp xx, uword @zp yy, bool @zp draw) {
+        ubyte[8] @shared maskbits = [128, 64, 32, 16, 8, 4, 2, 1]
+        if draw {
+            ; solid color or perhaps stipple
+            %asm {{
+                lda  xx
+                eor  yy
+                ora  dont_stipple_flag
+                and  #1
+            }}
+            if_nz {
+                prepare()
+                %asm {{
+                    tsb  cx16.VERA_DATA0
+                }}
+            }
+        } else {
+            ; only erase
+            prepare()
+            %asm {{
+                trb  cx16.VERA_DATA0
+            }}
+        }
+
+        sub prepare() {
+            %asm {{
+                lda  xx
+                and  #7
+                pha     ; xbits
+            }}
+            xx /= 8
+            if width==320
+                xx += yy*(320/8)
+            else
+                xx += yy*(640/8)
+            %asm {{
+                stz  cx16.VERA_CTRL
+                stz  cx16.VERA_ADDR_H
+                lda  xx+1
+                sta  cx16.VERA_ADDR_M
+                lda  xx
+                sta  cx16.VERA_ADDR_L
+                ply     ; xbits
+                lda  maskbits,y
+            }}
+        }
+    }
+
+    sub pget(uword @zp xx, uword yy) -> ubyte {
+        %asm {{
+            lda  xx
+            and  #7
+            pha     ; xbits
+        }}
+        xx /= 8
+        if width==320
+            xx += yy*(320/8)
+        else
+            xx += yy*(640/8)
+
+        %asm {{
+            stz  cx16.VERA_CTRL
+            stz  cx16.VERA_ADDR_H
+            lda  xx+1
+            sta  cx16.VERA_ADDR_M
+            lda  xx
+            sta  cx16.VERA_ADDR_L
+            ply         ; xbits
+            lda  plot.maskbits,y
+            and  cx16.VERA_DATA0
+            beq  +
+            lda  #1
++           rts
+        }}
+    }
+
+    sub fill(word @zp xx, word @zp yy, bool draw) {
+        ; Non-recursive scanline flood fill.
+        ; based loosely on code found here https://www.codeproject.com/Articles/6017/QuickFill-An-efficient-flood-fill-algorithm
+        ; with the fixes applied to the seedfill_4 routine as mentioned in the comments.
+        const ubyte MAXDEPTH = 48
+        word[MAXDEPTH] @split @shared stack_xl
+        word[MAXDEPTH] @split @shared stack_xr
+        word[MAXDEPTH] @split @shared stack_y
+        byte[MAXDEPTH] @shared stack_dy
+        cx16.r12L = 0       ; stack pointer
+        word x1
+        word x2
+        byte dy
+        cx16.r10L = draw as ubyte
+        sub push_stack(word sxl, word sxr, word sy, byte sdy) {
+            if cx16.r12L==MAXDEPTH
+                return
+            cx16.r0s = sy+sdy
+            if cx16.r0s>=0 and cx16.r0s<=height-1 {
+;;                stack_xl[cx16.r12L] = sxl
+;;                stack_xr[cx16.r12L] = sxr
+;;                stack_y[cx16.r12L] = sy
+;;                stack_dy[cx16.r12L] = sdy
+;;                cx16.r12L++
+                %asm {{
+                    ldy  cx16.r12L
+                    lda  sxl
+                    sta  stack_xl_lsb,y
+                    lda  sxl+1
+                    sta  stack_xl_msb,y
+                    lda  sxr
+                    sta  stack_xr_lsb,y
+                    lda  sxr+1
+                    sta  stack_xr_msb,y
+                    lda  sy
+                    sta  stack_y_lsb,y
+                    lda  sy+1
+                    sta  stack_y_msb,y
+                    ldy  cx16.r12L
+                    lda  sdy
+                    sta  stack_dy,y
+                    inc  cx16.r12L
+                }}
+            }
+        }
+        sub pop_stack() {
+;;            cx16.r12L--
+;;            x1 = stack_xl[cx16.r12L]
+;;            x2 = stack_xr[cx16.r12L]
+;;            y = stack_y[cx16.r12L]
+;;            dy = stack_dy[cx16.r12L]
+            %asm {{
+                dec  cx16.r12L
+                ldy  cx16.r12L
+                lda  stack_xl_lsb,y
+                sta  x1
+                lda  stack_xl_msb,y
+                sta  x1+1
+                lda  stack_xr_lsb,y
+                sta  x2
+                lda  stack_xr_msb,y
+                sta  x2+1
+                lda  stack_y_lsb,y
+                sta  yy
+                lda  stack_y_msb,y
+                sta  yy+1
+                ldy  cx16.r12L
+                lda  stack_dy,y
+                sta  dy
+            }}
+            yy+=dy
+        }
+        cx16.r11L = pget(xx as uword, yy as uword)        ; old_color
+        if cx16.r11L == cx16.r10L
+            return
+        if xx<0 or xx>width-1 or yy<0 or yy>height-1
+            return
+        push_stack(xx, xx, yy, 1)
+        push_stack(xx, xx, yy + 1, -1)
+        word left = 0
+        while cx16.r12L {
+            pop_stack()
+            xx = x1
+            while xx >= 0 and pget(xx as uword, yy as uword) == cx16.r11L
+                xx--
+            if x1!=xx
+                horizontal_line(xx as uword+1, yy as uword, x1-xx as uword, cx16.r10L)
+            else
+                goto skip
+
+            left = xx + 1
+            if left < x1
+                push_stack(left, x1 - 1, yy, -dy)
+            xx = x1 + 1
+
+            do {
+                cx16.r9 = xx
+                while xx <= width-1 and pget(xx as uword, yy as uword) == cx16.r11L
+                    xx++
+                if cx16.r9!=xx
+                    horizontal_line(cx16.r9, yy as uword, (xx as uword)-cx16.r9, cx16.r10L)
+
+                push_stack(left, xx - 1, yy, dy)
+                if xx > x2 + 1
+                    push_stack(x2 + 1, xx - 1, yy, -dy)
+skip:
+                xx++
+                while xx <= x2 and pget(xx as uword, yy as uword) != cx16.r11L
+                    xx++
+                left = xx
+            } until xx>x2
+        }
+    }
+
+    sub position(uword @zp xx, uword yy) {
+        if width==320
+            cx16.r0 = yy*(320/8)
+        else
+            cx16.r0 = yy*(640/8)
+        cx16.vaddr(0, cx16.r0+(xx/8), 0, 1)
+    }
+
+    sub position2(uword @zp xx, uword yy, bool also_port_1) {
+        position(xx, yy)
+        if also_port_1
+            cx16.vaddr_clone(0)
+    }
+
+    const ubyte charset_bank = $1
+    const uword charset_addr = $f000       ; in bank 1, so $1f000
+
+    sub text_charset(ubyte charset) {
+        ; -- select the text charset to use with the text() routine
+        ;    the charset number is the same as for the cx16.screen_set_charset() ROM function.
+        ;    1 = ISO charset, 2 = PETSCII uppercase+graphs, 3= PETSCII uppercase+lowercase.
+        cx16.screen_set_charset(charset, 0)
+    }
+
+    sub text(uword @zp xx, uword yy, bool draw, uword sctextptr) {
+        ; -- Write some text at the given pixel position. The text string must be in screencode encoding (not petscii!).
+        ;    You must also have called text_charset() first to select and prepare the character set to use.
+        uword chardataptr
+        ubyte[8] @shared char_bitmap_bytes_left
+        ubyte[8] @shared char_bitmap_bytes_right
+
+        cx16.r3 = sctextptr
+        while @(cx16.r3) {
+            chardataptr = charset_addr + @(cx16.r3) * $0008
+            ; copy the character bitmap into RAM
+            cx16.vaddr_autoincr(charset_bank, chardataptr, 0, 1)
+            %asm {{
+                ; pre-shift the bits
+                lda  text.xx
+                and  #7
+                sta  P8ZP_SCRATCH_B1
+                ldy  #0
+-               lda  cx16.VERA_DATA0
+                stz  P8ZP_SCRATCH_REG
+                ldx  P8ZP_SCRATCH_B1
+                cpx  #0
+                beq  +
+-               lsr  a
+                ror  P8ZP_SCRATCH_REG
+                dex
+                bne  -
++               sta  char_bitmap_bytes_left,y
+                lda  P8ZP_SCRATCH_REG
+                sta  char_bitmap_bytes_right,y
+                iny
+                cpy  #8
+                bne  --
+            }}
+            ; left part of shifted char
+            position2(xx, yy, true)
+            set_autoincrs()
+            if draw {
+                %asm {{
+                    ldy  #0
+-                   lda  char_bitmap_bytes_left,y
+                    ora  cx16.VERA_DATA1
+                    sta  cx16.VERA_DATA0
+                    iny
+                    cpy  #8
+                    bne  -
+                }}
+            } else {
+                %asm {{
+                    ldy  #0
+-                   lda  char_bitmap_bytes_left,y
+                    eor  #255
+                    and  cx16.VERA_DATA1
+                    sta  cx16.VERA_DATA0
+                    iny
+                    cpy  #8
+                    bne  -
+                }}
+            }
+            ; right part of shifted char
+            if lsb(xx) & 7 {
+                position2(xx+8, yy, true)
+                set_autoincrs()
+                if draw {
+                    %asm {{
+                        ldy  #0
+-                       lda  char_bitmap_bytes_right,y
+                        ora  cx16.VERA_DATA1
+                        sta  cx16.VERA_DATA0
+                        iny
+                        cpy  #8
+                        bne  -
+                    }}
+                } else {
+                    %asm {{
+                        ldy  #0
+-                       lda  char_bitmap_bytes_right,y
+                        eor  #255
+                        and  cx16.VERA_DATA1
+                        sta  cx16.VERA_DATA0
+                        iny
+                        cpy  #8
+                        bne  -
+                    }}
+                }
+            }
+            cx16.r3++
+            xx += 8
+        }
+
+        sub set_autoincrs() {
+            ; set autoincrements to go to next pixel row (40 or 80 increment)
+            if width==320 {
+                cx16.VERA_CTRL = 0
+                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (11<<4)
+                cx16.VERA_CTRL = 1
+                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (11<<4)
+            } else {
+                cx16.VERA_CTRL = 0
+                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (12<<4)
+                cx16.VERA_CTRL = 1
+                cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & $0f | (12<<4)
+            }
+        }
+    }
+
+    asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
+        %asm {{
+            cmp  #0
+            beq  +
+            lda  #255
++           ldy  #80
+-           sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            sta  cx16.VERA_DATA0
+            dey
+            bne  -
+            rts
+        }}
+    }
+}

compiler/res/prog8lib/cx16/syslib.p8

@@ -267,6 +267,17 @@ cx16 {
     &ubyte  VERA_AUDIO_DATA     = VERA_BASE + $001D
     &ubyte  VERA_SPI_DATA       = VERA_BASE + $001E
     &ubyte  VERA_SPI_CTRL       = VERA_BASE + $001F
+
+    ; experimental Vera FX registers: (depends on particular value set in VERA_CTRL!!!)
+    &ubyte VERA_FX_CTRL         = VERA_BASE + $0009
+    &ubyte VERA_FX_MULT         = VERA_BASE + $000C
+    &ubyte VERA_FX_CACHE_L      = VERA_BASE + $0009
+    &ubyte VERA_FX_CACHE_M      = VERA_BASE + $000A
+    &ubyte VERA_FX_CACHE_H      = VERA_BASE + $000B
+    &ubyte VERA_FX_CACHE_U      = VERA_BASE + $000C
+    &ubyte VERA_FX_ACCUM_RESET  = VERA_BASE + $0009     ; (DCSEL=6)
+
+
 ; VERA_PSG_BASE     = $1F9C0
 ; VERA_PALETTE_BASE = $1FA00
 ; VERA_SPRITES_BASE = $1FC00
@@ -320,17 +331,16 @@ cx16 {
 ; spelling of the names is taken from the Commander X-16 rom sources
 
 ; supported C128 additions
-romsub $ff4a = close_all(ubyte device @A)  clobbers(A,X,Y)
-romsub $ff59 = lkupla(ubyte la @A)  clobbers(A,X,Y)
-romsub $ff5c = lkupsa(ubyte sa @Y)  clobbers(A,X,Y)
+romsub $ff4a = CLOSE_ALL(ubyte device @A)  clobbers(A,X,Y)
+romsub $ff59 = LKUPLA(ubyte la @A)  clobbers(A,X,Y)
+romsub $ff5c = LKUPSA(ubyte sa @Y)  clobbers(A,X,Y)
 romsub $ff5f = screen_mode(ubyte mode @A, bool getCurrent @Pc)  clobbers(X, Y) -> ubyte @A, bool @Pc        ; note: X,Y size result is not supported, use SCREEN or get_screen_mode routine for that
 romsub $ff62 = screen_set_charset(ubyte charset @A, uword charsetptr @XY)  clobbers(A,X,Y)      ; incompatible with C128  dlchr()
 ; not yet supported: romsub $ff65 = pfkey()  clobbers(A,X,Y)
-romsub $ff6e = jsrfar()  ; following word = address to call, byte after that=rom/ram bank it is in
+romsub $ff6e = JSRFAR()  ; following word = address to call, byte after that=rom/ram bank it is in
 romsub $ff74 = fetch(ubyte bank @X, ubyte index @Y)  clobbers(X) -> ubyte @A
 romsub $ff77 = stash(ubyte data @A, ubyte bank @X, ubyte index @Y)  clobbers(X)
-romsub $ff7a = cmpare(ubyte data @A, ubyte bank @X, ubyte index @Y)  clobbers(X)
-romsub $ff7d = primm()
+romsub $ff7d = PRIMM()
 
 ; It's not documented what registers are clobbered, so we assume the worst for all following kernal routines...:
 
@@ -384,7 +394,8 @@ romsub $fed5 = console_set_paging_message(uword msgptr @R0)  clobbers(A,X,Y)
 romsub $fecf = entropy_get() -> ubyte @A, ubyte @X, ubyte @Y
 romsub $fecc = monitor()  clobbers(A,X,Y)
 
-romsub $ff44 = macptr(ubyte length @A, uword buffer @XY, bool dontAdvance @Pc)  clobbers(A) -> bool @Pc, uword @XY
+romsub $ff44 = MACPTR(ubyte length @A, uword buffer @XY, bool dontAdvance @Pc)  clobbers(A) -> bool @Pc, uword @XY
+romsub $feb1 = MCIOUT(ubyte length @A, uword buffer @XY, bool dontAdvance @Pc)  clobbers(A) -> bool @Pc, uword @XY
 romsub $ff47 = enter_basic(bool cold_or_warm @Pc)  clobbers(A,X,Y)
 romsub $ff4d = clock_set_date_time(uword yearmonth @R0, uword dayhours @R1, uword minsecs @R2, ubyte jiffies @R3)  clobbers(A, X, Y)
 romsub $ff50 = clock_get_date_time()  clobbers(A, X, Y)  -> uword @R0, uword @R1, uword @R2, ubyte @R3   ; result registers see clock_set_date_time()

compiler/res/prog8lib/cx16/verafx.p8

@@ -0,0 +1,126 @@
+; Experimental Vera FX support.
+; Docs:
+; https://github.com/X16Community/x16-docs/blob/master/VERA%20FX%20Reference.md
+; https://docs.google.com/document/d/1q34uWOiM3Be2pnaHRVgSdHySI-qsiQWPTo_gfE54PTg/edit
+
+verafx {
+    %option no_symbol_prefixing
+
+    sub available() -> bool {
+        ; returns true if Vera FX is available (Vera V0.3.1 or later), false if not.
+        cx16.r1L = 0
+        cx16.r0L = cx16.VERA_CTRL
+        cx16.VERA_CTRL = $7e
+        if cx16.VERA_DC_VER0 == $56 {
+            ; Vera version number is valid.
+            ; Vera fx is available on Vera version 0.3.1 and later,
+            ; so no need to even check VERA_DC_VER1, which contains 0 (or higher)
+            cx16.r1L = mkword(cx16.VERA_DC_VER2, cx16.VERA_DC_VER3) >= $0301
+        }
+        cx16.VERA_CTRL = cx16.r0L
+        return cx16.r1L
+    }
+
+    sub clear(ubyte vbank, uword vaddr, ubyte data, uword amountof32bits) {
+        ; use cached 4-byte write to quickly clear a portion of the video memory to a given byte value
+        ; this routine is around 3 times faster as gfx2.clear_screen()
+        cx16.VERA_CTRL = 0
+        cx16.VERA_ADDR_H = vbank | %00110000       ; 4-byte increment
+        cx16.VERA_ADDR_M = msb(vaddr)
+        cx16.VERA_ADDR_L = lsb(vaddr)
+        cx16.VERA_CTRL = 6<<1       ; dcsel = 6, fill the 32 bits cache
+        cx16.VERA_FX_CACHE_L = data
+        cx16.VERA_FX_CACHE_M = data
+        cx16.VERA_FX_CACHE_H = data
+        cx16.VERA_FX_CACHE_U = data
+        cx16.VERA_CTRL = 2<<1       ; dcsel = 2
+        cx16.VERA_FX_MULT = 0
+        cx16.VERA_FX_CTRL = %01000000    ; cache write enable
+
+        if (amountof32bits & %1111110000000011) == 0 {
+            repeat lsb(amountof32bits >> 2)
+                unroll 4 cx16.VERA_DATA0=0       ; write 4 bytes at a time, unrolled
+        }
+        else if (amountof32bits & %1111111000000001) == 0 {
+            repeat lsb(amountof32bits >> 1)
+                unroll 2 cx16.VERA_DATA0=0       ; write 4 bytes at a time, unrolled
+        }
+        else if (lsb(amountof32bits) & 3) == 0 {
+            repeat amountof32bits >> 2
+                unroll 4 cx16.VERA_DATA0=0       ; write 4 bytes at a time, unrolled
+        }
+        else if (lsb(amountof32bits) & 1) == 0 {
+            repeat amountof32bits >> 1
+                unroll 2 cx16.VERA_DATA0=0       ; write 4 bytes at a time, unrolled
+        }
+        else {
+            repeat amountof32bits
+                cx16.VERA_DATA0=0       ; write 4 bytes at a time
+        }
+
+        cx16.VERA_FX_CTRL = 0       ; cache write disable
+        cx16.VERA_CTRL = 0
+    }
+
+    ; unsigned multiplication just passes the values as signed to muls
+    ; if you do this yourself in your call to muls, it will save a few instructions.
+    sub mult(uword value1, uword value2) -> uword {
+        return muls(value1 as word, value2 as word) as uword
+    }
+
+    asmsub muls(word value1 @R0, word value2 @R1) -> word @AY {
+        %asm {{
+            lda  #(2 << 1)
+            sta  cx16.VERA_CTRL        ; $9F25
+            stz  cx16.VERA_FX_CTRL     ; $9F29 (mainly to reset Addr1 Mode to 0)
+            lda  #%00010000
+            sta  cx16.VERA_FX_MULT     ; $9F2C
+            lda  #(6 << 1)
+            sta  cx16.VERA_CTRL        ; $9F25
+            lda  cx16.r0
+            ldy  cx16.r0+1
+            sta  cx16.VERA_FX_CACHE_L  ; $9F29
+            sty  cx16.VERA_FX_CACHE_M  ; $9F2A
+            lda  cx16.r1
+            ldy  cx16.r1+1
+            sta  cx16.VERA_FX_CACHE_H  ; $9F2B
+            sty  cx16.VERA_FX_CACHE_U  ; $9F2C
+            lda  cx16.VERA_FX_ACCUM_RESET   ; $9F29 (DCSEL=6)
+
+            ; Set the ADDR0 pointer to $1f9bc and write our multiplication result there
+            ; (these are the 4 bytes just before the PSG registers start)
+            lda  #(2 << 1)
+            sta  cx16.VERA_CTRL
+            lda  #%01000000           ; Cache Write Enable
+            sta  cx16.VERA_FX_CTRL
+            lda  #$bc
+            sta  cx16.VERA_ADDR_L
+            lda  #$f9
+            sta  cx16.VERA_ADDR_M
+            lda  #$01
+            sta  cx16.VERA_ADDR_H     ; no increment
+            stz  cx16.VERA_DATA0      ; multiply and write out result
+            lda  #%00010001           ; $01 with Increment 1
+            sta  cx16.VERA_ADDR_H     ; so we can read out the result
+            lda  cx16.VERA_DATA0
+            ldy  cx16.VERA_DATA0
+            stz  cx16.VERA_FX_CTRL    ; Cache write disable
+            stz  cx16.VERA_CTRL       ; reset DCSEL
+            rts
+; we skip the upper 16 bits of the result:
+;            lda  cx16.VERA_DATA0
+;            sta  $0402
+;            lda  cx16.VERA_DATA0
+;            sta  $0403
+        }}
+    }
+
+    sub transparency(bool enable) {
+        cx16.VERA_CTRL = 2<<1       ; dcsel = 2
+        if enable
+            cx16.VERA_FX_CTRL |= %10000000
+        else
+            cx16.VERA_FX_CTRL &= %01111111
+        cx16.VERA_CTRL = 0
+    }
+}

compiler/res/prog8lib/diskio.p8

@@ -7,22 +7,33 @@
 diskio {
     %option no_symbol_prefixing
 
+    const ubyte READ_IO_CHANNEL=12
+    const ubyte WRITE_IO_CHANNEL=13
+
     ubyte drivenumber = 8
 
     sub set_drive(ubyte number) {
         drivenumber = number
     }
 
+    sub reset_read_channel() {
+        void cbm.CHKIN(READ_IO_CHANNEL)
+    }
+
+    sub reset_write_channel() {
+        cbm.CHKOUT(WRITE_IO_CHANNEL)
+    }
+
     sub directory() -> bool {
         ; -- Prints the directory contents to the screen. Returns success.
 
         cbm.SETNAM(1, "$")
-        cbm.SETLFS(12, drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, 0)
         ubyte status = 1
         void cbm.OPEN()          ; open 12,8,0,"$"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -60,7 +71,7 @@ diskio {
 
 io_error:
         cbm.CLRCHN()        ; restore default i/o devices
-        cbm.CLOSE(12)
+        cbm.CLOSE(READ_IO_CHANNEL)
 
         if status and status & $40 == 0 {            ; bit 6=end of file
             txt.print("\ni/o error, status: ")
@@ -76,12 +87,12 @@ io_error:
         ; -- Returns pointer to disk name string or 0 if failure.
 
         cbm.SETNAM(1, "$")
-        cbm.SETLFS(12, drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, 0)
         ubyte okay = false
         void cbm.OPEN()          ; open 12,8,0,"$"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -108,7 +119,7 @@ io_error:
 
 io_error:
         cbm.CLRCHN()        ; restore default i/o devices
-        cbm.CLOSE(12)
+        cbm.CLOSE(READ_IO_CHANNEL)
         if okay
             return &list_filename
         return 0
@@ -126,7 +137,7 @@ io_error:
 
     sub list_filenames(uword pattern_ptr, uword filenames_buffer, uword filenames_buf_size) -> ubyte {
         ; -- fill the provided buffer with the names of the files on the disk (until buffer is full).
-        ;    Files in the buffer are separeted by a 0 byte. You can provide an optional pattern to match against.
+        ;    Files in the buffer are separated by a 0 byte. You can provide an optional pattern to match against.
         ;    After the last filename one additional 0 byte is placed to indicate the end of the list.
         ;    Returns number of files (it skips 'dir' entries i.e. subdirectories).
         ;    Also sets carry on exit: Carry clear = all files returned, Carry set = directory has more files that didn't fit in the buffer.
@@ -152,7 +163,7 @@ io_error:
         return files_found
     }
 
-    ; ----- iterative file lister functions (uses io channel 12) -----
+    ; ----- iterative file lister functions (uses the read io channel) -----
 
     sub lf_start_list(uword pattern_ptr) -> bool {
         ; -- start an iterative file listing with optional pattern matching.
@@ -163,11 +174,11 @@ io_error:
         iteration_in_progress = true
 
         cbm.SETNAM(1, "$")
-        cbm.SETLFS(12, drivenumber, 0)
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, 0)
         void cbm.OPEN()          ; open 12,8,0,"$"
         if_cs
             goto io_error
-        void cbm.CHKIN(12)        ; use #12 as input channel
+        reset_read_channel()
         if_cs
             goto io_error
 
@@ -192,7 +203,7 @@ io_error:
             return false
 
         repeat {
-            void cbm.CHKIN(12)        ; use #12 as input channel again
+            reset_read_channel()        ; use the input io channel again
 
             uword nameptr = &list_filename
             ubyte blocks_lsb = cbm.CHRIN()
@@ -253,13 +264,13 @@ close_end:
         ; -- end an iterative file listing session (close channels).
         if iteration_in_progress {
             cbm.CLRCHN()
-            cbm.CLOSE(12)
+            cbm.CLOSE(READ_IO_CHANNEL)
             iteration_in_progress = false
         }
     }
 
 
-    ; ----- iterative file loader functions (uses io channel 12) -----
+    ; ----- iterative file loader functions (uses the input io channel) -----
 
     sub f_open(uword filenameptr) -> bool {
         ; -- open a file for iterative reading with f_read
@@ -267,18 +278,18 @@ close_end:
         f_close()
 
         cbm.SETNAM(string.length(filenameptr), filenameptr)
-        cbm.SETLFS(12, drivenumber, 12)     ; note: has to be 12,x,12 because otherwise f_seek doesn't work
+        cbm.SETLFS(READ_IO_CHANNEL, drivenumber, READ_IO_CHANNEL)     ; note: has to be Channel,x,Channel because otherwise f_seek doesn't work
         void cbm.OPEN()          ; open 12,8,12,"filename"
         if_cc {
             if cbm.READST()==0 {
                 iteration_in_progress = true
-                void cbm.CHKIN(12)          ; use #12 as input channel
+                reset_read_channel()
                 if_cc {
                     void cbm.CHRIN()        ; read first byte to test for file not found
                     if not cbm.READST() {
-                        cbm.CLOSE(12)           ; close file because we already consumed first byte
+                        cbm.CLOSE(READ_IO_CHANNEL)           ; close file because we already consumed first byte
                         void cbm.OPEN()         ; re-open the file
-                        void cbm.CHKIN(12)
+                        cbm.CLRCHN()            ; reset default i/o channels
                         return true
                     }
                 }
@@ -294,6 +305,7 @@ close_end:
         if not iteration_in_progress or not num_bytes
             return 0
 
+        reset_read_channel()
         list_blocks = 0     ; we reuse this variable for the total number of bytes read
 
         %asm {{
@@ -328,6 +340,7 @@ m_in_buffer     sta  $ffff
         if not iteration_in_progress
             return 0
 
+        reset_read_channel()
         uword total_read = 0
         while not cbm.READST() {
             cx16.r0 = f_read(bufferpointer, 256)
@@ -346,8 +359,7 @@ m_in_buffer     sta  $ffff
         %asm {{
             sta  P8ZP_SCRATCH_W1
             sty  P8ZP_SCRATCH_W1+1
-            ldx  #12
-            jsr  cbm.CHKIN              ; use channel 12 again for input
+            jsr  reset_read_channel
             ldy  #0
 _loop       jsr  cbm.CHRIN
             sta  (P8ZP_SCRATCH_W1),y
@@ -368,25 +380,23 @@ _end        rts
         ; -- end an iterative file loading session (close channels).
         if iteration_in_progress {
             cbm.CLRCHN()
-            cbm.CLOSE(12)
+            cbm.CLOSE(READ_IO_CHANNEL)
             iteration_in_progress = false
         }
     }
 
 
-    ; ----- iterative file writing functions (uses io channel 13) -----
+    ; ----- iterative file writing functions (uses write io channel) -----
 
     sub f_open_w(uword filenameptr) -> bool {
         ; -- open a file for iterative writing with f_write
         f_close_w()
 
         cbm.SETNAM(string.length(filenameptr), filenameptr)
-        cbm.SETLFS(13, drivenumber, 1)
+        cbm.SETLFS(WRITE_IO_CHANNEL, drivenumber, 1)
         void cbm.OPEN()             ; open 13,8,1,"filename"
-        if_cc {
-            cbm.CHKOUT(13)          ; use #13 as output channel
+        if_cc
             return not cbm.READST()
-        }
         f_close_w()
         return false
     }
@@ -394,7 +404,7 @@ _end        rts
     sub f_write(uword bufferpointer, uword num_bytes) -> bool {
         ; -- write the given number of bytes to the currently open file
         if num_bytes!=0 {
-            cbm.CHKOUT(13)        ; use #13 as output channel again
+            reset_write_channel()
             repeat num_bytes {
                 cbm.CHROUT(@(bufferpointer))
                 bufferpointer++
@@ -407,7 +417,7 @@ _end        rts
     sub f_close_w() {
         ; -- end an iterative file writing session (close channels).
         cbm.CLRCHN()
-        cbm.CLOSE(13)
+        cbm.CLOSE(WRITE_IO_CHANNEL)
     }
 
 

compiler/res/prog8lib/math.asm

@@ -64,6 +64,7 @@ multiply_words	.proc
 	;       but there currently is no way to use 4 consecutive bytes in ZP (without disabling irq and saving/restoring them)...
 
 ; mult62.a
+; from: https://github.com/TobyLobster/multiply_test/blob/main/tests/mult62.a
 ; based on Dr Jefyll, http://forum.6502.org/viewtopic.php?f=9&t=689&start=0#p19958
 ; - adjusted to use fixed zero page addresses
 ; - removed 'decrement to avoid clc' as this is slower on average

compiler/res/prog8lib/math.p8

@@ -140,6 +140,21 @@ _sinecosR8	.char  trunc(127.0 * sin(range(180+45) * rad(360.0/180.0)))
         }}
     }
 
+    asmsub mul16_last_upper() -> uword @AY {
+        ; This routine peeks into the internal 32 bits multiplication result buffer of the
+        ; 16*16 bits multiplication routine, to fetch the upper 16 bits of the last calculation.
+        ; Notes:
+        ;   - to avoid interference it's best to fetch and store this value immediately after the multiplication expression.
+        ;     for instance, simply printing a number may already result in new multiplication calls being performed
+        ;   - not all multiplications in the source code result in an actual multiplication call:
+        ;     some simpler multiplications will be optimized away into faster routines. These will not set the upper 16 bits at all!
+        %asm {{
+            lda  multiply_words.result+2
+            ldy  multiply_words.result+3
+            rts
+        }}
+    }
+
 sub direction_sc(byte x1, byte y1, byte x2, byte y2) -> ubyte {
     ; From a pair of signed coordinates around the origin, calculate discrete direction between 0 and 23 into A.
     cx16.r0L = 3        ; quadrant

compiler/res/prog8lib/virtual/math.p8

@@ -209,59 +209,72 @@ math {
         }
     }
 
-sub direction(ubyte x1, ubyte y1, ubyte x2, ubyte y2) -> ubyte {
-    ; From a pair of positive coordinates, calculate discrete direction between 0 and 23 into A.
-    ; This adjusts the atan() result  so that the direction N is centered on the angle=N instead of having it as a boundary
-    ubyte angle = atan2(x1, y1, x2, y2) - 256/48
-    return 23-lsb(mkword(angle,0) / 2730)
-}
-
-sub direction_sc(byte x1, byte y1, byte x2, byte y2) -> ubyte {
-    ; From a pair of signed coordinates around the origin, calculate discrete direction between 0 and 23 into A.
-    ; shift the points into the positive quadrant
-    ubyte px1
-    ubyte py1
-    ubyte px2
-    ubyte py2
-    if x1<0 or x2<0 {
-        px1 = x1 as ubyte + 128
-        px2 = x2 as ubyte + 128
-    } else {
-        px1 = x1 as ubyte
-        px2 = x2 as ubyte
-    }
-    if y1<0 or y2<0 {
-        py1 = y1 as ubyte + 128
-        py2 = y2 as ubyte + 128
-    } else {
-        py1 = y1 as ubyte
-        py2 = y2 as ubyte
+    sub direction(ubyte x1, ubyte y1, ubyte x2, ubyte y2) -> ubyte {
+        ; From a pair of positive coordinates, calculate discrete direction between 0 and 23 into A.
+        ; This adjusts the atan() result  so that the direction N is centered on the angle=N instead of having it as a boundary
+        ubyte angle = atan2(x1, y1, x2, y2) - 256/48
+        return 23-lsb(mkword(angle,0) / 2730)
     }
 
-    return direction(px1, py1, px2, py2)
-}
+    sub direction_sc(byte x1, byte y1, byte x2, byte y2) -> ubyte {
+        ; From a pair of signed coordinates around the origin, calculate discrete direction between 0 and 23 into A.
+        ; shift the points into the positive quadrant
+        ubyte px1
+        ubyte py1
+        ubyte px2
+        ubyte py2
+        if x1<0 or x2<0 {
+            px1 = x1 as ubyte + 128
+            px2 = x2 as ubyte + 128
+        } else {
+            px1 = x1 as ubyte
+            px2 = x2 as ubyte
+        }
+        if y1<0 or y2<0 {
+            py1 = y1 as ubyte + 128
+            py2 = y2 as ubyte + 128
+        } else {
+            py1 = y1 as ubyte
+            py2 = y2 as ubyte
+        }
 
-sub direction_qd(ubyte quadrant, ubyte xdelta, ubyte ydelta) -> ubyte {
-    ; From a pair of X/Y deltas (both >=0), and quadrant 0-3, calculate discrete direction between 0 and 23.
-    when quadrant {
-        3 -> return direction(0, 0, xdelta, ydelta)
-        2 -> return direction(xdelta, 0, 0, ydelta)
-        1 -> return direction(0, ydelta, xdelta, 0)
-        else -> return direction(xdelta, ydelta, 0, 0)
+        return direction(px1, py1, px2, py2)
+    }
+
+    sub direction_qd(ubyte quadrant, ubyte xdelta, ubyte ydelta) -> ubyte {
+        ; From a pair of X/Y deltas (both >=0), and quadrant 0-3, calculate discrete direction between 0 and 23.
+        when quadrant {
+            3 -> return direction(0, 0, xdelta, ydelta)
+            2 -> return direction(xdelta, 0, 0, ydelta)
+            1 -> return direction(0, ydelta, xdelta, 0)
+            else -> return direction(xdelta, ydelta, 0, 0)
+        }
+    }
+
+    sub atan2(ubyte x1, ubyte y1, ubyte x2, ubyte y2) -> ubyte {
+        ;; Calculate the angle, in a 256-degree circle, between two points into A.
+        ;; The points (x1, y1) and (x2, y2) have to use *unsigned coordinates only* from the positive quadrant in the carthesian plane!
+        %ir {{
+            loadm.b r65532,math.atan2.x1
+            loadm.b r65533,math.atan2.y1
+            loadm.b r65534,math.atan2.x2
+            loadm.b r65535,math.atan2.y2
+            syscall 44 (r65532.b, r65533.b, r65534.b, r65535.b): r0.b
+            returnr.b r0
+        }}
+    }
+
+    sub mul16_last_upper() -> uword {
+        ; This routine peeks into the internal 32 bits multiplication result buffer of the
+        ; 16*16 bits multiplication routine, to fetch the upper 16 bits of the last calculation.
+        ; Notes:
+        ;   - to avoid interference it's best to fetch and store this value immediately after the multiplication expression.
+        ;     for instance, simply printing a number may already result in new multiplication calls being performed
+        ;   - not all multiplications in the source code result in an actual multiplication call:
+        ;     some simpler multiplications will be optimized away into faster routines. These will not set the upper 16 bits at all!
+        %ir {{
+            syscall 46 (): r0.w
+            returnr.w r0
+        }}
     }
 }
-
-sub atan2(ubyte x1, ubyte y1, ubyte x2, ubyte y2) -> ubyte {
-    ;; Calculate the angle, in a 256-degree circle, between two points into A.
-    ;; The points (x1, y1) and (x2, y2) have to use *unsigned coordinates only* from the positive quadrant in the carthesian plane!
-    %ir {{
-        loadm.b r65532,math.atan2.x1
-        loadm.b r65533,math.atan2.y1
-        loadm.b r65534,math.atan2.x2
-        loadm.b r65535,math.atan2.y2
-        syscall 44 (r65532.b, r65533.b, r65534.b, r65535.b): r0.b
-        returnr.b r0
-    }}
-}
-
-}

compiler/src/prog8/CompilerMain.kt

@@ -42,13 +42,14 @@ private fun compileMain(args: Array<String>): Boolean {
     val startEmulator2 by cli.option(ArgType.Boolean, fullName = "emu2", description = "auto-start alternative emulator after successful compilation")
     val experimentalCodegen by cli.option(ArgType.Boolean, fullName = "expericodegen", description = "use experimental/alternative codegen")
     val dontWriteAssembly by cli.option(ArgType.Boolean, fullName = "noasm", description="don't create assembly code")
-    val dontOptimize by cli.option(ArgType.Boolean, fullName = "noopt", description = "don't perform any optimizations")
+    val dontOptimize by cli.option(ArgType.Boolean, fullName = "noopt", description = "don't perform code optimizations")
     val outputDir by cli.option(ArgType.String, fullName = "out", description = "directory for output files instead of current directory").default(".")
     val quietAssembler by cli.option(ArgType.Boolean, fullName = "quietasm", description = "don't print assembler output results")
     val warnSymbolShadowing by cli.option(ArgType.Boolean, fullName = "warnshadow", description="show assembler warnings about symbol shadowing")
     val sourceDirs by cli.option(ArgType.String, fullName="srcdirs", description = "list of extra paths, separated with ${File.pathSeparator}, to search in for imported modules").multiple().delimiter(File.pathSeparator)
     val includeSourcelines by cli.option(ArgType.Boolean, fullName = "sourcelines", description = "include original Prog8 source lines in generated asm code")
     val splitWordArrays by cli.option(ArgType.Boolean, fullName = "splitarrays", description = "treat all word arrays as tagged with @split to make them lsb/msb split in memory")
+    val breakpointCpuInstruction by cli.option(ArgType.Boolean, fullName = "breakinstr", description = "also use a CPU instruction for %breakpoint")
     val compilationTarget by cli.option(ArgType.String, fullName = "target", description = "target output of the compiler (one of '${C64Target.NAME}', '${C128Target.NAME}', '${Cx16Target.NAME}', '${AtariTarget.NAME}', '${PETTarget.NAME}', '${VMTarget.NAME}') (required)")
     val startVm by cli.option(ArgType.Boolean, fullName = "vm", description = "load and run a .p8ir IR source file in the VM")
     val watchMode by cli.option(ArgType.Boolean, fullName = "watch", description = "continuous compilation mode (watch for file changes)")
@@ -122,6 +123,7 @@ private fun compileMain(args: Array<String>): Boolean {
                     varsHighBank,
                     compilationTarget!!,
                     splitWordArrays == true,
+                    breakpointCpuInstruction = false,
                     processedSymbols,
                     srcdirs,
                     outputPath
@@ -190,6 +192,7 @@ private fun compileMain(args: Array<String>): Boolean {
                     varsHighBank,
                     compilationTarget!!,
                     splitWordArrays == true,
+                    breakpointCpuInstruction == true,
                     processedSymbols,
                     srcdirs,
                     outputPath

compiler/src/prog8/buildversion/BuildVersion.kt

@@ -5,11 +5,11 @@ package prog8.buildversion
  */
 const val MAVEN_GROUP = "prog8"
 const val MAVEN_NAME = "compiler"
-const val VERSION = "9.3-SNAPSHOT"
-const val GIT_REVISION = 4012
-const val GIT_SHA = "9167ba499de99696aa7c6887d4867eae70eb5caf"
-const val GIT_DATE = "2023-07-30T15:49:35Z"
+const val VERSION = "9.5.1"
+const val GIT_REVISION = 4157
+const val GIT_SHA = "3dc5a0e7f8e5a94fdb4c13ff9199a4bf912268f2"
+const val GIT_DATE = "2023-10-18T21:59:37Z"
 const val GIT_BRANCH = "master"
-const val BUILD_DATE = "2023-07-30T16:41:27Z"
-const val BUILD_UNIX_TIME = 1690735287514L
+const val BUILD_DATE = "2023-10-19T19:55:55Z"
+const val BUILD_UNIX_TIME = 1697745355291L
 const val DIRTY = 1

compiler/src/prog8/compiler/Compiler.kt

@@ -38,6 +38,7 @@ class CompilerArguments(val filepath: Path,
                         val varsHighBank: Int?,
                         val compilationTarget: String,
                         val splitWordArrays: Boolean,
+                        val breakpointCpuInstruction: Boolean,
                         val symbolDefs: Map<String, String>,
                         val sourceDirs: List<String> = emptyList(),
                         val outputDir: Path = Path(""),
@@ -74,6 +75,7 @@ fun compileProgram(args: CompilerArguments): CompilationResult? {
                 asmListfile = args.asmListfile
                 includeSourcelines = args.includeSourcelines
                 experimentalCodegen = args.experimentalCodegen
+                breakpointCpuInstruction = args.breakpointCpuInstruction
                 varsHighBank = args.varsHighBank
                 splitWordArrays = args.splitWordArrays
                 outputDir = args.outputDir.normalize()
@@ -109,7 +111,7 @@ fun compileProgram(args: CompilerArguments): CompilationResult? {
                 program.processAstBeforeAsmGeneration(compilationOptions, args.errors)
                 args.errors.report()
 
-                val intermediateAst = IntermediateAstMaker(program).transform()
+                val intermediateAst = IntermediateAstMaker(program, args.errors).transform()
 //                println("*********** COMPILER AST RIGHT BEFORE ASM GENERATION *************")
 //                printProgram(program)
 //                println("*********** AST RIGHT BEFORE ASM GENERATION *************")
@@ -254,6 +256,10 @@ fun parseMainModule(filepath: Path,
         importer.importImplicitLibraryModule("math")
     }
     importer.importImplicitLibraryModule("prog8_lib")
+    if(program.allBlocks.any { it.options().any { option->option=="verafxmuls" } }) {
+        if(compTarget.name==Cx16Target.NAME)
+            importer.importImplicitLibraryModule("verafx")
+    }
 
     if (compilerOptions.launcher == CbmPrgLauncherType.BASIC && compilerOptions.output != OutputType.PRG)
         errors.err("BASIC launcher requires output type PRG", program.toplevelModule.position)

compiler/src/prog8/compiler/astprocessing/AstChecker.kt

@@ -7,6 +7,8 @@ import prog8.ast.expressions.*
 import prog8.ast.statements.*
 import prog8.ast.walk.IAstVisitor
 import prog8.code.core.*
+import prog8.code.target.C64Target
+import prog8.code.target.Cx16Target
 import prog8.code.target.VMTarget
 import prog8.compiler.builtinFunctionReturnType
 import java.io.CharConversionException
@@ -822,8 +824,16 @@ internal class AstChecker(private val program: Program,
                     err("this directive may only occur in a block or at module level")
                 if(directive.args.isEmpty())
                     err("missing option directive argument(s)")
-                else if(directive.args.map{it.name in arrayOf("enable_floats", "force_output", "no_sysinit", "align_word", "align_page", "merge", "splitarrays", "no_symbol_prefixing")}.any { !it })
+                else if(directive.args.map{it.name in arrayOf("enable_floats", "force_output", "no_sysinit", "align_word", "align_page", "merge", "splitarrays", "no_symbol_prefixing", "verafxmuls")}.any { !it })
                     err("invalid option directive argument(s)")
+                if(directive.args.any {it.name=="align_word"} && directive.args.any { it.name=="align_page"})
+                    err("conflicting alignment options")
+                if(directive.parent is Block) {
+                    if(directive.args.any {it.name !in arrayOf("align_word", "align_page", "no_symbol_prefixing", "force_output", "merge", "splitarrays", "verafxmuls")})
+                        err("using an option that is not valid for blocks")
+                }
+                if(directive.args.any { it.name=="verafxmuls" } && compilerOptions.compTarget.name != Cx16Target.NAME)
+                    err("verafx option is only valid on cx16 target")
             }
             else -> throw SyntaxError("invalid directive ${directive.directive}", directive.position)
         }
@@ -1183,8 +1193,13 @@ internal class AstChecker(private val program: Program,
 
             if(funcName[0] in InplaceModifyingBuiltinFunctions) {
                 // in-place modification, can't be done on literals
-                if(functionCallStatement.args.any { it !is IdentifierReference && it !is ArrayIndexedExpression && it !is DirectMemoryRead }) {
-                    errors.err("invalid argument to a in-place modifying function", functionCallStatement.args.first().position)
+                if(funcName[0]=="setlsb" || funcName[0]=="setmsb") {
+                    val firstArg = functionCallStatement.args[0]
+                    if(firstArg !is IdentifierReference && firstArg !is ArrayIndexedExpression)
+                        errors.err("invalid argument to a in-place modifying function", functionCallStatement.args.first().position)
+                } else {
+                    if(functionCallStatement.args.any { it !is IdentifierReference && it !is ArrayIndexedExpression && it !is DirectMemoryRead })
+                        errors.err("invalid argument to a in-place modifying function", functionCallStatement.args.first().position)
                 }
             }
 

compiler/src/prog8/compiler/astprocessing/AstExtensions.kt

@@ -5,10 +5,12 @@ import prog8.ast.Program
 import prog8.ast.expressions.CharLiteral
 import prog8.ast.expressions.IdentifierReference
 import prog8.ast.expressions.NumericLiteral
+import prog8.ast.expressions.StringLiteral
 import prog8.ast.statements.*
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
 import prog8.code.core.*
+import java.io.CharConversionException
 
 
 internal fun Program.checkValid(errors: IErrorReporter, compilerOptions: CompilationOptions) {
@@ -63,13 +65,35 @@ internal fun Program.charLiteralsToUByteLiterals(target: ICompilationTarget, err
                 errors.err("compilation target doesn't support this text encoding", char.position)
                 return noModifications
             }
-            return listOf(IAstModification.ReplaceNode(
-                char,
-                NumericLiteral(DataType.UBYTE, target.encodeString(char.value.toString(), char.encoding)[0].toDouble(), char.position),
-                parent
-            ))
+            return try {
+                val encoded = target.encodeString(char.value.toString(), char.encoding)
+                listOf(IAstModification.ReplaceNode(
+                    char,
+                    NumericLiteral(DataType.UBYTE, encoded[0].toDouble(), char.position),
+                    parent
+                ))
+            } catch (x: CharConversionException) {
+                errors.err(x.message ?: "can't encode character", char.position)
+                noModifications
+            }
+        }
+
+        override fun after(string: StringLiteral, parent: Node): Iterable<IAstModification> {
+            // this only *checks* for errors for string encoding. The actual encoding is done much later
+            require(string.encoding != Encoding.DEFAULT)
+            if(string.encoding != Encoding.DEFAULT && string.encoding !in target.supportedEncodings) {
+                errors.err("compilation target doesn't support this text encoding", string.position)
+                return noModifications
+            }
+            try {
+                target.encodeString(string.value, string.encoding)
+            } catch (x: CharConversionException) {
+                errors.err(x.message ?: "can't encode string", string.position)
+            }
+            return noModifications
         }
     }
+
     walker.visit(this)
     walker.applyModifications()
 }

compiler/src/prog8/compiler/astprocessing/BeforeAsmAstChanger.kt

@@ -39,72 +39,6 @@ internal class BeforeAsmAstChanger(val program: Program, private val options: Co
         return noModifications
     }
 
-    override fun after(assignment: Assignment, parent: Node): Iterable<IAstModification> {
-        // Try to replace A = B <operator> Something  by A= B, A = A <operator> Something
-        // this triggers the more efficent augmented assignment code generation more often.
-        // But it can only be done if the target variable IS NOT OCCURRING AS AN OPERAND ITSELF.
-
-        if(options.compTarget.name==VMTarget.NAME)   // don't apply this optimization for Vm target
-            return noModifications
-
-        if(!assignment.isAugmentable
-            && assignment.target.identifier != null
-            && !assignment.target.isIOAddress(options.compTarget.machine)) {
-            val binExpr = assignment.value as? BinaryExpression
-
-            if (binExpr != null && binExpr.operator !in ComparisonOperators) {
-                if (binExpr.left !is BinaryExpression) {
-                    if (binExpr.right.referencesIdentifier(assignment.target.identifier!!.nameInSource)) {
-                        // the right part of the expression contains the target variable itself.
-                        // we can't 'split' it trivially because the variable will be changed halfway through.
-                        if(binExpr.operator in AssociativeOperators) {
-                            // A = <something-without-A>  <associativeoperator>  <otherthing-with-A>
-                            // use the other part of the expression to split.
-                            val sourceDt = binExpr.right.inferType(program).getOrElse { throw AssemblyError("unknown dt") }
-                            val (_, right) = binExpr.right.typecastTo(assignment.target.inferType(program).getOrElse { throw AssemblyError(
-                                "unknown dt"
-                            )
-                            }, sourceDt, implicit=true)
-                            val assignRight = Assignment(assignment.target, right, AssignmentOrigin.ASMGEN, assignment.position)
-                            return listOf(
-                                IAstModification.InsertBefore(assignment, assignRight, parent as IStatementContainer),
-                                IAstModification.ReplaceNode(binExpr.right, binExpr.left, binExpr),
-                                IAstModification.ReplaceNode(binExpr.left, assignment.target.toExpression(), binExpr)
-                            )
-                        }
-                    } else {
-                        if(binExpr.left isSameAs assignment.target)
-                            return noModifications
-                        val typeCast = binExpr.left as? TypecastExpression
-                        if(typeCast!=null && typeCast.expression isSameAs assignment.target)
-                            return noModifications
-
-                        if(binExpr.operator in "+-") {
-                            val leftDt = binExpr.left.inferType(program)
-                            val rightDt = binExpr.right.inferType(program)
-                            if(leftDt==rightDt && leftDt.isInteger && rightDt.isInteger && binExpr.right is ArrayIndexedExpression) {
-                                // don't split array[i] +/- array[i]    (the codegen has an optimized path for this)
-                                return noModifications
-                            }
-                        }
-
-                        val sourceDt = binExpr.left.inferType(program).getOrElse { throw AssemblyError("unknown dt") }
-                        val (_, left) = binExpr.left.typecastTo(assignment.target.inferType(program).getOrElse { throw AssemblyError(
-                            "unknown dt"
-                        )
-                        }, sourceDt, implicit=true)
-                        val assignLeft = Assignment(assignment.target, left, AssignmentOrigin.ASMGEN, assignment.position)
-                        return listOf(
-                            IAstModification.InsertBefore(assignment, assignLeft, parent as IStatementContainer),
-                            IAstModification.ReplaceNode(binExpr.left, assignment.target.toExpression(), binExpr)
-                        )
-                    }
-                }
-            }
-        }
-        return noModifications
-    }
-
     override fun after(scope: AnonymousScope, parent: Node): Iterable<IAstModification> {
         if(scope.statements.any { it is VarDecl || it is IStatementContainer })
             throw FatalAstException("anonymousscope may no longer contain any vardecls or subscopes")

compiler/src/prog8/compiler/astprocessing/BeforeAsmTypecastCleaner.kt

@@ -56,7 +56,7 @@ internal class BeforeAsmTypecastCleaner(val program: Program,
                         listOf(
                             IAstModification.ReplaceNode(
                                 typecast,
-                                AddressOf(identifier, typecast.position),
+                                AddressOf(identifier, null, typecast.position),
                                 parent
                             )
                         )

compiler/src/prog8/compiler/astprocessing/CodeDesugarer.kt

@@ -24,6 +24,7 @@ internal class CodeDesugarer(val program: Program, private val errors: IErrorRep
     // - replace peek() and poke() by direct memory accesses.
     // - repeat-forever loops replaced by label+jump.
     // - pointer[word] replaced by @(pointer+word)
+    // - @(&var) and @(&var+1) replaced by lsb(var) and msb(var) if var is a word
 
 
     override fun before(breakStmt: Break, parent: Node): Iterable<IAstModification> {
@@ -211,4 +212,30 @@ _after:
 
         return noModifications
     }
+
+    override fun after(memread: DirectMemoryRead, parent: Node): Iterable<IAstModification> {
+        // for word variables:
+        // @(&var) --> lsb(var)
+        // @(&var+1) --> msb(var)
+
+        val addrOf = memread.addressExpression as? AddressOf
+        if(addrOf?.arrayIndex!=null)
+            return noModifications
+        if(addrOf!=null && addrOf.identifier.inferType(program).isWords) {
+            val lsb = FunctionCallExpression(IdentifierReference(listOf("lsb"), memread.position), mutableListOf(addrOf.identifier), memread.position)
+            return listOf(IAstModification.ReplaceNode(memread, lsb, parent))
+        }
+        val expr = memread.addressExpression as? BinaryExpression
+        if(expr!=null && expr.operator=="+") {
+            val addressOf = expr.left as? AddressOf
+            val offset = (expr.right as? NumericLiteral)?.number?.toInt()
+            if(addressOf!=null && offset==1) {
+                val msb = FunctionCallExpression(IdentifierReference(listOf("msb"), memread.position), mutableListOf(addressOf.identifier), memread.position)
+                return listOf(IAstModification.ReplaceNode(memread, msb, parent))
+            }
+        }
+
+        return noModifications
+    }
+
 }

compiler/src/prog8/compiler/astprocessing/IntermediateAstMaker.kt

@@ -19,7 +19,7 @@ import kotlin.io.path.isRegularFile
 /**
  *  Convert 'old' compiler-AST into the 'new' simplified AST with baked types.
  */
-class IntermediateAstMaker(private val program: Program) {
+class IntermediateAstMaker(private val program: Program, private val errors: IErrorReporter) {
     fun transform(): PtProgram {
         val ptProgram = PtProgram(
             program.name,
@@ -161,6 +161,7 @@ class IntermediateAstMaker(private val program: Program) {
     private fun transform(srcBlock: Block): PtBlock {
         var alignment = PtBlock.BlockAlignment.NONE
         var forceOutput = false
+        var veraFxMuls = false
         var noSymbolPrefixing = false
         val directives = srcBlock.statements.filterIsInstance<Directive>()
         for (directive in directives.filter { it.directive == "%option" }) {
@@ -169,15 +170,16 @@ class IntermediateAstMaker(private val program: Program) {
                     "align_word" -> alignment = PtBlock.BlockAlignment.WORD
                     "align_page" -> alignment = PtBlock.BlockAlignment.PAGE
                     "no_symbol_prefixing" -> noSymbolPrefixing = true
-                    "force_output" -> forceOutput=true
+                    "force_output" -> forceOutput = true
                     "merge", "splitarrays"  -> { /* ignore this one */ }
+                    "verafxmuls" -> veraFxMuls = true
                     else -> throw FatalAstException("weird directive option: ${arg.name}")
                 }
             }
         }
         val (vardecls, statements) = srcBlock.statements.partition { it is VarDecl }
         val src = srcBlock.definingModule.source
-        val block = PtBlock(srcBlock.name, srcBlock.address, srcBlock.isInLibrary, forceOutput, noSymbolPrefixing, alignment, src, srcBlock.position)
+        val block = PtBlock(srcBlock.name, srcBlock.address, srcBlock.isInLibrary, forceOutput, noSymbolPrefixing, veraFxMuls, alignment, src, srcBlock.position)
         makeScopeVarsDecls(vardecls).forEach { block.add(it) }
         for (stmt in statements)
             block.add(transformStatement(stmt))
@@ -398,13 +400,26 @@ class IntermediateAstMaker(private val program: Program) {
     }
 
     private fun transform(srcVar: VarDecl): PtNode {
-        return when(srcVar.type) {
+        when(srcVar.type) {
             VarDeclType.VAR -> {
                 val value = if(srcVar.value!=null) transformExpression(srcVar.value!!) else null
-                PtVariable(srcVar.name, srcVar.datatype, srcVar.zeropage, value, srcVar.arraysize?.constIndex()?.toUInt(), srcVar.position)
+                if(srcVar.datatype in ArrayDatatypes) {
+                    if(value==null) {
+                        val blockOptions = srcVar.definingBlock.options()
+                        if("align_page" in blockOptions || "align_word" in blockOptions) {
+                            errors.warn("converting uninitialized array to explicit zeros because of block alignment option", srcVar.position)
+                            val zeros = PtArray(srcVar.datatype, srcVar.position)
+                            repeat(srcVar.arraysize!!.constIndex()!!) {
+                                zeros.children.add(PtNumber(ArrayToElementTypes.getValue(srcVar.datatype), 0.0, srcVar.position))
+                            }
+                            return PtVariable(srcVar.name, srcVar.datatype, srcVar.zeropage, zeros, srcVar.arraysize?.constIndex()?.toUInt(), srcVar.position)
+                        }
+                    }
+                }
+                return PtVariable(srcVar.name, srcVar.datatype, srcVar.zeropage, value, srcVar.arraysize?.constIndex()?.toUInt(), srcVar.position)
             }
-            VarDeclType.CONST -> PtConstant(srcVar.name, srcVar.datatype, (srcVar.value as NumericLiteral).number, srcVar.position)
-            VarDeclType.MEMORY -> PtMemMapped(srcVar.name, srcVar.datatype, (srcVar.value as NumericLiteral).number.toUInt(), srcVar.arraysize?.constIndex()?.toUInt(), srcVar.position)
+            VarDeclType.CONST -> return PtConstant(srcVar.name, srcVar.datatype, (srcVar.value as NumericLiteral).number, srcVar.position)
+            VarDeclType.MEMORY -> return PtMemMapped(srcVar.name, srcVar.datatype, (srcVar.value as NumericLiteral).number.toUInt(), srcVar.arraysize?.constIndex()?.toUInt(), srcVar.position)
         }
     }
 
@@ -440,6 +455,8 @@ class IntermediateAstMaker(private val program: Program) {
             addr.add(PtIdentifier(name+"_lsb", dt, src.identifier.position))        // NOTE: assumes _lsb is first in memory! (immediately followed by _msb)
         else
             addr.add(transform(src.identifier))
+        if(src.arrayIndex!=null)
+            addr.add(transformExpression(src.arrayIndex!!.indexExpr))
         return addr
     }
 

compiler/src/prog8/compiler/astprocessing/NotExpressionAndIfComparisonExprChanger.kt

@@ -1,16 +1,17 @@
 package prog8.compiler.astprocessing
 
-import prog8.ast.*
+import prog8.ast.Node
+import prog8.ast.Program
 import prog8.ast.base.FatalAstException
-import prog8.ast.expressions.*
-import prog8.ast.statements.AssignTarget
-import prog8.ast.statements.Assignment
-import prog8.ast.statements.AssignmentOrigin
-import prog8.ast.statements.IfElse
+import prog8.ast.expressions.BinaryExpression
+import prog8.ast.expressions.NumericLiteral
+import prog8.ast.expressions.PrefixExpression
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
-import prog8.code.core.*
-import prog8.code.target.VMTarget
+import prog8.code.core.DataType
+import prog8.code.core.ICompilationTarget
+import prog8.code.core.IErrorReporter
+import prog8.code.core.IntegerDatatypes
 
 internal class NotExpressionAndIfComparisonExprChanger(val program: Program, val errors: IErrorReporter, val compTarget: ICompilationTarget) : AstWalker() {
 
@@ -99,108 +100,4 @@ internal class NotExpressionAndIfComparisonExprChanger(val program: Program, val
         }
         return noModifications
     }
-
-
-    override fun before(ifElse: IfElse, parent: Node): Iterable<IAstModification> {
-        if(compTarget.name == VMTarget.NAME)  // don't apply this optimization for Vm target
-            return noModifications
-
-        val binExpr = ifElse.condition as? BinaryExpression
-        if(binExpr==null || binExpr.operator !in ComparisonOperators)
-            return noModifications
-
-        // Simplify the conditional expression, introduce simple assignments if required.
-        // NOTE: sometimes this increases code size because additional stores/loads are generated for the
-        //       intermediate variables. We assume these are optimized away from the resulting assembly code later.
-        val simplify = simplifyConditionalExpression(binExpr)
-        val modifications = mutableListOf<IAstModification>()
-        if(simplify.rightVarAssignment!=null) {
-            modifications += IAstModification.ReplaceNode(binExpr.right, simplify.rightOperandReplacement!!, binExpr)
-            modifications += IAstModification.InsertBefore(
-                ifElse,
-                simplify.rightVarAssignment,
-                parent as IStatementContainer
-            )
-        }
-        if(simplify.leftVarAssignment!=null) {
-            modifications += IAstModification.ReplaceNode(binExpr.left, simplify.leftOperandReplacement!!, binExpr)
-            modifications += IAstModification.InsertBefore(
-                ifElse,
-                simplify.leftVarAssignment,
-                parent as IStatementContainer
-            )
-        }
-
-        return modifications
-    }
-
-    private class CondExprSimplificationResult(
-        val leftVarAssignment: Assignment?,
-        val leftOperandReplacement: Expression?,
-        val rightVarAssignment: Assignment?,
-        val rightOperandReplacement: Expression?
-    )
-
-    private fun simplifyConditionalExpression(expr: BinaryExpression): CondExprSimplificationResult {
-
-        // NOTE: do NOT move this to an earler ast transform phase (such as StatementReorderer or StatementOptimizer) - it WILL result in larger code.
-
-        if(compTarget.name == VMTarget.NAME)  // don't apply this optimization for Vm target
-            return CondExprSimplificationResult(null, null, null, null)
-
-        val leftDt = expr.left.inferType(program)
-        val rightDt = expr.right.inferType(program)
-
-        if(!leftDt.isInteger || !rightDt.isInteger) {
-            // we can't reasonably simplify non-integer expressions
-            return CondExprSimplificationResult(null, null, null, null)
-        }
-
-        var leftAssignment: Assignment? = null
-        var leftOperandReplacement: Expression? = null
-        var rightAssignment: Assignment? = null
-        var rightOperandReplacement: Expression? = null
-        val separateLeftExpr = !expr.left.isSimple
-                && expr.left !is IFunctionCall
-                && expr.left !is ContainmentCheck
-        val separateRightExpr = !expr.right.isSimple
-                && expr.right !is IFunctionCall
-                && expr.right !is ContainmentCheck
-
-        if(separateLeftExpr) {
-            val name = getTempRegisterName(leftDt)
-            leftOperandReplacement = IdentifierReference(name, expr.position)
-            leftAssignment = Assignment(
-                AssignTarget(IdentifierReference(name, expr.position), null, null, expr.position),
-                expr.left.copy(),
-                AssignmentOrigin.ASMGEN, expr.position
-            )
-        }
-        if(separateRightExpr) {
-            val (tempVarName, _) = program.getTempVar(rightDt.getOrElse { throw FatalAstException("invalid dt") }, true)
-            rightOperandReplacement = IdentifierReference(tempVarName, expr.position)
-            rightAssignment = Assignment(
-                AssignTarget(IdentifierReference(tempVarName, expr.position), null, null, expr.position),
-                expr.right.copy(),
-                AssignmentOrigin.ASMGEN, expr.position
-            )
-        }
-        return CondExprSimplificationResult(
-            leftAssignment, leftOperandReplacement,
-            rightAssignment, rightOperandReplacement
-        )
-    }
-    
-    fun getTempRegisterName(dt: InferredTypes.InferredType): List<String> {
-        return when {
-            // TODO assume (hope) cx16.r9 isn't used for anything else during the use of this temporary variable...
-            dt istype DataType.UBYTE -> listOf("cx16", "r9L")
-            dt istype DataType.BOOL -> listOf("cx16", "r9L")
-            dt istype DataType.BYTE -> listOf("cx16", "r9sL")
-            dt istype DataType.UWORD -> listOf("cx16", "r9")
-            dt istype DataType.WORD -> listOf("cx16", "r9s")
-            dt.isPassByReference -> listOf("cx16", "r9")
-            else -> throw FatalAstException("invalid dt $dt")
-        }
-    }
 }

compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt

@@ -304,8 +304,8 @@ internal class StatementReorderer(
         val eltsize = program.memsizer.memorySize(ArrayToElementTypes.getValue(sourceVar.datatype))
         val memcopy = FunctionCallStatement(IdentifierReference(listOf("sys", "memcopy"), assign.position),
             mutableListOf(
-                AddressOf(sourceIdent, assign.position),
-                AddressOf(identifier, assign.position),
+                AddressOf(sourceIdent, null, assign.position),
+                AddressOf(identifier, null, assign.position),
                 NumericLiteral.optimalInteger(numelements*eltsize, assign.position)
             ), false, assign.position
         )

compiler/src/prog8/compiler/astprocessing/TypecastsAdder.kt

@@ -265,7 +265,7 @@ class TypecastsAdder(val program: Program, val options: CompilationOptions, val
                                 if(identifier?.isSubroutineParameter(program)==false) {
                                     modifications += IAstModification.ReplaceNode(
                                             identifier,
-                                            AddressOf(identifier, arg.position),
+                                            AddressOf(identifier, null, arg.position),
                                             call as Node)
                                 }
                             } else if(arg is NumericLiteral) {
@@ -286,7 +286,7 @@ class TypecastsAdder(val program: Program, val options: CompilationOptions, val
                         if(arg is IdentifierReference && DataType.UWORD == param.type) {
                             modifications += IAstModification.ReplaceNode(
                                 arg,
-                                AddressOf(arg, arg.position),
+                                AddressOf(arg, null, arg.position),
                                 call as Node
                             )
                         }
@@ -312,7 +312,7 @@ class TypecastsAdder(val program: Program, val options: CompilationOptions, val
                                     if(identifier?.isSubroutineParameter(program)==false) {
                                         modifications += IAstModification.ReplaceNode(
                                             call.args[index],
-                                            AddressOf(identifier, pair.second.position),
+                                            AddressOf(identifier, null, pair.second.position),
                                             call as Node)
                                         break
                                     }
@@ -325,7 +325,7 @@ class TypecastsAdder(val program: Program, val options: CompilationOptions, val
                         if(pair.second is IdentifierReference && DataType.UWORD in pair.first.possibleDatatypes) {
                             modifications += IAstModification.ReplaceNode(
                                 call.args[index],
-                                AddressOf(pair.second as IdentifierReference, pair.second.position),
+                                AddressOf(pair.second as IdentifierReference, null, pair.second.position),
                                 call as Node
                             )
                         }

compiler/test/TestCompilerOnExamples.kt

@@ -35,6 +35,7 @@ private fun compileTheThing(filepath: Path, optimize: Boolean, target: ICompilat
         varsHighBank = null,
         compilationTarget = target.name,
         splitWordArrays = false,
+        breakpointCpuInstruction = false,
         symbolDefs = emptyMap(),
         outputDir = outputDir
     )
@@ -95,6 +96,7 @@ class TestCompilerOnExamplesCx16: FunSpec({
 
     val onlyCx16 = cartesianProduct(
         listOf(
+            "chunkedfile/demo",
             "vtui/testvtui",
             "pcmaudio/play-adpcm",
             "pcmaudio/stream-wav",
@@ -121,6 +123,7 @@ class TestCompilerOnExamplesCx16: FunSpec({
             "spotlight",
             "tehtriz",
             "testgfx2",
+            "testmonogfx",
         ),
         listOf(false, true)
     )

compiler/test/TestCompilerOptionLibdirs.kt

@@ -52,6 +52,7 @@ class TestCompilerOptionSourcedirs: FunSpec({
             varsHighBank = null,
             compilationTarget = Cx16Target.NAME,
             splitWordArrays = false,
+            breakpointCpuInstruction = false,
             symbolDefs = emptyMap(),
             sourceDirs,
             outputDir

compiler/test/TestStringEncodings.kt

@@ -89,6 +89,17 @@ class TestStringEncodings: FunSpec({
             PetsciiEncoding.encodeScreencode("~", false).expectError { "shouldn't be able to encode tilde" }
         }
 
+        test("testReturn") {
+            PetsciiEncoding.encodePetscii("\r", true) shouldBe Ok(listOf<UByte>(13u))
+            PetsciiEncoding.encodePetscii("\r", false) shouldBe Ok(listOf<UByte>(13u))
+            PetsciiEncoding.encodePetscii("\n", true) shouldBe Ok(listOf<UByte>(13u))
+            PetsciiEncoding.encodePetscii("\n", false) shouldBe Ok(listOf<UByte>(13u))
+            PetsciiEncoding.decodePetscii(listOf(13u), false) shouldBe Ok("\n")
+            PetsciiEncoding.decodePetscii(listOf(13u), true) shouldBe Ok("\n")
+            PetsciiEncoding.decodePetscii(listOf(0x8du), false) shouldBe Ok("\r")
+            PetsciiEncoding.decodePetscii(listOf(0x8du), true) shouldBe Ok("\r")
+        }
+
         test("testSpecialReplacements") {
             fun encodeP(c: Char, lower: Boolean) = PetsciiEncoding.encodePetscii(c.toString(), lower).getOrElse { throw it }.single()
             fun encodeS(c: Char, lower: Boolean) = PetsciiEncoding.encodeScreencode(c.toString(), lower).getOrElse { throw it }.single()
@@ -122,6 +133,10 @@ class TestStringEncodings: FunSpec({
             encodeP('\\', true) shouldBe 205u
             encodeS('\\', false) shouldBe 77u
             encodeS('\\', true) shouldBe 77u
+            encodeP('\r', true) shouldBe 13u
+            encodeP('\r', false) shouldBe 13u
+            encodeP('\n', true) shouldBe 13u
+            encodeP('\n', false) shouldBe 13u
         }
 
         test("testBoxDrawingCharsEncoding") {

compiler/test/TestSymbolTable.kt

@@ -82,7 +82,28 @@ class TestSymbolTable: FunSpec({
         st.allMemMappedVariables.single().scopedName shouldBe "block1.sub1.v3"
         st.allMemorySlabs.single().scopedName shouldBe "block1.sub1.slab1"
     }
-    
+
+    test("static vars") {
+        val node = PtIdentifier("dummy", DataType.UBYTE, Position.DUMMY)
+        val stVar1 = StStaticVariable("initialized", DataType.UBYTE, 99.0, null, null, null, ZeropageWish.DONTCARE, node)
+        val stVar2 = StStaticVariable("uninitialized", DataType.UBYTE, null, null, null, null, ZeropageWish.DONTCARE, node)
+        val arrayInitNonzero = listOf(StArrayElement(1.1, null), StArrayElement(2.2, null), StArrayElement(3.3, null))
+        val arrayInitAllzero = listOf(StArrayElement(0.0, null), StArrayElement(0.0, null), StArrayElement(0.0, null))
+        val stVar3 = StStaticVariable("initialized", DataType.ARRAY_UW, null, null, arrayInitNonzero, 3, ZeropageWish.DONTCARE, node)
+        val stVar4 = StStaticVariable("initialized", DataType.ARRAY_UW, null, null, arrayInitAllzero, 3, ZeropageWish.DONTCARE, node)
+        val stVar5 = StStaticVariable("uninitialized", DataType.ARRAY_UW, null, null, null, 3, ZeropageWish.DONTCARE, node)
+
+        stVar1.uninitialized shouldBe false
+        stVar1.length shouldBe null
+        stVar2.uninitialized shouldBe true
+        stVar2.length shouldBe null
+        stVar3.uninitialized shouldBe false
+        stVar3.length shouldBe 3
+        stVar4.uninitialized shouldBe false
+        stVar4.length shouldBe 3
+        stVar5.uninitialized shouldBe true
+        stVar5.length shouldBe 3
+    }
 })
 
 
@@ -90,7 +111,7 @@ private fun makeSt(): SymbolTable {
 
     // first build the AST
     val astProgram = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-    val astBlock1 = PtBlock("block1", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block1"), Position.DUMMY)
+    val astBlock1 = PtBlock("block1", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block1"), Position.DUMMY)
     val astConstant1 = PtConstant("c1", DataType.UWORD, 12345.0, Position.DUMMY)
     val astConstant2 = PtConstant("blockc", DataType.UWORD, 999.0, Position.DUMMY)
     astBlock1.add(astConstant1)
@@ -113,7 +134,7 @@ private fun makeSt(): SymbolTable {
     astBlock1.add(astSub2)
     val astBfunc = PtIdentifier("msb", DataType.UBYTE, Position.DUMMY)
     astBlock1.add(astBfunc)
-    val astBlock2 = PtBlock("block2", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block2"), Position.DUMMY)
+    val astBlock2 = PtBlock("block2", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block2"), Position.DUMMY)
     val astSub21 = PtSub("sub1", emptyList(), null, Position.DUMMY)
     val astSub22 = PtSub("sub2", emptyList(), null, Position.DUMMY)
     val astSub221 = PtSub("subsub", emptyList(), null, Position.DUMMY)

compiler/test/TestTypecasts.kt

@@ -58,11 +58,10 @@ class TestTypecasts: FunSpec({
 
         val result2 = compileText(C64Target(), true, text, writeAssembly = true)!!
         val stmts2 = result2.compilerAst.entrypoint.statements
-        stmts2.size shouldBe 6
-        val expr2 = (stmts2[4] as Assignment).value as BinaryExpression
+        stmts2.size shouldBe 5
+        val expr2 = (stmts2[3] as Assignment).value as BinaryExpression
         expr2.operator shouldBe "&"
         expr2.right shouldBe NumericLiteral(DataType.UBYTE, 1.0, Position.DUMMY)
-        (expr2.left as IdentifierReference).nameInSource shouldBe listOf("bb")
     }
 
     test("bool expressions with functioncalls") {
@@ -740,7 +739,7 @@ main  {
             }
         """
         val result = compileText(C64Target(), false, text, writeAssembly = true)!!
-        result.compilerAst.entrypoint.statements.size shouldBe 15
+        result.compilerAst.entrypoint.statements.size shouldBe 14
     }
 
     test("invalid typecasts of numbers") {

compiler/test/TestZeropage.kt

@@ -118,11 +118,11 @@ class TestC64Zeropage: FunSpec({
 
     test("testFreeSpacesBytes") {
         val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), true, false, c64target, 999u))
-        zp1.availableBytes() shouldBe 18
+        zp1.availableBytes() shouldBe 17
         val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), false, false, c64target, 999u))
-        zp2.availableBytes() shouldBe 88
+        zp2.availableBytes() shouldBe 87
         val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), false, false, c64target, 999u))
-        zp3.availableBytes() shouldBe 97
+        zp3.availableBytes() shouldBe 96
         val zp4 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), false, false, c64target, 999u))
         zp4.availableBytes() shouldBe 207
         zp4.allocate("test", DataType.UBYTE, null, null, errors)
@@ -162,7 +162,7 @@ class TestC64Zeropage: FunSpec({
 
     test("testBasicsafeAllocation") {
         val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), true, false, c64target, 999u))
-        zp.availableBytes() shouldBe 18
+        zp.availableBytes() shouldBe 17
         zp.hasByteAvailable() shouldBe true
         zp.hasWordAvailable() shouldBe true
 
@@ -215,18 +215,18 @@ class TestC64Zeropage: FunSpec({
 
     test("testEfficientAllocation") {
         val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(),  true, false, c64target, 999u))
-        zp.availableBytes() shouldBe 18
+        zp.availableBytes() shouldBe 17
         zp.allocate("", DataType.WORD,  null, null, errors).getOrElse{throw it}.address shouldBe 0x04u
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x06u
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x0au
         zp.allocate("", DataType.UWORD, null, null, errors).getOrElse{throw it}.address shouldBe 0x9bu
         zp.allocate("", DataType.UWORD, null, null, errors).getOrElse{throw it}.address shouldBe 0x9eu
-        zp.allocate("", DataType.UWORD, null, null, errors).getOrElse{throw it}.address shouldBe 0xa5u
         zp.allocate("", DataType.UWORD, null, null, errors).getOrElse{throw it}.address shouldBe 0xb0u
         zp.allocate("", DataType.UWORD, null, null, errors).getOrElse{throw it}.address shouldBe 0xbeu
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x0eu
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x92u
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x96u
+        zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0xa6u
         zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0xf9u
         zp.availableBytes() shouldBe 0
     }

compiler/test/ast/TestIntermediateAst.kt

@@ -8,6 +8,7 @@ import prog8.code.ast.*
 import prog8.code.core.DataType
 import prog8.code.target.C64Target
 import prog8.compiler.astprocessing.IntermediateAstMaker
+import prog8tests.helpers.ErrorReporterForTests
 import prog8tests.helpers.compileText
 
 class TestIntermediateAst: FunSpec({
@@ -26,8 +27,9 @@ class TestIntermediateAst: FunSpec({
             }
         """
         val target = C64Target()
+        val errors = ErrorReporterForTests()
         val result = compileText(target, false, text, writeAssembly = false)!!
-        val ast = IntermediateAstMaker(result.compilerAst).transform()
+        val ast = IntermediateAstMaker(result.compilerAst, errors).transform()
         ast.name shouldBe result.compilerAst.name
         ast.allBlocks().any() shouldBe true
         val entry = ast.entrypoint() ?: fail("no main.start() found")

compiler/test/codegeneration/TestAsmGenSymbols.kt

@@ -52,13 +52,13 @@ class TestAsmGenSymbols: StringSpec({
 
         val tgt = AssignTarget(IdentifierReference(listOf("tgt"), Position.DUMMY), null, null, Position.DUMMY)
         val assign1 = Assignment(tgt, IdentifierReference(listOf("localvar"), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign2 = Assignment(tgt, AddressOf(IdentifierReference(listOf("locallabel"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign3 = Assignment(tgt, AddressOf(IdentifierReference(listOf("var_outside"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign4 = Assignment(tgt, AddressOf(IdentifierReference(listOf("label_outside"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign5 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","start","localvar"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign6 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","start","locallabel"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign7 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","var_outside"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
-        val assign8 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","label_outside"), Position.DUMMY), Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign2 = Assignment(tgt, AddressOf(IdentifierReference(listOf("locallabel"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign3 = Assignment(tgt, AddressOf(IdentifierReference(listOf("var_outside"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign4 = Assignment(tgt, AddressOf(IdentifierReference(listOf("label_outside"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign5 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","start","localvar"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign6 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","start","locallabel"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign7 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","var_outside"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
+        val assign8 = Assignment(tgt, AddressOf(IdentifierReference(listOf("main","label_outside"), Position.DUMMY), null, Position.DUMMY), AssignmentOrigin.USERCODE, Position.DUMMY)
 
         val statements = mutableListOf(varInSub, var2InSub, labelInSub, assign1, assign2, assign3, assign4, assign5, assign6, assign7, assign8)
         val subroutine = Subroutine("start", mutableListOf(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, false, statements, Position.DUMMY)
@@ -75,7 +75,7 @@ class TestAsmGenSymbols: StringSpec({
     fun createTestAsmGen6502(program: Program): AsmGen6502Internal {
         val errors = ErrorReporterForTests()
         val options = CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), false, true, C64Target(), 999u)
-        val ptProgram = IntermediateAstMaker(program).transform()
+        val ptProgram = IntermediateAstMaker(program, errors).transform()
         val st = SymbolTableMaker(ptProgram, options).make()
         return AsmGen6502Internal(ptProgram, st, options, errors)
     }

compiler/test/codegeneration/TestVariousCodeGen.kt

@@ -9,6 +9,7 @@ import io.kotest.matchers.string.shouldStartWith
 import io.kotest.matchers.types.instanceOf
 import prog8.code.ast.PtArrayIndexer
 import prog8.code.ast.PtAssignment
+import prog8.code.ast.PtBinaryExpression
 import prog8.code.ast.PtVariable
 import prog8.code.core.DataType
 import prog8.code.target.C64Target
@@ -93,7 +94,7 @@ main {
         seed.type shouldBe DataType.ARRAY_UW
         val assign = start.children[1] as PtAssignment
         assign.target.identifier!!.name shouldBe "cx16.r0"
-        assign.value shouldBe instanceOf<PtArrayIndexer>()
+        assign.value shouldBe instanceOf<PtBinaryExpression>()
     }
 
     test("peek and poke argument types") {

compiler/test/helpers/compileXyz.kt

@@ -34,7 +34,8 @@ internal fun compileFile(
         symbolDefs = emptyMap(),
         outputDir = outputDir,
         errors = errors ?: ErrorReporterForTests(),
-        splitWordArrays = false
+        splitWordArrays = false,
+        breakpointCpuInstruction = false
     )
     return compileProgram(args)
 }

compilerAst/build.gradle

@@ -24,7 +24,7 @@ compileTestKotlin {
 dependencies {
     implementation project(':codeCore')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
-    implementation "org.antlr:antlr4-runtime:4.12.0"
+    implementation "org.antlr:antlr4-runtime:4.13.1"
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.18"
     implementation project(':parser')
 }
@@ -36,7 +36,7 @@ configurations.all {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
     }
 }

compilerAst/src/prog8/ast/AstToSourceTextConverter.kt

@@ -429,6 +429,7 @@ class AstToSourceTextConverter(val output: (text: String) -> Unit, val program:
     override fun visit(addressOf: AddressOf) {
         output("&")
         addressOf.identifier.accept(this)
+        addressOf.arrayIndex?.accept(this)
     }
 
     override fun visit(inlineAssembly: InlineAssembly) {

compilerAst/src/prog8/ast/antlr/Antlr2Kotlin.kt

@@ -469,8 +469,15 @@ private fun Prog8ANTLRParser.ExpressionContext.toAst() : Expression {
     if(directmemory()!=null)
         return DirectMemoryRead(directmemory().expression().toAst(), toPosition())
 
-    if(addressof()!=null)
-        return AddressOf(addressof().scoped_identifier().toAst(), toPosition())
+    if(addressof()!=null) {
+        val addressOf = addressof()
+        val identifier = addressOf.scoped_identifier()
+        val array = addressOf.arrayindexed()
+        return if(identifier!=null)
+            AddressOf(addressof().scoped_identifier().toAst(), null, toPosition())
+        else
+            AddressOf(array.scoped_identifier().toAst(), array.arrayindex().toAst(), toPosition())
+    }
 
     throw FatalAstException(text)
 }

compilerAst/src/prog8/ast/expressions/AstExpressions.kt

@@ -49,7 +49,7 @@ sealed class Expression: Node {
                 (other is TypecastExpression && other.implicit==implicit && other.type==type && other.expression isSameAs expression)
             }
             is AddressOf -> {
-                (other is AddressOf && other.identifier.nameInSource == identifier.nameInSource)
+                (other is AddressOf && other.identifier.nameInSource == identifier.nameInSource && other.arrayIndex==arrayIndex)
             }
             is RangeExpression -> {
                 (other is RangeExpression && other.from==from && other.to==to && other.step==step)
@@ -369,25 +369,34 @@ class TypecastExpression(var expression: Expression, var type: DataType, val imp
     }
 }
 
-data class AddressOf(var identifier: IdentifierReference, override val position: Position) : Expression() {
+data class AddressOf(var identifier: IdentifierReference, var arrayIndex: ArrayIndex?, override val position: Position) : Expression() {
     override lateinit var parent: Node
 
     override fun linkParents(parent: Node) {
         this.parent = parent
-        identifier.parent=this
+        identifier.linkParents(this)
+        arrayIndex?.linkParents(this)
     }
 
     override val isSimple = true
 
     override fun replaceChildNode(node: Node, replacement: Node) {
-        require(replacement is IdentifierReference && node===identifier)
-        identifier = replacement
-        replacement.parent = this
+        if(node===identifier) {
+            require(replacement is IdentifierReference)
+            identifier = replacement
+            replacement.parent = this
+        } else if(node===arrayIndex) {
+            require(replacement is ArrayIndex)
+            arrayIndex = replacement
+            replacement.parent = this
+        } else {
+            throw FatalAstException("invalid replace, no child node $node")
+        }
     }
 
-    override fun copy() = AddressOf(identifier.copy(), position)
+    override fun copy() = AddressOf(identifier.copy(), arrayIndex?.copy(), position)
     override fun constValue(program: Program): NumericLiteral? = null
-    override fun referencesIdentifier(nameInSource: List<String>) = identifier.nameInSource==nameInSource
+    override fun referencesIdentifier(nameInSource: List<String>) = identifier.nameInSource==nameInSource || arrayIndex?.referencesIdentifier(nameInSource)==true
     override fun inferType(program: Program) = InferredTypes.knownFor(DataType.UWORD)
     override fun accept(visitor: IAstVisitor) = visitor.visit(this)
     override fun accept(visitor: AstWalker, parent: Node)= visitor.visit(this, parent)

compilerAst/src/prog8/ast/walk/AstWalker.kt

@@ -458,6 +458,7 @@ abstract class AstWalker {
     fun visit(addressOf: AddressOf, parent: Node) {
         track(before(addressOf, parent), addressOf, parent)
         addressOf.identifier.accept(this, addressOf)
+        addressOf.arrayIndex?.accept(this)
         track(after(addressOf, parent), addressOf, parent)
     }
 

compilerAst/src/prog8/ast/walk/IAstVisitor.kt

@@ -173,6 +173,7 @@ interface IAstVisitor {
 
     fun visit(addressOf: AddressOf) {
         addressOf.identifier.accept(this)
+        addressOf.arrayIndex?.accept(this)
     }
 
     fun visit(inlineAssembly: InlineAssembly) {

dbusCompilerService/build.gradle

@@ -28,9 +28,9 @@ dependencies {
     implementation project(':codeCore')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
-    implementation 'org.jetbrains.kotlinx:kotlinx-cli:0.3.5'
+    implementation 'org.jetbrains.kotlinx:kotlinx-cli:0.3.6'
     implementation "com.github.hypfvieh:dbus-java:3.3.2"
-    implementation "org.slf4j:slf4j-simple:2.0.7"
+    implementation "org.slf4j:slf4j-simple:2.0.9"
 }
 
 configurations.all {
@@ -41,15 +41,15 @@ configurations.all {
 sourceSets {
     main {
         java {
-            srcDirs = ["${project.projectDir}/src"]
+            srcDir "${project.projectDir}/src"
         }
         resources {
-            srcDirs = ["${project.projectDir}/res"]
+            srcDir "${project.projectDir}/res"
         }
     }
     test {
         java {
-            srcDirs = ["${project.projectDir}/test"]
+            srcDir "${project.projectDir}/test"
         }
     }
 }

docs/source/compiling.rst

@@ -166,6 +166,13 @@ One or more .p8 module files
 ``-asmlist``
     Generate an assembler listing file as well.
 
+``-breakinstr``
+    Also output a CPU instruction for a ``%breakpoint``, as well as the entry in the vice monitor list file.
+    This can be useful on emulators/systems that don't parse the breakpoint information in the list file,
+    such as the X16Emu emulator for the Commander X16. Prog8 then uses a STP instruction (65c02) to trigger a
+    breakpoint in the debugger (if enabled with -debug on the emulator). On a 6502 CPU, this option
+    will output a BRK instruction instead.
+
 ``-expericodegen``
     Use experimental code generation backend (*incomplete*).
 

docs/source/index.rst

@@ -73,6 +73,7 @@ Language features
 - High-level code optimizations, such as const-folding (zero-allocation constants that are optimized away in expressions), expression and statement simplifications/rewriting.
 - Programs can be run multiple times without reloading because of automatic variable (re)initializations.
 - Supports the sixteen 'virtual' 16-bit registers R0 .. R15 as defined on the Commander X16, also on the other machines.
+- Support for low level system features such as Vera Fx hardware word multiplication on the Commander X16
 - If you only use standard Kernal and core prog8 library routines, it is sometimes possible to compile the *exact same program* for different machines (just change the compilation target flag)
 
 
@@ -201,6 +202,7 @@ Look in the `syntax-files <https://github.com/irmen/prog8/tree/master/syntax-fil
     targetsystem.rst
     technical.rst
     portingguide.rst
+    software.rst
     todo.rst
 
 

docs/source/libraries.rst

@@ -435,18 +435,46 @@ On the other targets, it only contains the definition of the 16 memory mapped vi
     restore the values of all 16 virtual registers r0 - r15 from the buffer. Might be useful in an IRQ handler to avoid clobbering them.
 
 
+emudbg  (cx16 only)
+-------------------
+X16Emu Emulator debug routines, for Cx16 only.
+Allows you to interface with the emulator's debug routines/registers.
+There's stuff like ``is_emulator`` to detect if running in the emulator,
+and ``console_write`` to write a (iso) string to the emulator's console (stdout) etc.
 
-gfx2  (cx16 only)
------------------
-Full-screen multicolor bitmap graphics routines, available on the Cx16 machine only.
+Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/emudbg.p8>`_
+to see what's in there.
+Information about the exposed debug registers is in the `emulator's documentation <https://github.com/X16Community/x16-emulator#debug-io-registers>`_.
 
-- multiple full-screen resolutions: 640 * 480 monochrome, and 320 * 240 monochrome and 256 colors
-- clearing screen, switching screen mode, also back to text mode is possible.
+
+monogfx  (cx16 only)
+--------------------
+Full-screen lores or hires monochrome bitmap graphics routines, available on the Cx16 machine only.
+Same interface as gfx2, but is optimized for monochrome (1 bpp) screens.
+
+- lores 320*240 or hires 640*480 bitmap mode, monochrome
+- clearing screen, switching screen mode, also back to text mode
+- drawing and reading individual pixels
+- drawing lines, rectangles, filled rectangles, circles, discs
+- flood fill
+- drawing text inside the bitmap
+- can draw using a stipple pattern (alternate black/white pixels)
+
+Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/monogfx.p8>`_
+to see what's in there.
+
+
+gfx2  (cx16 only)
+-----------------
+Full-screen multicolor bitmap graphics routines, available on the Cx16 machine only.
+Same interface as monogfx, but for color screens. For 1 bpp monochrome screens, use monogfx.
+
+- multiple full-screen bitmap color resolutions
+- clearing screen, switching screen mode, also back to text mode
 - drawing and reading individual pixels
 - drawing lines, rectangles, filled rectangles, circles, discs
 - flood fill
 - drawing text inside the bitmap
-- in monochrome mode, it's possible to use a stippled drawing pattern to simulate a shade of gray.
 
 Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/gfx2.p8>`_
 to see what's in there.
@@ -485,3 +513,30 @@ See the examples/cx16/sprites/dragon.p8 and dragons.p8 programs for ideas how to
 
 Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/sprites.p8>`_
 to see what's in there.
+
+
+verafx  (cx16 only)
+-------------------
+Available for the Cx16 target.
+Experimental routines that use the new Vera FX logic (hopefully coming in the Vera in new X16 boards,
+the emulators already support it).
+
+``available``
+    Returns true if Vera FX is available, false if not (that would be an older Vera chip)
+
+``mult`` , ``muls``
+    The hardware 16*16 multiplier is exposed via ``mult`` and ``muls`` routines (unsigned and signed respectively).
+    They are about 4 to 5 times faster as the default 6502 cpu routine for word multiplication.
+    But they depend on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
+    Note: there is a block level %option "verafxmuls" that automatically replaces all word multiplications in that block
+    by calls to verafx.muls/mult, but be careful with it because it may interfere with other Vera operations or IRQs.
+
+``clear``
+    Very quickly clear a piece of vram to a given byte value (it writes 4 bytes at a time).
+    The routine is around 3 times faster as a regular unrolled loop to clear vram.
+
+``transparency``
+    Enable or disable transparent writes (color 0 will be transparent if enabled).
+
+Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/verafx.p8>`_
+to see what's in there.

docs/source/programming.rst

@@ -909,6 +909,12 @@ ror2 (x)
     Modifies in-place, doesn't return a value (so can't be used in an expression).
     You can ror a memory location directly by using the direct memory access syntax, so like ``ror2(@($5000))``
 
+setlsb (x, value)
+    Sets the least significant byte of word variable x to a new value. Leaves the MSB untouched.
+
+setmsb (x, value)
+    Sets the most significant byte of word variable x to a new value. Leaves the LSB untouched.
+
 sizeof (name)
     Number of bytes that the object 'name' occupies in memory. This is a constant determined by the data type of
     the object. For instance, for a variable of type uword, the sizeof is 2.
@@ -931,7 +937,7 @@ memory (name, size, alignment)
     You can only treat it as a pointer or use it in inline assembly.
 
 callfar (bank, address, argumentword) -> uword     ; NOTE: specific to cx16 target for now
-    Calls an assembly routine in another bank on the Commander X16 (using its ``jsrfar`` routine)
+    Calls an assembly routine in another bank on the Commander X16 (using its ``JSRFAR`` routine)
     Be aware that ram OR rom bank may be changed depending on the address it jumps to!
     The argumentword will be loaded into the A+Y registers before calling the routine.
     The uword value that the routine returns in the A+Y registers, will be returned.

docs/source/software.rst

@@ -0,0 +1,43 @@
+
+=========================
+Software written in Prog8
+=========================
+
+Apart from the many `examples <https://github.com/irmen/prog8/tree/master/examples>`_ available in the source code repository,
+there are also larger pieces of software written using Prog8. Here's a list.
+
+
+`Assembler <https://github.com/irmen/cx16assem>`_
+    File-based assembler for the Commander X16.
+
+`Chess <https://github.com/irmen/cx16chess>`_
+    Chess game for the Commander X16, with 2-player or computer opponent game modes.
+
+`Image viewer <https://github.com/irmen/cx16imageviewer>`_
+    Multi-format image viewer for the Commander X16.
+    Can display C64 Koala, BMP, PCX and Amiga IFF images, including color cycling.
+
+`Petaxian <https://github.com/cyborgar/Petaxian>`_
+    Galaga type shoot em up game using only petscii graphics. Runs on C64 and Commander X16.
+
+`Rock Runner <https://github.com/irmen/cx16rockrunner>`_
+    Faithful Boulderdash clone, a well known arcade puzzle game from the 80's.
+    where you must collect all diamonds in a level while avoiding the hazards to reach the exit.
+    Can load the thousands of available fan made level files.
+    This game is for the Commander X16.
+
+`Shell <https://github.com/irmen/cx16shell>`_
+    Unix like command shell for the Commander X16.
+
+`Streaming Music Demo <https://github.com/irmen/cx16musicdemo>`_
+    Demoscene like "music demos" for the Commander X16.
+    They display graphics, animated song lyrics, and play a high quality sampled song streamed from disk.
+
+
+Various things:
+
+`GalaX16 and other programs <https://github.com/reltham/X16Prog8Code>`_
+    Beginnings of a Galaga game for the Commander X16.
+
+`Prog8 code for ZSMkit <https://github.com/mooinglemur/zsmkit/tree/main/p8demo>`_
+    ZSMkit is an advanced music and sound effects engine for the Commander X16.

docs/source/syntaxreference.rst

@@ -134,12 +134,14 @@ Directives
     - ``force_output`` (in a block) will force the block to be outputted in the final program.
       Can be useful to make sure some data is generated that would otherwise be discarded because the compiler thinks it's not referenced (such as sprite data)
     - ``align_word`` (in a block) will make the assembler align the start address of this block on a word boundary in memory (so, an even memory address).
+      Warning: if you use this to align array variables in the block, these have to be initialized with a value to make them stay in the block and get aligned properly. Otherwise they'll end up at a random spot in the BSS section and the alignment doesn't apply there.
     - ``align_page`` (in a block) will make the assembler align the start address of this block on a page boundary in memory (so, the LSB of the address is 0).
+      Warning: if you use this to align array variables in the block, these have to be initialized with a value to make them stay in the block and get aligned properly. Otherwise they'll end up at a random spot in the BSS section and the alignment doesn't apply there.
     - ``merge`` (in a block) will merge this block's contents into an already existing block with the same name. Useful in library scenarios.
     - ``splitarrays`` (block or module) makes all word-arrays in this scope lsb/msb split arrays (as if they all have the @split tag). See Arrays.
     - ``no_symbol_prefixing`` (block) makes the compiler *not* use symbol-prefixing when translating prog8 code into assembly.
       Only use this if you know what you're doing because it could result in invalid assembly code being generated.
-
+    - ``verafxmuls`` (block, cx16 target only) uses Vera FX hardware word multiplication on the CommanderX16 for all word multiplications in this block. Warning: this may interfere with IRQs and other Vera operations, so use this only when you know what you're doing. It's safer to explicitly use ``verafx.muls()``.
 
 .. data:: %asmbinary "<filename>" [, <offset>[, <length>]]
 
@@ -450,7 +452,8 @@ from the starting value to (and including) the ending value::
     <start>  downto  <end>   [ step  <step> ]
 
 You an provide a step value if you need something else than the default increment which is one (or,
-in case of downto, a decrement of one).   Because a step of minus one is so common you can just use
+in case of downto, a decrement of one).  Unlike the start and end values, the step value must be a constant.
+Because a step of minus one is so common you can just use
 the downto variant to avoid having to specify the step as well::
 
     0 to 7                   ; range of values 0, 1, 2, 3, 4, 5, 6, 7
@@ -729,6 +732,7 @@ for loop
 The loop variable must be a byte or word variable, and it must be defined separately first.
 The expression that you loop over can be anything that supports iteration (such as ranges like ``0 to 100``,
 array variables and strings) *except* floating-point arrays (because a floating-point loop variable is not supported).
+Remember that a step value in a range must be a constant value.
 
 You can use a single statement, or a statement block like in the example below::
 

docs/source/technical.rst

@@ -18,6 +18,9 @@ it won't actually increase the size of the resulting program binary.
 Prog8 takes care of properly filling this memory area with zeros at program startup and then reinitializes
 the subset of variables that have a nonzero initialization value.
 
+Arrays with initialization values are not put into BSS but just occupy a sequence of bytes in
+the program memory: their values are not reinitialized at program start.
+
 It is possible to relocate the BSS section using a compiler option
 so that more system ram is available for the program code itself.
 

docs/source/todo.rst

@@ -1,10 +1,9 @@
 TODO
 ====
 
-- prefix prog8 subroutines with p8s_ instead of p8_ to not let them clash with variables in the asm??
 - [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
-- IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
-- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? etc), but only after setting the status bits is verified!
+- [on branch: ir-less-branch-opcodes] IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
+- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? Bitwise operations, etc), but only after setting the status bits is verified!
 
 ...
 
@@ -20,6 +19,7 @@ Future Things and Ideas
 ^^^^^^^^^^^^^^^^^^^^^^^
 Compiler:
 
+- Currently "320*240/8/8" gives integer overflow, so: allow constant integer subexpressions to contain out of range integers (>65535 etc) as long as the final constant value is within byte/word range.
 - allow 'chained' array indexing for expressions:  value = ptrarray[0][0]
 - allow 'chained' array indexing for assign targets:  ptrarray[0][0] = 42   this is just evaluating the lhs as a uword pointer expression
 
@@ -33,12 +33,15 @@ Compiler:
     - OR.... make all this more generic and use some %segment option to create real segments for 64tass?
     - (need separate step in codegen and IR to write the "golden" variables)
 
+- do we need (array)variable alignment tag instead of block alignment tag? You want to align the data, not the code in the block?
+- ir: block alignment doesn't translate well to variables in the block (the actual stuff that needs to be aligned in memory)  but: need variable alignment tag instead of block alignment tag, really
 - ir: idea: (but LLVM IR simply keeps the variables, so not a good idea then?...): replace all scalar variables by an allocated register. Keep a table of the variable to register mapping (including the datatype)
   global initialization values are simply a list of LOAD instructions.
   Variables replaced include all subroutine parameters!  So the only variables that remain as variables are arrays and strings.
 - ir: add more optimizations in IRPeepholeOptimizer
-- ir: the @split arrays are currently also split in _lsb/_msb arrays in the IR, and operations take multiple (byte) instructions that may lead to verbose and slow operation and machine code generation down the line.
 - ir: for expressions with array indexes that occur multiple times, can we avoid loading them into new virtualregs everytime and just reuse a single virtualreg as indexer? (simple form of common subexpression elimination)
+- ir: the @split arrays are currently also split in _lsb/_msb arrays in the IR, and operations take multiple (byte) instructions that may lead to verbose and slow operation and machine code generation down the line.
+  maybe another representation is needed once actual codegeneration is done from the IR...?
 - PtAst/IR: more complex common subexpression eliminations
 - [problematic due to using 64tass:] better support for building library programs, where unused .proc shouldn't be deleted from the assembly?
   Perhaps replace all uses of .proc/.pend/.endproc by .block/.bend will fix that with a compiler flag?
@@ -50,15 +53,18 @@ Compiler:
 
 Libraries:
 
+- gfx2 cs_innerloop640() extend number of bytes cleared, and use vera fx cached writes
+- gfx2 horizontal_line and vertical_line: use vera fx cached writes
+- port monogfx, gf2, graphics to the vm
+- use verafx transparent writes to speed up pixel plotting in gfx2 and monogfx modules (avoids read/mask/write)
 - fix the problems in atari target, and flesh out its libraries.
 - c128 target: make syslib more complete (missing kernal routines)?
 - pet32 target: make syslib more complete (missing kernal routines)?
-- c64: make the graphics.BITMAP_ADDRESS configurable (VIC banking)
 
 
 Optimizations:
 
-- optimize assembly output for ( word1 & word2 ==0) ...  (no need for stack pushes) see attemptAssignToByteCompareZero().
+- treat every scalar variable decl with initialization value, as const by default, unless the variable gets assigned to somewhere (or has its address taken, or is @shared)
 - VariableAllocator: can we think of a smarter strategy for allocating variables into zeropage, rather than first-come-first-served?
   for instance, vars used inside loops first, then loopvars, then uwords used as pointers, then the rest
 - various optimizers skip stuff if compTarget.name==VMTarget.NAME.  Once 6502-codegen is done from IR code,

examples/c64/balloonflight.p8

@@ -15,7 +15,7 @@ main {
     ubyte perform_scroll = false
 
     sub start() {
-        c64.SPRPTR[0] = $0f00 / 64
+        c64.set_sprite_ptr(0, $0f00)           ; alternatively, set directly:  c64.SPRPTR[0] = $0f00 / 64
         c64.SPENA = 1
         c64.SP0COL = 14
         c64.SPXY[0] = 80

examples/c64/cube3d-sprites.p8

@@ -171,6 +171,7 @@ main {
 
             c64.SPXYW[i] = mkword(sy, sx)
 
+            ; because we want speed, we don't use the dynamic c64.set_sprite_ptr() here
             if(zc < 30*128)
                 c64.SPRPTR[i] = $2000/64 +1     ; large ball
             else

examples/c64/sprites.p8

@@ -40,7 +40,7 @@ main {
 
         ubyte @zp i
         for i in 0 to 7 {
-            c64.SPRPTR[i] = $0a00 / 64
+            c64.set_sprite_ptr(i, $0a00)           ; alternatively, set directly:  c64.SPRPTR[i] = $0a00 / 64
             c64.SPXY[i*2] = 50+25*i
             c64.SPXY[i*2+1] = math.rnd()
         }

examples/c64/turtle-gfx.p8

@@ -30,19 +30,18 @@ turtle {
     float angle
     bool pendown
 
+    const uword SPRITE_MEMORY = $5800
+
     sub init() {
         xpos = 160.0
         ypos = 100.0
         angle = 0.0
         pendown = true
 
-        const uword SPRITE_MEMORY = $5800
-        const uword SPRITE_ADDR_POINTERS = (graphics.CHARS_ADDRESS & $fc00) + 1016      ; no longer the default location 2040!
-
-        sys.memcopy(&turtlesprite, SPRITE_MEMORY, len(turtlesprite))
-        @(SPRITE_ADDR_POINTERS) = (SPRITE_MEMORY & $3fff) / 64
-        c64.SPENA = 1
-        c64.SP0COL = 5
+        sys.memcopy(&turtlesprite, SPRITE_MEMORY, len(turtlesprite))    ; copy the sprite pixel data
+        c64.set_sprite_ptr(0, SPRITE_MEMORY)        ; use dynamic setter because of changed vic memory layout
+        c64.SPENA = 1       ; sprites on
+        c64.SP0COL = 5      ; green sprite
 
         update_turtle_sprite()
     }

examples/c64/wizzine.p8

@@ -35,7 +35,7 @@ main {
     sub start() {
         ubyte i
         for i in 0 to 7 {
-            c64.SPRPTR[i] = $0a00/64
+            c64.set_sprite_ptr(i, $0a00)           ; alternatively, set directly:  c64.SPRPTR[i] = $0a00 / 64
         }
         c64.SPENA = 255                 ; enable all sprites
         sys.set_rasterirq(&irq.irqhandler, 230, true)     ; enable animation

examples/cx16/amiga.p8

@@ -8,7 +8,7 @@
 main {
 
     sub start() {
-        gfx2.screen_mode(6)             ; select 640*480 mode, 4 colors
+        gfx2.screen_mode(2)             ; select 640*480 mode, 4 colors
         mouse.set_pointer_image()
         cx16.mouse_config(-1, 640/8, 240/8)
         uword[4] amigacolors = [$aaa, $000, $fff, $68c]     ; gray, black, white, lightblue

examples/cx16/chunkedfile/.gitignore

@@ -0,0 +1,5 @@
+testdata/*TITLESCREEN.*
+*.mcf
+*.asm
+*.prg
+*.vice-mon-list

examples/cx16/chunkedfile/createmcf.py

@@ -0,0 +1,300 @@
+import struct
+from typing import Sequence
+
+# Chunk types:
+# user types: 0 - 239
+# reserved: 240 - 248
+CHUNK_DUMMY = 249
+CHUNK_BONKRAM = 250
+CHUNK_SYSTEMRAM = 251
+CHUNK_VIDEORAM = 252
+CHUNK_PAUSE = 253
+CHUNK_EOF = 254
+CHUNK_IGNORE = 255
+
+ChunksWithData = {CHUNK_DUMMY, CHUNK_SYSTEMRAM, CHUNK_VIDEORAM, CHUNK_BONKRAM}
+
+
+class LoadList:
+    def __init__(self):
+        self.data = bytearray([CHUNK_IGNORE] * 256)
+        self.data[0:4] = struct.pack("ccBB", b'L', b'L', 1, 0)
+        self.index = 4
+
+    def __eq__(self, other) -> bool:
+        return isinstance(other, LoadList) and self.data == other.data
+
+    def add_chunk(self, chunktype: int, size: int, bank: int = 0, address: int = 0) -> None:
+        if chunktype < 0 or chunktype > 255:
+            raise ValueError("chunktype must be 0 - 255")
+        if size < 0 or size > 65535:
+            raise ValueError(f"size must be 0 - 65535 bytes")
+        if bank < 0 or bank > 255:
+            raise ValueError("bank must be 0 - 255")
+        if address < 0 or address > 65535:
+            raise ValueError("address must be 0 - 65535")
+        data = struct.pack("<BHBH", chunktype, size, bank, address)
+        if self.index + len(data) > 255:
+            raise IndexError("too many chunks")
+        self.data[self.index: self.index + len(data)] = data
+        self.index += len(data)
+
+    def read(self, data: bytes) -> None:
+        if len(data) != 256:
+            raise ValueError("data must be 256 bytes long")
+        self.data[0:256] = data
+        self.index = 256
+
+    def parse(self) -> Sequence[tuple]:
+        if self.data[0] != ord('L') or self.data[1] != ord('L') or self.data[2] != 1:
+            raise ValueError("invalid loadlist identifier", self.data[:4])
+        index = 4
+        chunks = []
+        while index < 256:
+            chunktype = self.data[index]
+            if chunktype == CHUNK_IGNORE:
+                index += 1  # pad byte
+            elif chunktype == CHUNK_EOF:
+                chunks.append((CHUNK_EOF, 0, 0, 0))
+                return chunks
+            else:
+                size, bank, address = struct.unpack("<HBH", self.data[index + 1:index + 6])
+                chunks.append((chunktype, size, bank, address))
+                index += 6
+        return chunks
+
+    def is_empty(self) -> bool:
+        return self.index <= 4
+
+
+class MultiChunkFile:
+    def __init__(self):
+        self.chunks = []
+        self.loadlist = LoadList()
+        self.datachunks = []
+
+    def read(self, filename: str) -> None:
+        num_loadlist = 0
+        num_data = 0
+        data_total = 0
+        file_total = 0
+        with open(filename, "rb") as inf:
+            while True:
+                data = inf.read(256)
+                if len(data) == 0:
+                    break
+                loadlist = LoadList()
+                loadlist.read(data)
+                self.chunks.append(loadlist)
+                num_loadlist += 1
+                file_total += len(data)
+                for chunk in loadlist.parse():
+                    if chunk[0] == CHUNK_EOF:
+                        break
+                    elif chunk[0] in ChunksWithData or chunk[0] < 240:
+                        data = inf.read(chunk[1])
+                        self.chunks.append(data)
+                        num_data += 1
+                        data_total += len(data)
+                        file_total += len(data)
+        self.validate()
+        print("Read", filename)
+        print(f"  {num_loadlist} loadlists, {num_data} data chunks")
+        print(f"  total data size: {data_total} (${data_total:x})")
+        print(f"  total file size: {file_total} (${file_total:x})")
+
+    def write(self, filename: str) -> None:
+        self.flush_ll()
+        self.validate()
+        num_loadlist = 0
+        num_data = 0
+        data_total = 0
+        file_total = 0
+        with open(filename, "wb") as out:
+            for chunk in self.chunks:
+                if isinstance(chunk, LoadList):
+                    num_loadlist += 1
+                    out.write(chunk.data)
+                    file_total += len(chunk.data)
+                elif isinstance(chunk, bytes):
+                    num_data += 1
+                    out.write(chunk)
+                    file_total += len(chunk)
+                    data_total += len(chunk)
+                else:
+                    raise TypeError("invalid chunk type")
+        print("Written", filename)
+        print(f"  {num_loadlist} loadlists, {num_data} data chunks")
+        print(f"  total data size: {data_total} (${data_total:x})")
+        print(f"  total file size: {file_total} (${file_total:x})")
+
+    def validate(self) -> None:
+        if len(self.chunks) < 2:
+            raise ValueError("must be at least 2 chunks", self.chunks)
+        chunk_iter = iter(self.chunks)
+        eof_found = False
+        while not eof_found:
+            try:
+                chunk = next(chunk_iter)
+            except StopIteration:
+                raise ValueError("missing EOF chunk")
+            else:
+                if isinstance(chunk, LoadList):
+                    for lc in chunk.parse():
+                        if lc[0] == CHUNK_EOF:
+                            eof_found = True
+                            break
+                        elif lc[0] in ChunksWithData or lc[0] < 240:
+                            size, bank, address = lc[1:]
+                            data = next(chunk_iter)
+                            if isinstance(data, bytes):
+                                if len(data) != size:
+                                    raise ValueError("data chunk size mismatch")
+                            else:
+                                raise TypeError("expected data chunk")
+                else:
+                    raise TypeError("expected LoadList chunk")
+        try:
+            next(chunk_iter)
+        except StopIteration:
+            pass
+        else:
+            raise ValueError("trailing chunks")
+
+    def add_Dummy(self, size: int) -> None:
+        self.add_chunk(CHUNK_DUMMY, data=bytearray(size))
+
+    def add_SystemRam(self, bank: int, address: int, data: bytes, chunksize: int = 0xfe00) -> None:
+        if address >= 0xa000 and address < 0xc000:
+            raise ValueError("use add_BankedRam instead to load chunks into banked ram $a000-$c000")
+        if bank < 0 or bank > 31:
+            raise ValueError("bank must be 0 - 31")
+        while data:
+            if address >= 65536:
+                raise ValueError("data too large for system ram")
+            self.add_chunk(CHUNK_SYSTEMRAM, bank, address, data[:chunksize])
+            data = data[chunksize:]
+            address += chunksize
+
+    def add_BankedRam(self, bank: int, address: int, data: bytes, chunksize: int = 0x2000) -> None:
+        if address < 0xa000 or address >= 0xc000:
+            raise ValueError("use add_SystemRam instead to load chunks into normal system ram")
+        if chunksize > 0x2000:
+            raise ValueError("chunksize too large for banked ram, max 8K")
+        while data:
+            if address >= 0xc000:
+                address -= 0x2000
+                bank += 1
+                if bank >= 32:
+                    raise ValueError("data too large for banked ram")
+            self.add_chunk(CHUNK_SYSTEMRAM, bank, address, data[:chunksize])
+            data = data[chunksize:]
+            address += chunksize
+
+    def add_BonkRam(self, bonk: int, address: int, data: bytes, chunksize: int = 0x4000) -> None:
+        if bonk < 32 or bonk > 255:
+            raise ValueError("bank for bonk ram (cartridge ram) must be 32 - 255")
+        if chunksize > 0x4000:
+            raise ValueError("chunksize too large for bonk ram (cartridge ram), max 16K")
+        if address < 0xc000 or address > 0xffff:
+            raise ValueError("use add_SystemRam instead to load chunks into normal system ram")
+        while data:
+            if address > 0xffff:
+                address -= 0x4000
+                bonk += 1
+                if bonk > 255:
+                    raise ValueError("data too large for bonk ram (cartridge ram)")
+            self.add_chunk(CHUNK_BONKRAM, bonk, address, data[:chunksize])
+            data = data[chunksize:]
+            address += chunksize
+
+    def add_VideoRam(self, bank: int, address: int, data: bytes, chunksize: int = 0xfe00) -> None:
+        if bank < 0 or bank > 1:
+            raise ValueError("bank for videoram must be 0 or 1")
+        while data:
+            if address >= 65536:
+                address -= 65536
+                bank += 1
+                if bank >= 2:
+                    raise ValueError("data too large for video ram")
+            self.add_chunk(CHUNK_VIDEORAM, bank, address, data[:chunksize])
+            data = data[chunksize:]
+            address += chunksize
+
+    def add_User(self, chunktype: int, data: bytes) -> None:
+        if chunktype < 0 or chunktype > 239:
+            raise ValueError("user chunk type must be 0 - 239")
+        if len(data) > 65535:
+            raise ValueError("data too large to fit in a single chunk")
+        self.add_chunk(chunktype, data=data)
+
+    def add_Pause(self, code: int) -> None:
+        self.add_chunk_nodata(CHUNK_PAUSE, code)
+
+    def add_EOF(self) -> None:
+        self.add_chunk_nodata(CHUNK_EOF, 0)
+
+    def add_chunk(self, chunktype: int, bank: int = 0, address: int = 0, data: bytes = b"") -> None:
+        try:
+            self.loadlist.add_chunk(chunktype, len(data), bank, address)
+        except IndexError:
+            # loadlist is full, flush everything out and create a new one and put it in there.
+            self.flush_ll()
+            self.loadlist.add_chunk(chunktype, len(data), bank, address)
+        if data:
+            self.datachunks.append(bytes(data))
+
+    def add_chunk_nodata(self, chunktype: int, code: int = 0) -> None:
+        try:
+            self.loadlist.add_chunk(chunktype, code, 0, 0)
+        except IndexError:
+            # loadlist is full, flush everything out and create a new one and put it in there.
+            self.flush_ll()
+            self.loadlist.add_chunk(chunktype, code, 0, 0)
+
+    def flush_ll(self) -> None:
+        if not self.loadlist.is_empty():
+            self.chunks.append(self.loadlist)
+            self.chunks.extend(self.datachunks)
+            self.loadlist = LoadList()
+            self.datachunks.clear()
+
+
+if __name__ == "__main__":
+    try:
+        bitmap1 = open("testdata/ME-TITLESCREEN.BIN", "rb").read()
+        bitmap2 = open("testdata/DS-TITLESCREEN.BIN", "rb").read()
+        palette1 = open("testdata/ME-TITLESCREEN.PAL", "rb").read()
+        palette2 = open("testdata/DS-TITLESCREEN.PAL", "rb").read()
+    except IOError:
+        print("""ERROR: cannot load the demo data files.
+You'll need to put the titlescreen data files from the 'musicdemo' project into the testdata directory.
+The musicdemo is on github: https://github.com/irmen/cx16musicdemo
+The four files are the two ME- and the two DS- TITLESCREEN.BIN and .PAL files, and are generated by running the makefile in that project.""")
+        raise SystemExit
+
+    program = bytearray(3333)
+    textdata = b"hello this is a demo text....  \x00"
+
+    mcf = MultiChunkFile()
+    for _ in range(4):
+        mcf.add_User(42, bytearray(999))
+        mcf.add_SystemRam(0, 0x4000, program)
+        mcf.add_BankedRam(10, 0xa000, textdata)
+    mcf.add_Pause(444)
+    for _ in range(4):
+        mcf.add_User(42, bytearray(999))
+        mcf.add_VideoRam(1, 0xfa00, palette1)
+        mcf.add_VideoRam(0, 0, bitmap1)
+        mcf.add_Pause(333)
+        mcf.add_VideoRam(1, 0xfa00, palette2)
+        mcf.add_VideoRam(0, 0, bitmap2)
+        mcf.add_Pause(222)
+        mcf.add_BonkRam(32, 0xc000, bytearray(32768))
+    mcf.add_Pause(111)
+    mcf.add_EOF()
+    mcf.write("demo.mcf")
+    print("Verifying file...")
+    mcf2 = MultiChunkFile()
+    mcf2.read("demo.mcf")
+    assert mcf2.chunks == mcf.chunks

examples/cx16/chunkedfile/demo.p8

@@ -0,0 +1,67 @@
+%import textio
+%import mcf
+
+%zeropage basicsafe
+
+main {
+
+    sub start() {
+        uword duration
+        ubyte[256] bonkbuffer
+
+        set_screen_mode()
+        cbm.SETTIM(0,0,0)
+
+        mcf.set_callbacks(mcf_get_buffer, mcf_process_chunk)        ; not needed if the stream has no custom chunk types
+        mcf.set_bonkbuffer(bonkbuffer)
+
+        if mcf.open("demo.mcf", 8, 2) {
+            repeat {
+                mcf.stream()
+                if_cs {
+                    break   ; EOF reached, stop the streaming loop
+                } else {
+                    ; PAUSE chunk encountered, code is in cx16.r0
+                }
+            }
+            mcf.close()
+        }
+
+        duration = cbm.RDTIM16()
+        cbm.CINT()
+        txt.print("done. ")
+        txt.print_uw(duration)
+        txt.print(" jiffies.\n")
+    }
+
+    sub set_screen_mode() {
+        ; 640x400 16 colors
+        cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000      ; enable only layer 1
+        cx16.VERA_DC_HSCALE = 128
+        cx16.VERA_DC_VSCALE = 128
+        cx16.VERA_CTRL = %00000010
+        cx16.VERA_DC_VSTART = 20
+        cx16.VERA_DC_VSTOP = 400 /2 -1 + 20 ; clip off screen that overflows vram
+        cx16.VERA_L1_CONFIG = %00000110     ; 16 colors bitmap mode
+        cx16.VERA_L1_MAPBASE = 0
+        cx16.VERA_L1_TILEBASE = %00000001   ; hires
+    }
+
+    asmsub mcf_get_buffer(ubyte chunktype @A, uword size @XY) -> ubyte @A, uword @XY, bool @Pc {
+        %asm {{
+            ldx  #<$a000
+            ldy  #>$a000
+            lda  #10
+            clc
+            rts
+        }}
+    }
+
+    asmsub mcf_process_chunk() -> bool @Pc {
+        ; process the chunk that was loaded in the location returned by the previous call to mcf_get_buffer()
+        %asm {{
+            clc
+            rts
+        }}
+    }
+}

examples/cx16/chunkedfile/mcf.p8

@@ -0,0 +1,200 @@
+%import syslib
+%import string
+
+; Streaming routine for MCF files (multipurpose chunk format):
+; 1. call open()
+; 2. set callbacks if needed; set_callbacks()
+; 3. set bonk ram (cartridge ram) load buffer, if needed; set_bonkbuffer()
+; 4. call stream() in a loop
+; 5. call close() if you want to cleanup halfway through for some reason
+
+
+mcf {
+    uword loadlist_buf = memory("loadlist", 256, 0)
+    uword @zp loadlist_ptr
+    uword bonkbuffer
+    bool needs_loadlist
+    ubyte file_channel
+
+    sub open(str filename, ubyte drive, ubyte channel) -> bool {
+        cbm.SETNAM(string.length(filename), filename)
+        cbm.SETLFS(channel, drive, 2)
+        void cbm.OPEN()
+        if_cc {
+            if cbm.READST()==0 {
+                void cbm.CHKIN(channel)
+                loadlist_ptr = loadlist_buf
+                needs_loadlist = true
+                return true
+            }
+        }
+        close()
+        return false
+    }
+
+    sub close() {
+        cbm.CLRCHN()
+        cbm.CLOSE(file_channel)
+    }
+
+    asmsub set_callbacks(uword getbuffer_routine @R0, uword processchunk_routine @R1) {
+        %asm {{
+            lda  cx16.r0
+            ldy  cx16.r0+1
+            sta  p8_mcf.p8_stream.getbuffer_call+1
+            sty  p8_mcf.p8_stream.getbuffer_call+2
+            lda  cx16.r1
+            ldy  cx16.r1+1
+            sta  p8_mcf.p8_stream.processchunk_call+1
+            sty  p8_mcf.p8_stream.processchunk_call+2
+            rts
+        }}
+    }
+
+    sub set_bonkbuffer(uword buffer) {
+        ; needs to be a buffer of 256 bytes (1 page)
+        bonkbuffer = buffer
+    }
+
+    sub stream() {
+        repeat {
+            if needs_loadlist {
+                if not read_loadlist() {
+                    sys.set_carry()
+                    return
+                }
+                needs_loadlist = false
+            }
+
+            while (loadlist_ptr-loadlist_buf)<256 {
+                when @(loadlist_ptr) {
+                    255 -> {
+                        ; simply ignore this byte
+                        loadlist_ptr++
+                    }
+                    254 -> {
+                        ; End of File
+                        close()
+                        sys.set_carry()
+                        return
+                    }
+                    253 -> {
+                        ; pause streaming
+                        cx16.r0 = peekw(loadlist_ptr+1)
+                        loadlist_ptr+=6
+                        sys.clear_carry()
+                        return
+                    }
+                    252 -> {
+                        ; load into vram
+                        blockload_vram(peekw(loadlist_ptr+1), peek(loadlist_ptr+3), peekw(loadlist_ptr+4))
+                        loadlist_ptr+=6
+                    }
+                    251 -> {
+                        ; load into system ram
+                        blockload_ram(peekw(loadlist_ptr+1), peek(loadlist_ptr+3), peekw(loadlist_ptr+4))
+                        loadlist_ptr+=6
+                    }
+                    250 -> {
+                        ; bonk ram (cartridge ram)
+                        ; This cannot use MACPTR (because the kernal rom isn't banked in)
+                        ; so we have to load it into a buffer and copy it manually.
+                        ; Because this will be rarely used, the buffer is not allocated here to save memory, and instead
+                        ; the user has to set it with the config routine when the program wants to use this chunk type.
+                        blockload_bonkram(peekw(loadlist_ptr+1), peek(loadlist_ptr+3), peekw(loadlist_ptr+4))
+                        loadlist_ptr+=6
+                    }
+                    249 -> {
+                        ; dummy chunk
+                        blockload_dummy(peekw(loadlist_ptr+1))
+                        loadlist_ptr+=6
+                    }
+                    else -> {
+                        ; custom chunk
+                        uword @shared chunksize = peekw(loadlist_ptr+1)
+                        %asm {{
+                            lda  (p8_mcf.p8_loadlist_ptr)
+                            ldx  p8_chunksize
+                            ldy  p8_chunksize+1
+getbuffer_call              jsr  $ffff          ; modified
+                            bcc   +
+                            rts         ; fail - exit as if EOF
++                           sta  cx16.r1L
+                            stx  cx16.r0
+                            sty  cx16.r0+1
+                        }}
+                        blockload_ram(chunksize, cx16.r1L, cx16.r0)
+                        loadlist_ptr += 6
+                        %asm {{
+processchunk_call           jsr  $ffff      ; modified
+                            bcc  +
+                            rts
++
+                        }}
+                    }
+                }
+            }
+            needs_loadlist = true
+        }
+    }
+
+    sub read_loadlist() -> bool {
+        blockload_ram(256, cx16.getrambank(), loadlist_buf)
+        if loadlist_buf[0]!=sc:'L' or loadlist_buf[1]!=sc:'L' or loadlist_buf[2]!=1
+            return false        ; header error
+        loadlist_ptr = loadlist_buf+4
+    }
+
+    sub blockload_vram(uword size, ubyte bank, uword address) {
+        cx16.VERA_CTRL = 0
+        cx16.VERA_ADDR_L = lsb(address)
+        cx16.VERA_ADDR_M = msb(address)
+        cx16.VERA_ADDR_H = bank | %00010000     ; enable vera auto increment
+        while size {
+            size -= readblock(size, &cx16.VERA_DATA0, true)
+        }
+    }
+
+    sub blockload_dummy(uword size) {
+        ubyte buffer
+        while size {
+            size -= readblock(size, &buffer, true)
+        }
+    }
+
+    sub blockload_ram(uword size, ubyte bank, uword address) {
+        ubyte orig_ram_bank = cx16.getrambank()
+        cx16.rambank(bank)
+        cx16.r3 = address
+        while size {
+            cx16.r2 = readblock(size, cx16.r3, false)
+            size -= cx16.r2
+            cx16.r3 += cx16.r2
+        }
+        cx16.rambank(orig_ram_bank)
+    }
+
+    sub blockload_bonkram(uword size, ubyte bonk, uword address) {
+        ubyte orig_rom_bank = cx16.getrombank()
+        cx16.r3 = address
+        while size {
+            ubyte readsize = 255
+            if msb(size)==0
+                readsize = lsb(size)
+            cx16.r2 = cx16.MACPTR(readsize, bonkbuffer, false)  ; can't MACPTR directly to bonk ram
+            cx16.rombank(bonk)
+            sys.memcopy(bonkbuffer, cx16.r3, cx16.r2)   ; copy to bonk ram
+            cx16.rombank(orig_rom_bank)
+            size -= cx16.r2
+            cx16.r3 += cx16.r2
+        }
+    }
+
+    sub readblock(uword size, uword address, bool dontAdvance) -> uword {
+        if msb(size)>=2
+            return cx16.MACPTR(0, address, dontAdvance)         ; read 512 bytes
+        if msb(size)
+            return cx16.MACPTR(255, address, dontAdvance)       ; read 255 bytes
+        return cx16.MACPTR(lsb(size), address, dontAdvance)     ; read remaining number of bytes
+    }
+}

examples/cx16/chunkedfile/readme.md

@@ -0,0 +1,99 @@
+# Multipurpose Chunked File
+
+## Goals
+
+- meant for the Commander X16 system, depends on working MACPTR kernal call for fast loading.
+- single file, possibly megabytes in size, that contains various kinds of data to be loaded or streamed into different locations.
+- simple file format with few special cases.
+- no random access, only sequential reading/streaming.
+- simple user code that doesn't have to bother with the I/O at all.
+- a few chunk typs that can be handled automatically to load data into system ram, banked ram, or video ram.
+- custom chunk types for flexibility or extensibility.
+
+Theoretical optimal chunk size is 512 bytes but actual size may be different. (In practice there seems to be no significant speed impact)
+
+MCF files are meant to be be created using a tool on PC, and only being read on the X16.
+A Python tool is provided to create a demo MCF file.
+A proof of concept Prog8 library module and example program is provided to consume that demo MCF file on the X16.
+
+
+## File Format
+
+This is the MCF file format:
+
+| Chunk      | size (bytes) |
+|------------|--------------|
+| LoadList   | 256          |
+| Data       | 1 - 65535    |
+| Data       | 1 - 65535    |
+| ...        |              |
+| LoadList   | 256          |
+| Data       | 1 - 65535    |
+| Data       | 1 - 65535    |
+| ...        |              |
+
+and so on.
+There is no limit to the number of chunks and the size of the file, as long as it fits on the disk.
+
+
+### LoadList chunk
+
+This chunk is a list of what kinds of chunks occur in the file after it.
+It starts with a small identification header:
+
+| data    | meaning             |
+|---------|---------------------|
+| 2 bytes | 'LL' (76, 76)       |
+| byte    | version (1 for now) |
+| byte    | reserved (0)        |
+
+Then a sequence of 1 or more chunk specs (6 bytes each), as long as it still fits in 256 bytes:
+
+| data                 | meaning                                    |
+|----------------------|--------------------------------------------|
+| byte                 | chunk type                                 |
+| word (little-endian) | chunk size                                 |
+| byte                 | bank number (used for some chunk types)    |
+| word (little-endian) | memory address (used for some chunk types) |
+
+Total 6 bytes per occurrence. Any remaining unused bytes in the 256 bytes LoadList chunk are to be padded with byte 255.
+If there are more chunks in the file than fit in a single loadlist, we simply add another loadlist block and continue there.
+(The file only ends once an End Of File chunk type is encountered in a loadlist.)
+
+
+### Chunk types
+
+| chunk type | meaning                                                                                                                                                                                                                                         |
+|------------|-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| 0 - 239    | custom chunk types. See below.                                                                                                                                                                                                                  |
+| 240 - 248  | reserved for future system chunk types.                                                                                                                                                                                                         |
+| 249        | dummy chunk: read a chunk of the specified number of bytes but don't do anything with it. Useful to realign the file I/O on disk block size.                                                                                                    |
+| 250        | bonk ram load: use banknumber + address to set the Cartridge RAM ('bonk' RAM) bank and load address and loads the chunk there, then continue streaming. Note this is slower than other types of ram. Rquires 1 page of user chosen buffer area. |
+| 251        | system ram load: use banknumber + address to set the RAM bank and load address and loads the chunk there, then continue streaming.                                                                                                              |
+| 252        | video ram load: use banknumber + address to set the Vera VRAM bank (hi byte) and load address (mid+lo byte) and loads the chunk into video ram there, then continue streaming.                                                                  |
+| 253        | pause streaming. Returns from stream routine with pause status: Carry=clear. And reg.r0=size. until perhaps the program calls the stream routine again to resume.                                                                               |
+| 254        | end of file. Closes the file and stops streaming: returns from stream routine with exit status: Carry=set.                                                                                                                                      |
+| 255        | ignore this byte. Used to pad out the loadlist chunk to 256 bytes.                                                                                                                                                                              |
+
+
+### Custom chunk types (0 - 239)
+
+When such a custom chunk type is encountered, a user routine is called to get the load address for the chunk data,
+then the chunk is loaded into that buffer, and finally a user routine is called to process the chunk data.
+The size can be zero, so that the chunk type acts like a simple notification flag for the main program to do something.
+
+The first routine has the following signature:
+
+**get_buffer()**:
+    Arguments: reg.A = chunk type, reg.XY = chunksize.
+    Returns: Carry flag=success (set = fail, clear = ok), ram bank in reg.A, memory address in reg.XY.
+
+The second routine has the following signature:
+
+**process_chunk()**:
+    Arguments: none (save them from the get_buffer call if needed).
+    Returns: Carry flag=success (set = fail, clear = ok).
+
+These routines are provided to the streaming routine as callback addresses (ram bank number + address to call).
+If any of these routines returns Carry set (error status) the streaming routine halts, otherwise it keeps on going.
+The streaming continues until a End of File chunk type is encountered in the loadlist.

examples/cx16/chunkedfile/testdata/readme.txt

@@ -0,0 +1,3 @@
+You'll need to put the titlescreen data files from the 'musicdemo' project into this directory.
+The musicdemo is on github: https://github.com/irmen/cx16musicdemo
+The four files are the two ME- and the two DS- TITLESCREEN.BIN and .PAL files, and are generated by running the makefile in that project.

examples/cx16/cobramk3-gfx.p8

@@ -2,16 +2,11 @@
 %import test_stack
 %import conv
 %import math
+%import verafx
 
 ; TODO add all other Elite's ships, show their name, advance to next ship on keypress
 
 main {
-
-    ; storage for rotated coordinates
-    word[shipdata.totalNumberOfPoints] @split rotatedx
-    word[shipdata.totalNumberOfPoints] @split rotatedy
-    word[shipdata.totalNumberOfPoints] @split rotatedz
-
     sub start()  {
         uword anglex
         uword angley
@@ -24,11 +19,11 @@ main {
         print_ship_name()
 
         repeat {
-            rotate_vertices(msb(anglex), msb(angley), msb(anglez))
+            matrix_math.rotate_vertices(msb(anglex), msb(angley), msb(anglez))
 
-            cx16.GRAPH_set_colors(0, 0, 0)
-            ; cx16.GRAPH_clear()
-            cx16.GRAPH_draw_rect(32, 10, 256, 220, 0, true)
+            verafx.clear(0, 320*10, 0, 320*(220/4))
+            ; cx16.GRAPH_set_colors(0, 0, 0)
+            ; cx16.GRAPH_draw_rect(32, 10, 256, 220, 0, true)
 
             cx16.GRAPH_set_colors(1, 0, 0)
             draw_lines_hiddenremoval()
@@ -84,39 +79,6 @@ _ones       pla
     	}}
     }
 
-    sub rotate_vertices(ubyte ax, ubyte ay, ubyte az) {
-        ; rotate around origin (0,0,0)
-
-        ; set up the 3d rotation matrix values
-        word wcosa = math.cos8(ax)
-        word wsina = math.sin8(ax)
-        word wcosb = math.cos8(ay)
-        word wsinb = math.sin8(ay)
-        word wcosc = math.cos8(az)
-        word wsinc = math.sin8(az)
-
-        word wcosa_sinb = wcosa*wsinb / 128
-        word wsina_sinb = wsina*wsinb / 128
-
-        word Axx = wcosa*wcosb / 128
-        word Axy = (wcosa_sinb*wsinc - wsina*wcosc) / 128
-        word Axz = (wcosa_sinb*wcosc + wsina*wsinc) / 128
-        word Ayx = wsina*wcosb / 128
-        word Ayy = (wsina_sinb*wsinc + wcosa*wcosc) / 128
-        word Ayz = (wsina_sinb*wcosc - wcosa*wsinc) / 128
-        word Azx = -wsinb
-        word Azy = wcosb*wsinc / 128
-        word Azz = wcosb*wcosc / 128
-
-        ubyte @zp i
-        for i in 0 to shipdata.totalNumberOfPoints-1 {
-            ; don't normalize by dividing by 128, instead keep some precision for perspective calc later
-            rotatedx[i] = Axx*shipdata.xcoor[i] + Axy*shipdata.ycoor[i] + Axz*shipdata.zcoor[i]
-            rotatedy[i] = Ayx*shipdata.xcoor[i] + Ayy*shipdata.ycoor[i] + Ayz*shipdata.zcoor[i]
-            rotatedz[i] = Azx*shipdata.xcoor[i] + Azy*shipdata.ycoor[i] + Azz*shipdata.zcoor[i]
-        }
-    }
-
     const uword screen_width = 320
     const ubyte screen_height = 240
 
@@ -126,12 +88,12 @@ _ones       pla
         for i in shipdata.totalNumberOfEdges -1 downto 0 {
             ubyte @zp vFrom = shipdata.edgesFrom[i]
             ubyte @zp vTo = shipdata.edgesTo[i]
-            word persp1 = 200 + rotatedz[vFrom]/256
-            word persp2 = 200 + rotatedz[vTo]/256
-            cx16.GRAPH_draw_line(rotatedx[vFrom] / persp1 + screen_width/2 as uword,
-                rotatedy[vFrom] / persp1 + screen_height/2 as uword,
-                rotatedx[vTo] / persp2 + screen_width/2 as uword,
-                rotatedy[vTo] / persp2 + screen_height/2 as uword)
+            word persp1 = 200 + matrix_math.rotatedz[vFrom]/256
+            word persp2 = 200 + matrix_math.rotatedz[vTo]/256
+            cx16.GRAPH_draw_line(matrix_math.rotatedx[vFrom] / persp1 + screen_width/2 as uword,
+                matrix_math.rotatedy[vFrom] / persp1 + screen_height/2 as uword,
+                matrix_math.rotatedx[vTo] / persp2 + screen_width/2 as uword,
+                matrix_math.rotatedy[vTo] / persp2 + screen_height/2 as uword)
         }
     }
 
@@ -143,7 +105,7 @@ _ones       pla
         ubyte @zp pointIdx = 0
         ubyte faceNumber
         for faceNumber in shipdata.totalNumberOfFaces -1 downto 0 {
-            if facing_away(pointIdx) {
+            if matrix_math.facing_away(pointIdx) {
                 ; don't draw this face, fast-forward over the edges and points
                 edgeIdx += 3    ; every face hast at least 3 edges
                 while shipdata.facesEdges[edgeIdx]!=255 {
@@ -183,6 +145,62 @@ _ones       pla
         }
     }
 
+    ubyte[shipdata.totalNumberOfEdges] edgestodraw
+
+    sub draw_edge(ubyte edgeidx) {
+        edgestodraw[edgeidx] = false
+        ubyte vFrom = shipdata.edgesFrom[edgeidx]
+        ubyte vTo = shipdata.edgesTo[edgeidx]
+        word persp1 = 170 + matrix_math.rotatedz[vFrom]/256
+        word persp2 = 170 + matrix_math.rotatedz[vTo]/256
+        cx16.GRAPH_draw_line(matrix_math.rotatedx[vFrom] / persp1 + screen_width/2 as uword,
+            matrix_math.rotatedy[vFrom] / persp1 + screen_height/2 as uword,
+            matrix_math.rotatedx[vTo] / persp2 + screen_width/2 as uword,
+            matrix_math.rotatedy[vTo] / persp2 + screen_height/2 as uword)
+    }
+}
+
+matrix_math {
+    %option verafxmuls      ; accellerate all word-multiplications in this block using Vera FX hardware muls
+
+    ; storage for rotated coordinates
+    word[shipdata.totalNumberOfPoints] @split rotatedx
+    word[shipdata.totalNumberOfPoints] @split rotatedy
+    word[shipdata.totalNumberOfPoints] @split rotatedz
+
+    sub rotate_vertices(ubyte ax, ubyte ay, ubyte az) {
+        ; rotate around origin (0,0,0)
+
+        ; set up the 3d rotation matrix values
+        word wcosa = math.cos8(ax)
+        word wsina = math.sin8(ax)
+        word wcosb = math.cos8(ay)
+        word wsinb = math.sin8(ay)
+        word wcosc = math.cos8(az)
+        word wsinc = math.sin8(az)
+
+        word wcosa_sinb = wcosa*wsinb / 128
+        word wsina_sinb = wsina*wsinb / 128
+
+        word Axx = wcosa*wcosb / 128
+        word Axy = (wcosa_sinb*wsinc - wsina*wcosc) / 128
+        word Axz = (wcosa_sinb*wcosc + wsina*wsinc) / 128
+        word Ayx = wsina*wcosb / 128
+        word Ayy = (wsina_sinb*wsinc + wcosa*wcosc) / 128
+        word Ayz = (wsina_sinb*wcosc - wcosa*wsinc) / 128
+        word Azx = -wsinb
+        word Azy = wcosb*wsinc / 128
+        word Azz = wcosb*wcosc / 128
+
+        ubyte @zp i
+        for i in 0 to shipdata.totalNumberOfPoints-1 {
+            ; don't normalize by dividing by 128, instead keep some precision for perspective calc later
+            rotatedx[i] = Axx*shipdata.xcoor[i] + Axy*shipdata.ycoor[i] + Axz*shipdata.zcoor[i]
+            rotatedy[i] = Ayx*shipdata.xcoor[i] + Ayy*shipdata.ycoor[i] + Ayz*shipdata.zcoor[i]
+            rotatedz[i] = Azx*shipdata.xcoor[i] + Azy*shipdata.ycoor[i] + Azz*shipdata.zcoor[i]
+        }
+    }
+
     sub facing_away(ubyte edgePointsIdx) -> bool {
         ; simplistic visibility determination by checking the Z component of the surface normal
         ; TODO: actually take the line of sight vector into account
@@ -199,20 +217,6 @@ _ones       pla
         word p3y = rotatedy[p3] / 128
         return (p2x-p3x)*(p1y-p3y) - (p2y-p3y)*(p1x-p3x) > 0
     }
-
-    ubyte[shipdata.totalNumberOfEdges] edgestodraw
-
-    sub draw_edge(ubyte edgeidx) {
-        edgestodraw[edgeidx] = false
-        ubyte vFrom = shipdata.edgesFrom[edgeidx]
-        ubyte vTo = shipdata.edgesTo[edgeidx]
-        word persp1 = 170 + rotatedz[vFrom]/256
-        word persp2 = 170 + rotatedz[vTo]/256
-        cx16.GRAPH_draw_line(rotatedx[vFrom] / persp1 + screen_width/2 as uword,
-            rotatedy[vFrom] / persp1 + screen_height/2 as uword,
-            rotatedx[vTo] / persp2 + screen_width/2 as uword,
-            rotatedy[vTo] / persp2 + screen_height/2 as uword)
-    }
 }
 
 shipdata {

examples/cx16/cube3d.p8

@@ -3,6 +3,59 @@
 
 main {
 
+    sub start()  {
+
+        uword anglex
+        uword angley
+        uword anglez
+
+        repeat {
+            matrix_math.rotate_vertices(msb(anglex), msb(angley), msb(anglez))
+            txt.clear_screenchars(' ')
+            draw_edges()
+            anglex+=500
+            angley+=215
+            anglez+=453
+            sys.waitvsync()
+        }
+    }
+
+    sub draw_edges() {
+
+        ; plot the points of the 3d cube
+        ; first the points on the back, then the points on the front (painter algorithm)
+
+        ubyte @zp i
+        word @zp rz
+        word @zp persp
+        byte sx
+        byte sy
+
+        for i in 0 to len(matrix_math.xcoor)-1 {
+            rz = matrix_math.rotatedz[i]
+            if rz >= 10 {
+                persp = 400 + rz/64
+                sx = matrix_math.rotatedx[i] / persp as byte + txt.DEFAULT_WIDTH/2
+                sy = matrix_math.rotatedy[i] / persp as byte + txt.DEFAULT_HEIGHT/2
+                txt.setcc(sx as ubyte, sy as ubyte, 46, 7)
+            }
+        }
+
+        for i in 0 to len(matrix_math.xcoor)-1 {
+            rz = matrix_math.rotatedz[i]
+            if rz < 10 {
+                persp = 400 + rz/64
+                sx = matrix_math.rotatedx[i] / persp as byte + txt.DEFAULT_WIDTH/2
+                sy = matrix_math.rotatedy[i] / persp as byte + txt.DEFAULT_HEIGHT/2
+                txt.setcc(sx as ubyte, sy as ubyte, 81, 7)
+            }
+        }
+    }
+}
+
+matrix_math {
+    %option verafxmuls      ; accellerate all word-multiplications in this block using Vera FX hardware muls
+
     ; vertices
     word[] @split xcoor = [ -40, -40, -40, -40,  40,  40,  40, 40 ]
     word[] @split ycoor = [ -40, -40,  40,  40, -40, -40,  40, 40 ]
@@ -13,24 +66,6 @@ main {
     word[len(ycoor)] @split rotatedy
     word[len(zcoor)] @split rotatedz
 
-    sub start()  {
-
-        uword anglex
-        uword angley
-        uword anglez
-
-        repeat {
-            rotate_vertices(msb(anglex), msb(angley), msb(anglez))
-            txt.clear_screenchars(' ')
-            draw_edges()
-            anglex+=500
-            angley+=215
-            anglez+=453
-            sys.waitvsync()
-            sys.waitvsync()
-        }
-    }
-
     sub rotate_vertices(ubyte ax, ubyte ay, ubyte az) {
         ; rotate around origin (0,0,0)
 
@@ -64,35 +99,4 @@ main {
         }
     }
 
-    sub draw_edges() {
-
-        ; plot the points of the 3d cube
-        ; first the points on the back, then the points on the front (painter algorithm)
-
-        ubyte @zp i
-        word @zp rz
-        word @zp persp
-        byte sx
-        byte sy
-
-        for i in 0 to len(xcoor)-1 {
-            rz = rotatedz[i]
-            if rz >= 10 {
-                persp = 400 + rz/64
-                sx = rotatedx[i] / persp as byte + txt.DEFAULT_WIDTH/2
-                sy = rotatedy[i] / persp as byte + txt.DEFAULT_HEIGHT/2
-                txt.setcc(sx as ubyte, sy as ubyte, 46, 7)
-            }
-        }
-
-        for i in 0 to len(xcoor)-1 {
-            rz = rotatedz[i]
-            if rz < 10 {
-                persp = 400 + rz/64
-                sx = rotatedx[i] / persp as byte + txt.DEFAULT_WIDTH/2
-                sy = rotatedy[i] / persp as byte + txt.DEFAULT_HEIGHT/2
-                txt.setcc(sx as ubyte, sy as ubyte, 81, 7)
-            }
-        }
-    }
 }

examples/cx16/highresbitmap.p8

@@ -1,4 +1,4 @@
-%import gfx2
+%import monogfx
 %import floats
 %import textio
 %import math
@@ -7,77 +7,77 @@
 main {
 
     sub start () {
-        gfx2.text_charset(3)
+        monogfx.text_charset(3)
 
         test_monochrome()
 
-        gfx2.screen_mode(0)
+        monogfx.textmode()
         txt.print("done!\n")
     }
 
     sub test_monochrome() {
-        gfx2.screen_mode(5)
+        monogfx.hires()
         uword yy
         uword xx
         word ww
 
         yy = 20
         xx = 20
-        gfx2.monochrome_stipple(false)
-        gfx2.rect(xx, yy, 250, 80, 1)
-        gfx2.monochrome_stipple(true)
-        gfx2.fillrect(xx+2, yy+2, 250-4, 80-4, 1)
-        gfx2.monochrome_stipple(false)
-        gfx2.fillrect(xx+20, yy+20, 200, 30, 1)
-        gfx2.rect(xx+21, yy+21, 200-2, 30-2, 0)
+        monogfx.stipple(false)
+        monogfx.rect(xx, yy, 250, 80, 1)
+        monogfx.stipple(true)
+        monogfx.fillrect(xx+2, yy+2, 250-4, 80-4, 1)
+        monogfx.stipple(false)
+        monogfx.fillrect(xx+20, yy+20, 200, 30, 1)
+        monogfx.rect(xx+21, yy+21, 200-2, 30-2, 0)
 
-        gfx2.text(xx+30, yy+32, 0, sc:"High Res Bitmap Example")
+        monogfx.text(xx+30, yy+32, 0, sc:"High Res Bitmap Example")
 
-        ; gfx2.monochrome_stipple(true)
-        gfx2.horizontal_line(10, 240, 620, 1)
-        gfx2.vertical_line(320, 10, 460, 1)
-        gfx2.text(320, 242, 1, sc:"0,0")
-        gfx2.text(322, 10, 1, sc:"Y-axis")
-        gfx2.text(590, 242, 1, sc:"X-axis")
+        ; monogfx.stipple(true)
+        monogfx.horizontal_line(10, 240, 620, 1)
+        monogfx.vertical_line(320, 10, 460, 1)
+        monogfx.text(320, 242, 1, sc:"0,0")
+        monogfx.text(322, 10, 1, sc:"Y-axis")
+        monogfx.text(590, 242, 1, sc:"X-axis")
         for ww in -10 to 10 {
             xx = (ww*30) + 320 as uword
-            gfx2.vertical_line(xx, 239, 3, 1)
+            monogfx.vertical_line(xx, 239, 3, 1)
         }
         for ww in -7 to 7 {
             yy = (ww*30) + 240 as uword
-            gfx2.horizontal_line(319, yy, 3, 1)
+            monogfx.horizontal_line(319, yy, 3, 1)
         }
 
-        gfx2.monochrome_stipple(false)
+        monogfx.stipple(false)
         float y_f
         for ww in -600 to 600 {
             y_f = floats.sin(ww as float / 60.0)*150
-            gfx2.plot(ww/2 + 320 as uword, (y_f + 240) as uword, 1)
+            monogfx.plot(ww/2 + 320 as uword, (y_f + 240) as uword, 1)
         }
-        gfx2.text(480, 100, 1, sc:"sin(x)")
+        monogfx.text(480, 100, 1, sc:"sin(x)")
 
         for ww in -300 to 300 {
             y_f = floats.cos(ww as float/30.0)*60 - (ww as float)/1.7
-            gfx2.plot(ww + 320 as uword, (y_f + 240) as uword, 1)
+            monogfx.plot(ww + 320 as uword, (y_f + 240) as uword, 1)
         }
-        gfx2.text(80, 420, 1, sc:"cos(x)+x")
+        monogfx.text(80, 420, 1, sc:"cos(x)+x")
 
         sys.wait(3*60)
 
-        gfx2.circle(320, 240, 220, 1)
-        gfx2.circle(320, 240, 210, 1)
-        gfx2.circle(320, 240, 200, 1)
-        gfx2.circle(320, 240, 190, 1)
-        gfx2.monochrome_stipple(true)
-        gfx2.disc(320, 240, 140, 1)
-        gfx2.monochrome_stipple(false)
-        gfx2.disc(320, 240, 90, 1)
-        gfx2.disc(320, 240, 40, 0)
+        monogfx.circle(320, 240, 220, 1)
+        monogfx.circle(320, 240, 210, 1)
+        monogfx.circle(320, 240, 200, 1)
+        monogfx.circle(320, 240, 190, 1)
+        monogfx.stipple(true)
+        monogfx.disc(320, 240, 140, 1)
+        monogfx.stipple(false)
+        monogfx.disc(320, 240, 90, 1)
+        monogfx.disc(320, 240, 40, 0)
 
         sys.wait(2*60)
 
         repeat 255
-            gfx2.line(math.rndw() % 640, math.rndw() % 480, math.rndw() % 640, math.rndw() % 480, 1)
+            monogfx.line(math.rndw() % 640, math.rndw() % 480, math.rndw() % 640, math.rndw() % 480, 1)
 
         sys.wait(1*60)
     }