MacPlus_MiSTer/sys/sys_top.sdc

74 lines
3.3 KiB
Plaintext
Raw Normal View History

2018-03-05 17:40:43 +00:00
# Specify root clocks
2021-03-03 09:35:46 +00:00
create_clock -period "50.0 MHz" [get_ports FPGA_CLK1_50]
create_clock -period "50.0 MHz" [get_ports FPGA_CLK2_50]
create_clock -period "50.0 MHz" [get_ports FPGA_CLK3_50]
2017-10-22 01:22:56 +00:00
create_clock -period "100.0 MHz" [get_pins -compatibility_mode *|h2f_user0_clk]
2019-09-27 17:11:21 +00:00
create_clock -period "100.0 MHz" [get_pins -compatibility_mode spi|sclk_out] -name spi_sck
2021-03-03 09:35:46 +00:00
create_clock -period "10.0 MHz" [get_pins -compatibility_mode hdmi_i2c|out_clk] -name hdmi_sck
2017-10-22 01:22:56 +00:00
derive_pll_clocks
derive_clock_uncertainty
2018-03-05 17:40:43 +00:00
# Decouple different clock groups (to simplify routing)
2019-09-27 17:11:21 +00:00
set_clock_groups -exclusive \
2019-07-11 22:22:16 +00:00
-group [get_clocks { *|pll|pll_inst|altera_pll_i|*[*].*|divclk}] \
-group [get_clocks { pll_hdmi|pll_hdmi_inst|altera_pll_i|*[0].*|divclk}] \
2021-01-23 12:09:42 +00:00
-group [get_clocks { pll_audio|pll_audio_inst|altera_pll_i|*[0].*|divclk}] \
-group [get_clocks { spi_sck}] \
2021-03-03 09:35:46 +00:00
-group [get_clocks { hdmi_sck}] \
2018-03-05 17:40:43 +00:00
-group [get_clocks { *|h2f_user0_clk}] \
2019-09-27 17:11:21 +00:00
-group [get_clocks { FPGA_CLK1_50 }] \
-group [get_clocks { FPGA_CLK2_50 }] \
-group [get_clocks { FPGA_CLK3_50 }]
set_false_path -from [get_ports {KEY*}]
set_false_path -from [get_ports {BTN_*}]
2021-01-23 12:09:42 +00:00
set_false_path -to [get_ports {LED_*}]
set_false_path -to [get_ports {VGA_*}]
set_false_path -to [get_ports {AUDIO_SPDIF}]
set_false_path -to [get_ports {AUDIO_L}]
set_false_path -to [get_ports {AUDIO_R}]
2023-03-01 17:08:42 +00:00
set_false_path -from {get_ports {SW[*]}}
2021-01-23 12:09:42 +00:00
set_false_path -to {cfg[*]}
2019-09-27 17:11:21 +00:00
set_false_path -from {cfg[*]}
2020-01-21 16:55:46 +00:00
set_false_path -from {VSET[*]}
2021-01-23 12:09:42 +00:00
set_false_path -to {wcalc[*] hcalc[*]}
2023-03-01 17:08:42 +00:00
set_false_path -to {hdmi_width[*] hdmi_height[*]}
2020-01-21 16:55:46 +00:00
set_multicycle_path -to {*_osd|osd_vcnt*} -setup 2
2020-05-10 18:35:08 +00:00
set_multicycle_path -to {*_osd|osd_vcnt*} -hold 1
2021-01-23 12:09:42 +00:00
set_false_path -to {*_osd|v_cnt*}
set_false_path -to {*_osd|v_osd_start*}
set_false_path -to {*_osd|v_info_start*}
set_false_path -to {*_osd|h_osd_start*}
2020-01-21 16:55:46 +00:00
set_false_path -from {*_osd|v_osd_start*}
2020-05-10 18:35:08 +00:00
set_false_path -from {*_osd|v_info_start*}
2020-01-21 16:55:46 +00:00
set_false_path -from {*_osd|h_osd_start*}
set_false_path -from {*_osd|rot*}
set_false_path -from {*_osd|dsp_width*}
2021-01-23 12:09:42 +00:00
set_false_path -to {*_osd|half}
2020-01-21 16:55:46 +00:00
set_false_path -to {WIDTH[*] HFP[*] HS[*] HBP[*] HEIGHT[*] VFP[*] VS[*] VBP[*]}
set_false_path -from {WIDTH[*] HFP[*] HS[*] HBP[*] HEIGHT[*] VFP[*] VS[*] VBP[*]}
2021-01-23 12:09:42 +00:00
set_false_path -to {FB_BASE[*] FB_BASE[*] FB_WIDTH[*] FB_HEIGHT[*] LFB_HMIN[*] LFB_HMAX[*] LFB_VMIN[*] LFB_VMAX[*]}
set_false_path -from {FB_BASE[*] FB_BASE[*] FB_WIDTH[*] FB_HEIGHT[*] LFB_HMIN[*] LFB_HMAX[*] LFB_VMIN[*] LFB_VMAX[*]}
2020-01-21 16:55:46 +00:00
set_false_path -to {vol_att[*] scaler_flt[*] led_overtake[*] led_state[*]}
set_false_path -from {vol_att[*] scaler_flt[*] led_overtake[*] led_state[*]}
2021-01-23 12:09:42 +00:00
set_false_path -from {aflt_* acx* acy* areset* arc*}
2023-03-01 17:08:42 +00:00
set_false_path -from {arx* ary*}
2021-01-23 12:09:42 +00:00
set_false_path -from {vs_line*}
set_false_path -from {ascal|o_ihsize*}
set_false_path -from {ascal|o_ivsize*}
set_false_path -from {ascal|o_format*}
set_false_path -from {ascal|o_hdown}
set_false_path -from {ascal|o_vdown}
2023-03-01 17:08:42 +00:00
set_false_path -from {ascal|o_hmin* ascal|o_hmax* ascal|o_vmin* ascal|o_vmax* ascal|o_vrrmax* ascal|o_vrr}
2021-03-03 09:35:46 +00:00
set_false_path -from {ascal|o_hdisp* ascal|o_vdisp*}
set_false_path -from {ascal|o_htotal* ascal|o_vtotal*}
set_false_path -from {ascal|o_hsstart* ascal|o_vsstart* ascal|o_hsend* ascal|o_vsend*}
set_false_path -from {ascal|o_hsize* ascal|o_vsize*}
2022-03-07 09:07:01 +00:00
set_false_path -from {mcp23009|sd_cd}