Commit Graph

54 Commits

Author SHA1 Message Date
transistor
545f339fe2 Separated moa-core dependency into an optional feature flag 2024-03-13 21:49:04 -07:00
transistor
ec74b64984 Added stats 2024-03-08 23:38:51 -08:00
transistor
8b274f72cc Modified to use emulator-hal traits 2024-03-08 19:41:36 -08:00
transistor
a161dcda8a Renamed modules to use kebab case 2024-02-24 19:26:28 -08:00
transistor
671517aab7 Modified to use crates.io version of femtos 2024-02-24 19:16:46 -08:00
transistor
9ff431ebc6 Split clocks into femtos crate 2024-02-24 13:02:09 -08:00
transistor
f9d613b3b9 Fixed some Z80 instruction timings 2023-06-10 21:55:25 -07:00
transistor
83307d5b33 Changed Error type into an enum 2023-06-10 19:29:54 -07:00
transistor
e3861f33b5 Fixed tests and clippy warnings 2023-06-10 17:39:20 -07:00
transistor
4d6e3af567 Updated harte tests 2023-06-04 22:47:06 -07:00
transistor
708e7706f3 Fixed many of the undocumented tests
Now it's up to 99% tests passing, 15362 are still failing, but many
of those are the unimplemented IN/OUT instructions, which the Genesis
doesn't seem to use
2023-05-22 21:12:05 -07:00
transistor
8c1a89a1fe Refactored memory access a bit to try to isolate it 2023-05-21 23:14:26 -07:00
transistor
d87319b605 Refactored shift intsructions to not use direction 2023-05-20 15:01:10 -07:00
transistor
64b18662d5 Added Z80 timings, and enabled check in rad tests 2023-05-15 21:13:52 -07:00
transistor
f205e231b6 Fixed tests failing due to wrapping into past the end of memory 2023-05-14 21:12:38 -07:00
transistor
aaa7952dd0 Split the Z80 instructions into individual functions like the m68k 2023-05-14 15:49:38 -07:00
transistor
6390a207a6 Attempted to implement DAA but still have a lot of failures 2023-05-13 21:35:50 -07:00
transistor
5ec2fe4157 Implemented RLD and RRD instructions for Z80 2023-05-13 21:06:00 -07:00
transistor
f3d1fd0ae2 Added IM, IFF1, and IFF2 checking to Z80 tests, and fixed issues with Z80 impl 2023-05-13 19:41:20 -07:00
transistor
e61e0cfe8f Fixed flags for BIT instruction in Z80 2023-05-13 17:36:32 -07:00
transistor
f0cbf5f2ca Fixed some IY instructions, and a few minor fixes 2023-05-13 16:17:14 -07:00
transistor
57f9f93cc9 Fixed the basic IN/OUT instructions on Z80, and basic RETI/RETN 2023-05-13 14:47:27 -07:00
transistor
c97b3b8aca Fixed half carry in Z80 2023-05-13 11:55:13 -07:00
transistor
cf4e31454b Fixed some Z80 tests related to the overflow flag 2023-05-13 10:36:50 -07:00
transistor
d8638c6f82 Added a way to only run documented Z80 instruction tests 2023-05-13 10:14:47 -07:00
transistor
b2b9d73375 Added mode to ignore undocument flags in Z80 tests 2023-05-12 19:05:43 -07:00
transistor
9694036e33 Fixed Z80 to pass the rad tests 2023-05-09 22:58:56 -07:00
transistor
f8083db181 Added raddad772/jsmoo's Z80 test runner
Special thanks to raddad772 https://github.com/raddad772

Also added some fixes to the Z80 for panicking math operations, but
it still won't complete due to an unimplemented instruction
2023-05-09 21:50:42 -07:00
transistor
5e228c377e Fixed tests after ClockTime and Frequency changes
And also removed HostData
2023-05-07 20:42:55 -07:00
transistor
099d557a3f Reorganized m68k tests 2023-03-25 21:27:02 -07:00
transistor
083f3607ba Major reorganization into crates
I wanted to make this a bit more modular, so it's easier in theory to
write external crates that can reuse bits, and selectively compile in
bits, such as adding new systems or new cpu implementations
2022-09-24 23:14:03 -07:00
transistor
ce682565a9 Removed ProcessorTests as submodule because it's rather large 2022-09-24 19:24:52 -07:00
transistor
48bf76f430 Fixed some ASR cases, and updated test results 2022-09-18 22:09:56 -07:00
transistor
eea8840483 Fixed the ABCD/SBCD/NBCD instructions (almost)
There are still some failures on the SBCD, but the logic is identical
to other emulator's calculations, but the test case doesn't seem to be
the way it should behave, so I'll leave it for now
2022-09-18 20:34:04 -07:00
transistor
f5a548ac90 Added test results 2022-09-18 17:10:23 -07:00
transistor
c55e3db87a Added test results with excluded address errors 2022-09-18 17:09:55 -07:00
transistor
481dd0d7f7 Fixed part of the problem in RTE test failures with Address Error
The I/N bit in the special status word on the stack should be set
when returning from RTE results in a PC that isn't word aligned.
Every other case pretty much, it should be clear
2022-09-17 21:29:04 -07:00
transistor
71c10ff0f0 Slightly improved the handling of the I/N bit in Address Error 2022-09-16 20:49:44 -07:00
transistor
ef6fde2a4f Minor fix to RTE 2022-09-15 20:56:52 -07:00
transistor
84d2b5e15b Added test results 2022-09-14 22:51:48 -07:00
transistor
d074b7fc5e Test after fixing MULS 2022-09-13 22:18:22 -07:00
transistor
099b2fcb55 Copied over test results 2022-09-13 22:01:54 -07:00
transistor
96e79329e7 Added ability to exclude only extended exceptions 2022-09-13 18:42:49 -07:00
transistor
873741846c Implemented the CHK and NEGX instructions 2022-09-12 22:19:01 -07:00
transistor
9ff528c463 Fixed some AddressError tests
Adjusted the PC value stored when an Address Error fault occurs to
use the size of the access operation.

I also flipped the IN bit in the word that's written to the top of
the stack on an AddressError, even though that's opposite of what
the docs say.  It seems to pass the tests.  I probably have something
else going wrong, but it shouldn't be an important bit either way.
2022-09-12 21:47:36 -07:00
transistor
42bfabb743 Added test results 2022-09-11 21:52:29 -07:00
transistor
c4a99245e3 Added option to exclude or only run tests that involve an exception 2022-09-11 18:52:19 -07:00
transistor
03f4e11e3b Added proper AddressError handling to m68k
Also a few fixes, such as correcting a decode error in ADDX
2022-09-11 17:42:54 -07:00
transistor
34bdd86772 Added address mask to memory accesses from the tests 2022-09-11 14:51:58 -07:00
transistor
0582625b5e Fixed some issue with m68k
Some debug code was enabled that prevented illegal instructions
from being handled normally with a processor exception

The brief instruction word decoding could cause an illegal instruction
if it didn't match the docs, but the actual implementation would not
complain in those cases, so I modified it to not perform validation
for <=MC68010

Increment and Decrement addressing modes, when using the stack pointer,
will always inc/dec by at least 2 bytes, even if it's a byte operation,
to keep the stack aligned to the nearest word boundary
2022-09-10 21:09:35 -07:00