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11,812 Commits 8 Branches 121 Tags 496 MiB
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3475 Commits

Author SHA1 Message Date
Thomas Harte
5280f5aba2 Attempt to spot screen takeovers. 2024-05-23 22:03:40 -04:00
Thomas Harte
3be5d60b1e Eliminate comparison costs. 2024-05-18 22:16:58 -04:00
Thomas Harte
26375dc023 Introduce named constants. 2024-05-16 22:19:26 -04:00
Thomas Harte
8d0d7abd5a Keep track of state separately from scanning. 2024-05-16 22:18:51 -04:00
Thomas Harte
ef03ddf2ae Extend to launching the target program. 2024-05-14 22:23:35 -04:00
Thomas Harte
1d8b33d7ae Attempt to improve trajectory. 2024-05-13 22:26:36 -04:00
Thomas Harte
ca67afea4c Correct some unique-ptr oddities. 2024-05-13 21:46:03 -04:00
Thomas Harte
0b11fc259b Add Archimedes-specific target class. 2024-05-13 21:42:38 -04:00
Thomas Harte
18ffb9294f Add full cursor automation. 2024-05-12 22:16:29 -04:00
Thomas Harte
c82517c9fd Add mouse position getter. 2024-05-11 13:07:12 -04:00
Thomas Harte
6d42c9aaf9 Start making leeway on interesting SWIs. 2024-05-06 22:40:00 -04:00
Thomas Harte
02ee3a7804 Turf out old debugging cruft. 2024-05-06 20:36:00 -04:00
Thomas Harte
d90eedfc8c Adjust bit polarity, meaning. 2024-04-30 22:49:26 -04:00
Thomas Harte
6a2261d217 Merge branch 'master' into DiskReady 2024-04-30 22:38:07 -04:00
Thomas Harte
3d61861737 Ensure switch is complete. 2024-04-30 22:26:19 -04:00
Thomas Harte
7545786436 Ensure extra line types are used. 2024-04-30 22:22:18 -04:00
Thomas Harte
a997b6c677 Wire drives for IBM-style RDY. 2024-04-30 22:18:17 -04:00
Thomas Harte
72d4f638aa Merge branch 'master' into Interlacing 2024-04-30 22:08:57 -04:00
Thomas Harte
b15ff6d442 Support interlaced video timing. 2024-04-30 22:06:08 -04:00
Thomas Harte
42aea2663c Add automatic runtime frame-rate limiter. 2024-04-30 21:38:37 -04:00
Thomas Harte
71c5a1d419 Avoid repeated trans comparison. 2024-04-29 22:35:01 -04:00
Thomas Harte
03c3da7338 Bifurcate Zone enum, possibly to help compiler. 2024-04-29 22:34:46 -04:00
Thomas Harte
c7747ec5a0 Remove a conditional from the hot path. 2024-04-29 22:16:06 -04:00
Thomas Harte
5a84e98256 Fix trans for instruction fetches. 2024-04-29 21:54:59 -04:00
Thomas Harte
dfaea5a922 Reduce floppy access cost. 2024-04-28 22:40:54 -04:00
Thomas Harte
f4da417c3a
Merge pull request #1366 from TomHarte/VIDCDelays 
Add various VIDC output latencies.
 2024-04-28 22:39:29 -04:00
Thomas Harte
fa7fff86eb Eject invalid specialisation. 2024-04-28 22:20:26 -04:00
Thomas Harte
d480f9eae2 Reinstate all missing video modes. 2024-04-28 21:49:04 -04:00
Thomas Harte
4f1aef90b8 Relocate pixel collection and cursor shifting. 2024-04-26 21:29:30 -04:00
Thomas Harte
24f4538eb7 Do faulty restoration of 4bpp mode. 2024-04-25 22:50:24 -04:00
Thomas Harte
38d096cad6 Begin new state machine, losing all non-cursor pixels. 2024-04-25 22:01:38 -04:00
Thomas Harte
b82af9c471 Fix vertical timing; don't miss border colour changes. 2024-04-24 20:47:11 -04:00
Thomas Harte
becb6ce2e0 Fix two more not-really-an-issue warnings. 2024-04-23 22:20:13 -04:00
Thomas Harte
265d151879 Fix data aborts. 2024-04-22 22:08:09 -04:00
Thomas Harte
c485097eed Fix bool combination. 2024-04-22 22:06:09 -04:00
Thomas Harte
f86e9fe086 Eliminate impossible conditional. 2024-04-22 21:58:49 -04:00
Thomas Harte
0775e3ad58 This is an 8-bit value. 2024-04-19 22:35:43 -04:00
Thomas Harte
ea3eef3817 Put interrupts into pipeline, without delay. 2024-04-19 22:21:23 -04:00
Thomas Harte
83eac172c9 Revoke in-pipeline interrupts. 
I'm unclear on what timing should apply here really.
 2024-04-19 21:46:09 -04:00
Thomas Harte
5b13d3e893 Attempt the prefetch portion of a pipeline. 2024-04-19 21:30:15 -04:00
Thomas Harte
e6c4454059 Provide a means for SWI interception. 2024-04-18 22:13:58 -04:00
Thomas Harte
d464ce831a Add did_set_pc. 2024-04-18 19:30:07 -04:00
Thomas Harte
07984a2f8b Resolve various warnings. 2024-04-17 22:15:05 -04:00
Thomas Harte
30c2c65b77 Eliminate hot-path switch. 2024-04-17 21:36:39 -04:00
Thomas Harte
b63178132d Move trans tests inside switch. 2024-04-17 21:29:42 -04:00
Thomas Harte
fac94a5d36 Reduce MIPS. Until other performance issues can be resolved. 2024-04-16 22:32:00 -04:00
Thomas Harte
06fd91f002 Fix period, table lookup. 2024-04-16 22:12:10 -04:00
Thomas Harte
c3d4d0ee38 Introduce panning, threading. 2024-04-16 21:56:34 -04:00
Thomas Harte
30cca54e6c Diagnostically try for a square wave. 2024-04-13 22:10:34 -04:00
Thomas Harte
6ac6e48b95 Attempt audio output. 2024-04-13 21:54:50 -04:00
Thomas Harte
779794632e Generate volume ramp. 2024-04-13 20:23:47 -04:00
Thomas Harte
88bb16f261 Install proper filter frequency. 2024-04-13 15:34:39 -04:00
Thomas Harte
c134c7bdc2 Fix: signal is 'flyback', not sync. 2024-04-10 21:53:38 -04:00
Thomas Harte
6c6cda3db5 Use clocking hints. 2024-04-09 22:22:03 -04:00
Thomas Harte
a29f246536 Move to more natural position of ownership. 2024-04-09 22:10:07 -04:00
Thomas Harte
d9d675a74f Fix scan status scale. 2024-04-09 21:56:42 -04:00
Thomas Harte
d62ea95889 Make some intimation towards audio. 2024-04-09 21:53:40 -04:00
Thomas Harte
e2e951ad0b Fix layout. 2024-04-09 21:49:35 -04:00
Thomas Harte
a5a653d684 Factor vsync state into IO reads. 2024-04-09 21:49:00 -04:00
Thomas Harte
6123350895 Improve state guesswork. 2024-04-09 21:24:08 -04:00
Thomas Harte
ec73c00c3b Silence the routine stuff of interrupt masks. 2024-04-09 20:57:57 -04:00
Thomas Harte
dd24f5f4f3 Don't latch video addresses until almost the last minute. 2024-04-09 20:56:10 -04:00
Thomas Harte
169298af42 Plumb through disk insertion. 
Surprisingly: some things now load.
 2024-04-08 21:15:40 -04:00
Thomas Harte
5e502df48b Forward motor and drive selection. 2024-04-07 22:29:00 -04:00
Thomas Harte
4f58664f97 Catch interrupt enables. 2024-04-07 22:08:12 -04:00
Thomas Harte
ffd298218c Tie off initial values; fix FIQ usage. 2024-04-07 21:58:16 -04:00
Thomas Harte
d2b077c573 Start wiring in a floppy controller. 2024-04-07 21:22:35 -04:00
Thomas Harte
547dc29a60 Remove done TODOs. 2024-04-07 15:53:42 -04:00
Thomas Harte
69aeca5c0e Aggregate mouse deltas where possible. 2024-04-06 21:24:21 -04:00
Thomas Harte
ed7cd4b277 Fix 8bpp output, all-modes cursor. 2024-04-06 20:58:44 -04:00
Thomas Harte
7bf831e1a6 Add missing 'override'. 2024-04-06 13:51:33 -04:00
Thomas Harte
0092cb8c36 Route enough to be able to mess around. 2024-04-06 13:44:05 -04:00
Thomas Harte
543b1c644a Wire mouse events to the relevant class. 2024-04-06 13:32:59 -04:00
Thomas Harte
cfaea7a90c Add cursor within 4bpp pixel area. 2024-04-05 22:43:10 -04:00
Thomas Harte
b821645644 Capture cursor palette, switch horizontal field. 2024-04-05 22:01:01 -04:00
Thomas Harte
2865190499 Resolve video addressing issues. 2024-04-05 21:56:31 -04:00
Thomas Harte
3f40e409c5 Reduce debugging heft. 2024-04-04 22:16:11 -04:00
Thomas Harte
002e235d90 Force RGB mode. 2024-04-04 22:02:47 -04:00
Thomas Harte
7d8a364658 Reimplement LDM and STM. 2024-04-04 21:59:18 -04:00
Thomas Harte
55369464ad Add a by-eye crop. A better answer will come. 2024-04-01 22:10:05 -04:00
Thomas Harte
609c117267 Switch to English RISC OS. 2024-04-01 21:44:42 -04:00
Thomas Harte
3b62a2fe7a Restrict video buffer to first 512kb. 2024-04-01 21:39:10 -04:00
Thomas Harte
0866caf934 Flaws remain, but acknowledge that pixel rate is double. 2024-04-01 10:48:20 -04:00
Thomas Harte
914b88d115 Fix non-debug build. 2024-03-31 19:17:55 -04:00
Thomas Harte
cc122a7a68 Add an SWI count, to aid in logging. 2024-03-31 18:18:26 -04:00
Thomas Harte
31979649c6 As it continues to swell, factor out the junk. 2024-03-31 18:15:48 -04:00
Thomas Harte
335d13d06d Mildly improve logging, define a few more ROMs. 2024-03-30 21:49:21 -04:00
Thomas Harte
ec785f3a8a Add URL as comment. 2024-03-30 20:54:17 -04:00
Thomas Harte
1f83a5425e Complete list of all currently-failing SWIs. 
... a lot of which are probably failing correctly, i.e. they're appropriately signalling.
 2024-03-30 20:48:47 -04:00
Thomas Harte
4882d6d0f2 Start adding SWI detail. 2024-03-30 15:16:48 -04:00
Thomas Harte
722743659b Add missing space. 2024-03-29 21:52:57 -04:00
Thomas Harte
6e64a79b52 Log failed SWIs. 2024-03-29 21:31:33 -04:00
Thomas Harte
8a6bf84cff Keyboard: log more, ignore unrecognised commands. 2024-03-29 20:54:07 -04:00
Thomas Harte
a0fdd8f4eb Resolve magic constant. 2024-03-28 22:15:27 -04:00
Thomas Harte
bda1783624 Make new guess at non-byte IOC reads. 2024-03-28 22:10:49 -04:00
Thomas Harte
2a14557478 Be more disciplined about errant accesses. 2024-03-28 21:31:07 -04:00
Thomas Harte
0ddbc67b1f Switch to default CMOS RAM obtained from RISC OS itself. 2024-03-28 21:23:49 -04:00
Thomas Harte
ffb5149890 Reinstate real CMOS RAM results. 2024-03-28 14:27:07 -04:00
Thomas Harte
4fcb85d132 Cleave off most remaining reasons for failure. 2024-03-28 10:32:27 -04:00
Thomas Harte
f175dcea58 Hack in some more potential debugging help. 2024-03-27 22:37:37 -04:00