Thomas Harte
|
d80f03e369
|
Corrects longstanding deviation from naming convention.
|
2021-04-25 14:11:36 -04:00 |
|
Thomas Harte
|
e7a9ae18a1
|
Introduce further default state.
|
2021-04-24 23:18:00 -04:00 |
|
Thomas Harte
|
77fcf52d27
|
Purely style: remove some redundant nullptrs.
|
2021-04-19 18:53:00 -04:00 |
|
Thomas Harte
|
79c2bc1fd7
|
Put the program counter on the bus during interrupt acknowledge.
|
2021-04-19 18:43:50 -04:00 |
|
Thomas Harte
|
7017324d60
|
r_step is obsolete now that I know that [DD/FD]CB don't have a refresh cycle.
|
2021-04-13 22:17:30 -04:00 |
|
Thomas Harte
|
deb5d69ac7
|
Consolidates macros.
|
2021-04-13 22:11:28 -04:00 |
|
Thomas Harte
|
5998f3b35b
|
Corrects LD[I/D/IR/DR] timing.
Macro cleanup to come.
|
2021-04-13 20:00:18 -04:00 |
|
Thomas Harte
|
869567fdd9
|
Corrects EX (SP), HL breakdown.
|
2021-04-13 19:45:48 -04:00 |
|
Thomas Harte
|
b42780173a
|
Establishes that there really is no Read4 and Read4Pre distinction.
Will finish these unit tests, then clean up.
|
2021-04-12 20:54:10 -04:00 |
|
Thomas Harte
|
947de2d54a
|
Switches five-cycle read to a post hoc pause.
|
2021-04-12 17:17:08 -04:00 |
|
Thomas Harte
|
e82367def3
|
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
|
2021-04-11 23:01:00 -04:00 |
|
Thomas Harte
|
9cde7c12ba
|
Shifts responsibility for refresh into the fetch-decode-execute sequence.
|
2021-04-11 22:50:24 -04:00 |
|
Thomas Harte
|
015556cc91
|
Switch (ii+n) to Read4Pre.
|
2021-04-11 10:26:14 -04:00 |
|
Thomas Harte
|
b397059d5e
|
Moves read time in Read4Pre.
|
2021-04-10 17:54:20 -04:00 |
|
Thomas Harte
|
e0736435f8
|
Makes assumption that the address bus just holds its value during an internal operation.
|
2021-04-10 12:00:53 -04:00 |
|
Thomas Harte
|
eacffa49f5
|
Exposes IR during 'internal' operations.
|
2021-04-08 22:22:26 -04:00 |
|
Thomas Harte
|
29cf80339a
|
Corrects too-short buffer.
|
2021-04-08 22:15:03 -04:00 |
|
Thomas Harte
|
57a7e0834f
|
Corrects sampling of MREQ.
|
2021-04-08 19:21:35 -04:00 |
|
Thomas Harte
|
25b8c4c062
|
Provide clearer failure case.
|
2021-04-03 21:04:44 -04:00 |
|
Thomas Harte
|
1be88a5308
|
Remove first draft.
|
2021-04-02 07:39:22 -04:00 |
|
Thomas Harte
|
294280a94e
|
Spells out everything except interrupt acknowledge.
|
2021-04-02 07:38:06 -04:00 |
|
Thomas Harte
|
32aebfebe0
|
Starts spelling out meaning of the Z80's partial machine cycles.
|
2021-04-02 07:37:56 -04:00 |
|
Thomas Harte
|
76299a2add
|
Include AF' in Z80 state.
|
2021-03-29 22:58:52 -04:00 |
|
Thomas Harte
|
c8471eb993
|
Adds various asserts, some comments.
|
2021-03-03 20:47:45 -05:00 |
|
Thomas Harte
|
83d0cfc24e
|
Improves commentary.
|
2021-03-03 20:33:28 -05:00 |
|
Thomas Harte
|
f6466fd657
|
Remove temporary hackery.
|
2021-02-19 22:47:50 -05:00 |
|
Thomas Harte
|
72d7901c88
|
Takes a shot at the keyboard data full flag.
Just a guess. But likely?
|
2021-02-19 20:06:12 -05:00 |
|
Thomas Harte
|
992ee6d631
|
Don't zero out the program bank until after it has headed stackward.
|
2021-02-17 22:08:08 -05:00 |
|
Thomas Harte
|
3c887aff95
|
Improves consistency.
|
2021-01-21 18:58:22 -05:00 |
|
Thomas Harte
|
e0b36c9c3d
|
Corrects PBR/DBR resetting upon an exception.
|
2020-12-29 15:27:49 -05:00 |
|
Thomas Harte
|
574a37814c
|
Attempts to fix exception selection and timing.
|
2020-12-08 18:46:30 -05:00 |
|
Thomas Harte
|
c72bdd776e
|
Adds a new assert: I think this is the issue getting into GS/OS.
|
2020-12-07 22:43:24 -05:00 |
|
Thomas Harte
|
9e0e063f8a
|
Resolves one further GCC warning.
Technically this leaves one further, on a temporary printf I have in my IIgs. I'll fix that when I strip all this caveman stufff.
|
2020-11-22 21:57:48 -05:00 |
|
Thomas Harte
|
8ace258fbc
|
Tackles outstanding GCC warnings.
|
2020-11-22 21:43:56 -05:00 |
|
Thomas Harte
|
cdacf280e1
|
After much extra logging, corrects destination bank for MVN and MVP.
|
2020-11-15 16:08:29 -05:00 |
|
Thomas Harte
|
d3c7253981
|
Shifts size-limiting of X and Y to transitions and mutations, away from reads.
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
|
2020-11-04 20:35:41 -05:00 |
|
Thomas Harte
|
d50b059a17
|
Imports 6502-esque test for decimal SBC overflow.
All applicable krom tests now pass.
|
2020-11-03 20:37:30 -05:00 |
|
Thomas Harte
|
cc5ec78156
|
Provides something on WAI/STP; sizes STY by the x flag; disables MSC test.
|
2020-11-03 20:17:44 -05:00 |
|
Thomas Harte
|
ddc44ce0d1
|
Reshuffles enum to make macro tests marginally easier.
|
2020-11-03 20:17:09 -05:00 |
|
Thomas Harte
|
5cbb91f352
|
Fixes COP vector, ensures WDM skips a byte.
|
2020-11-03 20:01:02 -05:00 |
|
Thomas Harte
|
91ea2eff4c
|
Corrects MVN/MVP off-by-one and failure to store what was read.
|
2020-11-03 18:29:35 -05:00 |
|
Thomas Harte
|
bf85d71674
|
Brings ADC into conformance. Fixes JML.
|
2020-11-03 18:12:10 -05:00 |
|
Thomas Harte
|
3889646d6b
|
Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
|
2020-11-02 21:09:32 -05:00 |
|
Thomas Harte
|
0178aaee2b
|
Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
(Rather than a preserved but ignored top byte)
|
2020-11-02 18:55:28 -05:00 |
|
Thomas Harte
|
e8943618dc
|
Adds some extra commentary and distinguishes X/Y sizing from M.
|
2020-10-31 10:21:13 -04:00 |
|
Thomas Harte
|
1ae2f6f449
|
PHD and PLD should always be 16-bit; PLP 8-bit.
|
2020-10-31 09:22:35 -04:00 |
|
Thomas Harte
|
88e26b42f5
|
Fixed: PHP pushes only 8 bits regardless of mode.
|
2020-10-30 22:36:00 -04:00 |
|
Thomas Harte
|
7f3f6c339f
|
Corrects stacked program bank during native-mode exceptions.
|
2020-10-30 20:11:39 -04:00 |
|
Thomas Harte
|
266022b193
|
Fixes PEA.
|
2020-10-28 22:00:28 -04:00 |
|
Thomas Harte
|
1df2ce513a
|
Ensures that reset doesn't push to the stack.
|
2020-10-28 21:23:35 -04:00 |
|