Thomas Harte
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adf7124e2c
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Eliminate 6502Base.cpp.
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2021-09-23 22:33:33 -04:00 |
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Thomas Harte
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863971f944
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68000: fix E alignment, expand Microcycle::apply.
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2021-09-08 21:03:37 -04:00 |
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Thomas Harte
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51d98ef9ab
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Add missing stddef header where size_t is used.
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2021-07-01 23:15:32 -04:00 |
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Thomas Harte
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bdcab447f9
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Add a further accessor.
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2021-06-27 16:27:26 -04:00 |
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Thomas Harte
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d80f03e369
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Corrects longstanding deviation from naming convention.
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2021-04-25 14:11:36 -04:00 |
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Thomas Harte
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e7a9ae18a1
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Introduce further default state.
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2021-04-24 23:18:00 -04:00 |
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Thomas Harte
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77fcf52d27
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Purely style: remove some redundant nullptrs.
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2021-04-19 18:53:00 -04:00 |
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Thomas Harte
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79c2bc1fd7
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Put the program counter on the bus during interrupt acknowledge.
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2021-04-19 18:43:50 -04:00 |
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Thomas Harte
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7017324d60
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r_step is obsolete now that I know that [DD/FD]CB don't have a refresh cycle.
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2021-04-13 22:17:30 -04:00 |
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Thomas Harte
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deb5d69ac7
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Consolidates macros.
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2021-04-13 22:11:28 -04:00 |
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Thomas Harte
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5998f3b35b
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Corrects LD[I/D/IR/DR] timing.
Macro cleanup to come.
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2021-04-13 20:00:18 -04:00 |
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Thomas Harte
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869567fdd9
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Corrects EX (SP), HL breakdown.
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2021-04-13 19:45:48 -04:00 |
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Thomas Harte
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b42780173a
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Establishes that there really is no Read4 and Read4Pre distinction.
Will finish these unit tests, then clean up.
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2021-04-12 20:54:10 -04:00 |
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Thomas Harte
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947de2d54a
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Switches five-cycle read to a post hoc pause.
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2021-04-12 17:17:08 -04:00 |
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Thomas Harte
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e82367def3
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Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
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2021-04-11 23:01:00 -04:00 |
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Thomas Harte
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9cde7c12ba
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Shifts responsibility for refresh into the fetch-decode-execute sequence.
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2021-04-11 22:50:24 -04:00 |
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Thomas Harte
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015556cc91
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Switch (ii+n) to Read4Pre.
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2021-04-11 10:26:14 -04:00 |
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Thomas Harte
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b397059d5e
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Moves read time in Read4Pre.
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2021-04-10 17:54:20 -04:00 |
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Thomas Harte
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e0736435f8
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Makes assumption that the address bus just holds its value during an internal operation.
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2021-04-10 12:00:53 -04:00 |
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Thomas Harte
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eacffa49f5
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Exposes IR during 'internal' operations.
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2021-04-08 22:22:26 -04:00 |
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Thomas Harte
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29cf80339a
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Corrects too-short buffer.
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2021-04-08 22:15:03 -04:00 |
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Thomas Harte
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57a7e0834f
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Corrects sampling of MREQ.
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2021-04-08 19:21:35 -04:00 |
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Thomas Harte
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25b8c4c062
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Provide clearer failure case.
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2021-04-03 21:04:44 -04:00 |
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Thomas Harte
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1be88a5308
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Remove first draft.
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2021-04-02 07:39:22 -04:00 |
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Thomas Harte
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294280a94e
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Spells out everything except interrupt acknowledge.
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2021-04-02 07:38:06 -04:00 |
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Thomas Harte
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32aebfebe0
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Starts spelling out meaning of the Z80's partial machine cycles.
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2021-04-02 07:37:56 -04:00 |
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Thomas Harte
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76299a2add
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Include AF' in Z80 state.
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2021-03-29 22:58:52 -04:00 |
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Thomas Harte
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c8471eb993
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Adds various asserts, some comments.
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2021-03-03 20:47:45 -05:00 |
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Thomas Harte
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83d0cfc24e
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Improves commentary.
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2021-03-03 20:33:28 -05:00 |
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Thomas Harte
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f6466fd657
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Remove temporary hackery.
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2021-02-19 22:47:50 -05:00 |
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Thomas Harte
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72d7901c88
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Takes a shot at the keyboard data full flag.
Just a guess. But likely?
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2021-02-19 20:06:12 -05:00 |
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Thomas Harte
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992ee6d631
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Don't zero out the program bank until after it has headed stackward.
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2021-02-17 22:08:08 -05:00 |
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Thomas Harte
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3c887aff95
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Improves consistency.
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2021-01-21 18:58:22 -05:00 |
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Thomas Harte
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e0b36c9c3d
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Corrects PBR/DBR resetting upon an exception.
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2020-12-29 15:27:49 -05:00 |
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Thomas Harte
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574a37814c
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Attempts to fix exception selection and timing.
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2020-12-08 18:46:30 -05:00 |
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Thomas Harte
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c72bdd776e
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Adds a new assert: I think this is the issue getting into GS/OS.
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2020-12-07 22:43:24 -05:00 |
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Thomas Harte
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9e0e063f8a
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Resolves one further GCC warning.
Technically this leaves one further, on a temporary printf I have in my IIgs. I'll fix that when I strip all this caveman stufff.
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2020-11-22 21:57:48 -05:00 |
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Thomas Harte
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8ace258fbc
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Tackles outstanding GCC warnings.
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2020-11-22 21:43:56 -05:00 |
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Thomas Harte
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cdacf280e1
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After much extra logging, corrects destination bank for MVN and MVP.
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2020-11-15 16:08:29 -05:00 |
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Thomas Harte
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d3c7253981
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Shifts size-limiting of X and Y to transitions and mutations, away from reads.
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
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2020-11-04 20:35:41 -05:00 |
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Thomas Harte
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d50b059a17
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Imports 6502-esque test for decimal SBC overflow.
All applicable krom tests now pass.
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2020-11-03 20:37:30 -05:00 |
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Thomas Harte
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cc5ec78156
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Provides something on WAI/STP; sizes STY by the x flag; disables MSC test.
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2020-11-03 20:17:44 -05:00 |
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Thomas Harte
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ddc44ce0d1
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Reshuffles enum to make macro tests marginally easier.
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2020-11-03 20:17:09 -05:00 |
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Thomas Harte
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5cbb91f352
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Fixes COP vector, ensures WDM skips a byte.
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2020-11-03 20:01:02 -05:00 |
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Thomas Harte
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91ea2eff4c
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Corrects MVN/MVP off-by-one and failure to store what was read.
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2020-11-03 18:29:35 -05:00 |
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Thomas Harte
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bf85d71674
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Brings ADC into conformance. Fixes JML.
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2020-11-03 18:12:10 -05:00 |
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Thomas Harte
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3889646d6b
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Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
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2020-11-02 21:09:32 -05:00 |
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Thomas Harte
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0178aaee2b
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Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
(Rather than a preserved but ignored top byte)
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2020-11-02 18:55:28 -05:00 |
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Thomas Harte
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e8943618dc
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Adds some extra commentary and distinguishes X/Y sizing from M.
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2020-10-31 10:21:13 -04:00 |
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Thomas Harte
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1ae2f6f449
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PHD and PLD should always be 16-bit; PLP 8-bit.
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2020-10-31 09:22:35 -04:00 |
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