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1648 Commits

Author SHA1 Message Date
Thomas Harte
dc4a0e4e3b Video only ever reads from RAM, so it can be const *. 
(it can also be *const, since I set it only once)
 2019-10-27 14:09:38 -04:00
Thomas Harte
36a9a5288b Adds drives to the FDC. 2019-10-26 22:39:11 -04:00
Thomas Harte
ac39fd0235 Starts work on the DMA controller. 2019-10-26 21:33:57 -04:00
Thomas Harte
ecc0cea5a1 Added a potential branch for the newer TOS memory map. 2019-10-26 16:52:06 -04:00
Thomas Harte
eae11cbf17 Adds a dummy response for mouse interrogation. 2019-10-26 16:14:24 -04:00
Thomas Harte
2207638287 Adds hsync and vsync interrupts. 2019-10-25 22:42:13 -04:00
Thomas Harte
872897029e Attempts a complete wiring of 68901 interrupts. 2019-10-25 22:36:01 -04:00
Thomas Harte
51b4b5551d Actually, I think the 6850 is active low for interrupts. 2019-10-24 22:37:53 -04:00
Thomas Harte
092a61f93e Does a better job of having just 512kb. 2019-10-21 23:10:30 -04:00
Thomas Harte
e30ba58e0d Attempts to wire ACIA interrupt signals into the MFP. 2019-10-21 23:02:30 -04:00
Thomas Harte
83d73fb088 The keyboard now responds to a reset on its serial line. 2019-10-20 23:13:44 -04:00
Thomas Harte
75c3e2dacd Adds basic, incomplete dispatcher for the intelligent keyboard. 2019-10-20 23:07:19 -04:00
Thomas Harte
cf07982a9b Ensures good serial line and ACIA behaviour. 
Next stop: having the intelligent keyboard react.
 2019-10-20 22:10:05 -04:00
Thomas Harte
313aaa8f95 Silences temporarily. 2019-10-20 20:38:56 -04:00
Thomas Harte
696af5c3a6 Starts to transfer serial line decoding logic into the line itself. 2019-10-20 20:38:56 -04:00
Thomas Harte
9a8352282d Mostly but not quite fixes serial work. 2019-10-20 20:38:55 -04:00
Thomas Harte
34075a7674 Attempts to tie an intelligent keyboard to the other end of its serial line. 2019-10-20 20:38:55 -04:00
Thomas Harte
ff62eb6dce The ACIA actually has two clocks, though on an ST they're both 500,000 Hz. 2019-10-20 20:38:55 -04:00
Thomas Harte
374439693e Ensures serial lines know their writer's clock rate. 2019-10-20 20:38:55 -04:00
Thomas Harte
c4ef33b23f JustInTimeActors can now specify a clock divider. 2019-10-20 20:38:55 -04:00
Thomas Harte
4e5b440145 Attempts mostly to implement 6850 output. 2019-10-20 20:38:55 -04:00
Thomas Harte
97d44129cb Ensures all 16 data lines reach the video. 2019-10-20 20:38:55 -04:00
Thomas Harte
b0f5f7bd37 Attempts to start producing actual video. 2019-10-20 20:38:55 -04:00
Thomas Harte
a59ec9e818 Provides a token something where DMA should be. 2019-10-20 20:38:55 -04:00
Thomas Harte
4ead905c3c Adds an empty shell for the ACIA. 2019-10-20 20:38:55 -04:00
Thomas Harte
127bb043e7 Adds enough logic to advance to an ACIA access error. 2019-10-20 20:38:55 -04:00
Thomas Harte
42ebe06474 Makes an attempt at tracking video sequence points. 2019-10-20 20:38:55 -04:00
Thomas Harte
74fe32da23 Takes a shot at other display outputs. 2019-10-20 20:38:55 -04:00
Thomas Harte
780916551f Corrects sync generation. 2019-10-20 20:38:54 -04:00
Thomas Harte
305b1211ba Makes a first attempt to box out the ST display area. 2019-10-20 20:38:54 -04:00
Thomas Harte
2cf52fb89c Makes an unsuccessful first attempt at some timer functionality. 2019-10-20 20:38:54 -04:00
Thomas Harte
6e1b606adf Adds a target for MFP read/write operations. 
Completely without any implementation, so far.
 2019-10-20 20:38:54 -04:00
Thomas Harte
3bb0bf9e14 Adds some semblance of an AY. 2019-10-20 20:38:54 -04:00
Thomas Harte
87a6d22894 Starts to formalise the ST memory map a little. 2019-10-20 20:38:54 -04:00
Thomas Harte
484a0ceeb8 Starts forming an Atari ST memory map. 2019-10-20 20:38:54 -04:00
Thomas Harte
da1436abd2 Gifts the Atari ST a 68000 and non-functional video. 2019-10-20 20:38:54 -04:00
Thomas Harte
125f781ced Starts to create an actual shell of a machine. 2019-10-20 20:38:54 -04:00
Thomas Harte
8b397626bf Adds a route through the static analyser to the Atari ST. 2019-10-20 20:38:54 -04:00
Thomas Harte
0da1881a07 Adds an Atari ST enumeration and factory method. 2019-10-20 20:38:54 -04:00
Thomas Harte
95c45b5515 This can be const. 2019-10-20 17:22:56 -04:00
Thomas Harte
735586f5f8 Corrects tabs; adds potential output_border optimisation. 2019-10-19 21:20:34 -04:00
Thomas Harte
3c146a3fb2 Adds missing Master System enumerations. 2019-09-30 21:10:30 -04:00
Thomas Harte
4ac3839185 Seeks to ensure that card transitions between real-time and just-in-time don't break timing. 2019-09-28 18:34:04 -04:00
Thomas Harte
fbf95ec2b8 Removes the now empty local namespace. 2019-09-24 22:48:47 -04:00
Thomas Harte
077c7d767f Shifts essential modifiers up to the Keyboard class. 
I had forgotten that mappers are not exposed.
 2019-09-22 13:48:50 -04:00
Thomas Harte
a416bc0058 Adds an interface allowing keyboard mappers to declare modifiers that are 'essential'. 
i.e. ones that, if not delivered reliably, will cause the related machine to behave unexpectedly.
 2019-09-22 13:14:09 -04:00
Thomas Harte
5f16fa8c08 Removes dead reference to video from VIAPortHandler. 2019-09-21 17:39:45 -04:00
Thomas Harte
e7bf0799b6 Implements every-other-cycle-during-pixels RAM timing. 2019-09-21 17:25:20 -04:00
Thomas Harte
2e24da4614 Implements quick booting, and edges towards exposing it on the Mac. 
It should already work in kiosk mode.
 2019-09-19 22:32:12 -04:00
Thomas Harte
e46601872b Establishes that the Macintosh offers the quick-boot option. 2019-09-19 21:50:39 -04:00
Thomas Harte
776b819a5a Adds the SCSI bus as an Activity::Source. 2019-09-19 19:31:22 -04:00
Thomas Harte
962275c22a Removes clock for NCR 5380. 
It doesn't have one in real life, and now can live off the time counting that occurs on the SCSI bus.
 2019-09-18 20:17:47 -04:00
Thomas Harte
243e40cd79 Adds signalling of DACK. 2019-09-14 13:48:33 -04:00
Thomas Harte
1c7e0f3c9d Fixes control line modification by the 5380 and SCSI target command chaining. 
So now I'm back to trying to guess how a SCSI command terminates re: the relative meanings of a message phase and a status phase.
 2019-09-02 23:14:37 -04:00
Thomas Harte
318cdb41ea Adds SCSI bus clocking to the Macintosh, and fixes its internal counting. 2019-09-02 16:03:33 -04:00
Thomas Harte
2f8e31bc8b Takes a first bash at implementing the new SCSI::Bus timing infrastructure. 2019-09-02 13:00:01 -04:00
Thomas Harte
1a60ced61b Starts trying to deal with creating a whole volume from merely a partition. 2019-08-25 23:03:54 -04:00
Thomas Harte
ca08716c52 Introduces real hard disk images to the nascent world of SCSI. 2019-08-25 17:03:41 -04:00
Thomas Harte
90cf99b626 Takes a wild swings at speeding up startup. 
With no success.
 2019-08-18 22:40:16 -04:00
Thomas Harte
f668e4a54c Makes an attempt at getting the 5380 past arbitration. 
Not entirely successful. Also gets a bit smarter with `final` on ClockingHint::Sources.
 2019-08-15 23:14:40 -04:00
Thomas Harte
0f67e490e8 Adjusts NCR address decoding to produce a more plausible initial interaction. 2019-08-11 22:43:25 -04:00
Thomas Harte
895c315fa5 Increases the Mac Plus too 4mb. 2019-08-11 21:41:12 -04:00
Thomas Harte
a90a74a512 Stubs in just enough of the 5380 to get a Mac Plus too boot. 2019-08-11 20:55:20 -04:00
Thomas Harte
bbd4e4d3dc Enhances memory map fidelity to allow for ROM holes on the Mac Plus. 
This is how the ROM detects the difference between the Plus and the 512ke, it seems.
 2019-08-10 23:53:34 -04:00
Thomas Harte
bac0461f7f Switches the drive-speed accumulator to the delegate pattern. 
This allows the Macintosh to ensure that the IWM is kept up just-in-time with drive speed changes.
 2019-08-07 21:39:23 -04:00
Thomas Harte
f26a200d78 Switches to a JustInTimeActor to wrap the IWM. 
Also simplifies potential future usage of the IWM template.
 2019-08-07 21:28:02 -04:00
Thomas Harte
0e293e4983 Relocates RAM delay test in order to scrape out a minor performance win. 2019-08-03 21:46:45 -04:00
Thomas Harte
478f2533b5 Corrects 68000 address bus during interrupt acknowledge. 
All unused bits should be 1, not 0.
 2019-08-03 15:38:36 -04:00
Thomas Harte
a07488cf1b Introduces the Mac Plus memory map. 
Albeit with no SCSI support yet.
 2019-08-02 22:26:40 -04:00
Thomas Harte
d67c5145c0 Introduces RAM access delays. 2019-08-02 22:12:34 -04:00
Thomas Harte
5e76d593af Switches to table-based address decoding. 2019-08-02 21:30:04 -04:00
Thomas Harte
b93f9b3973 Distinguishes time advancement from bus response. 2019-08-02 19:48:41 -04:00
Thomas Harte
96005261c7 Adds activity lights for Macintosh disk activity. 
Prompting a quick fix to drives not spinning down.
 2019-08-02 16:26:23 -04:00
Thomas Harte
c8177af45a Introduces missing implementation file. 2019-08-02 16:26:08 -04:00
Thomas Harte
97eff5b16d Formally distinguishes Macintosh keys from virtual keys. 
Also: adds mappings for keypad keys, and corrects a couple of
long-standing capitalisation errors in my virtual key set.
 2019-08-02 16:15:34 -04:00
Thomas Harte
9bbccd89d3 Adds an extended rationale for current implementation. 
Also strips some cruft of prior guesses.
 2019-07-31 23:19:46 -04:00
Thomas Harte
260843e5b1 Starts poking at a pure total-based formula. 
On the assumption that any relevant DC offset will fall out in the wash. This causes one 400kb disk to boot in a Macintosh 128kb, another couple to do reasonably well. So it's better than what was here before.
 2019-07-31 12:42:23 -04:00
Thomas Harte
e3f22e5787 This should actually be PWM, I think. 
I'm just unsure of exactly the proper formula, owing to my ignorance on basic electrical engineering. Research ahoy!
 2019-07-30 22:02:41 -04:00
Thomas Harte
2aa308efdd Tweaks magic formulas. 
The computer now at least seeks outward, until this attempt at drive speed calculation fails.
 2019-07-30 16:18:36 -04:00
Thomas Harte
74c18d7861 Attempts a full wiring up of 400kb drive speed. 2019-07-30 15:08:55 -04:00
Thomas Harte
f3dd4b028d Rolls out JustInTime acting to the MSX and ColecoVision. 2019-07-29 21:22:31 -04:00
Thomas Harte
9859f99513 Adds a route to not bumping time. 2019-07-29 17:21:27 -04:00
Thomas Harte
a43ada82b2 Experiments with a JustInTimeActor in the Master System. 2019-07-29 15:38:41 -04:00
Thomas Harte
5149f290d0 Starts trying to formalise just-in-time execution. 
Which, at least, simplifies Cycle/HalfCycle to Cycle run_for usage via template.
 2019-07-28 21:49:54 -04:00
Thomas Harte
f894d43111 Removes the video and audio base address latches. 
It now seems to me that these take effect immediately.
 2019-07-27 22:23:40 -04:00
Thomas Harte
d8bc20b1ab Ensures quieter Release behaviour. 2019-07-25 22:55:27 -04:00
Thomas Harte
109d5d16bd Withdraws optimisation, for further testing in the future. 2019-07-25 10:33:38 -04:00
Thomas Harte
1672dc5946 Reduces frequency of update_video() calls. 2019-07-25 10:14:52 -04:00
Thomas Harte
0469f0240b Moves interrupt level selection outside the loop. 2019-07-23 23:13:03 -04:00
Thomas Harte
fcee7779b0 Inserts missing spaces. 2019-07-22 23:11:37 -04:00
Thomas Harte
b4191b6225 Corrects DiskII boot ROM CRCs and improves corresponding declarations. 2019-07-22 23:07:23 -04:00
Thomas Harte
dbee37ab34 Provides extended ROM details for the VIC-20 and Oric. 2019-07-22 22:15:44 -04:00
Thomas Harte
2432151bf8 Puts machine name into ROMMachine::ROM. 
Also switches to idiomatic exit codes.
 2019-07-22 21:14:21 -04:00
Thomas Harte
b2a6682798 Adds extended ROM information for the ZX80 and '81. 2019-07-20 22:46:49 -04:00
Thomas Harte
f3aac603f8 Adds extended Introduces extended ROM details for the C1540, Electron, Master System and MSX. 2019-07-20 21:30:37 -04:00
Thomas Harte
712cb473f7 Adds extended ROM information for the CPC and ColecoVision. 2019-07-20 17:07:59 -04:00
Thomas Harte
3c68a5ca65 Enhances the amount of ROM information posted by the Apple machines. 2019-07-20 16:08:40 -04:00
Thomas Harte
20670bab2f Expands information included in ROM load requests. 2019-07-19 22:35:22 -04:00
Thomas Harte
b9a34bee51 Substitutes a more efficient inner loop for audio generation. 2019-07-17 14:54:06 -04:00
Thomas Harte
22ee51c12c Corrects clocking issues around audio, and cuts down queue costs. 2019-07-17 14:41:36 -04:00