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Author	SHA1	Message	Date
Thomas Harte	ee7ae11e90	Implements EXG and SWAP.	2019-04-19 11:27:43 -04:00
Thomas Harte	f67d7f1db5	Adds the final (!) set of missing MOVEs.	2019-04-19 11:11:38 -04:00
Thomas Harte	99981751a2	Adds the official NOP. ... Which is a freebie.	2019-04-18 23:46:01 -04:00
Thomas Harte	ffdf02c5df	Adds MOVE XXX.lw, -(An)	2019-04-18 23:40:54 -04:00
Thomas Harte	27c7d00a05	Commutes final missing MOVEs to TODOs.	2019-04-18 23:35:32 -04:00
Thomas Harte	64c4137e5b	Begins a cleanup procedure on MOVE.	2019-04-18 23:25:19 -04:00
Thomas Harte	8c26d0c6e6	Makes an attempt at RTE and RTR.	2019-04-18 20:50:58 -04:00
Thomas Harte	81dcfd9f85	Implements AND, OR and EOR. ... As well as introducing a little more nuance to the double-decoding test.	2019-04-18 16:34:48 -04:00
Thomas Harte	9334557fbf	Added important TODO.	2019-04-17 23:12:32 -04:00
Thomas Harte	b09de8efce	Attempts to fill in the rest of MOVE x, -(An).	2019-04-17 23:05:16 -04:00
Thomas Harte	5a50eb56dd	Marginally increases coverage of MOVE x, -(An).	2019-04-17 22:30:07 -04:00
Thomas Harte	e49b257e94	Takes a run at TRAP.	2019-04-17 22:21:56 -04:00
Thomas Harte	b8a0f4e831	Implements MOVE to/from USP.	2019-04-17 16:58:59 -04:00
Thomas Harte	c265ea9847	Corrects byte writes in both test machines.	2019-04-17 16:39:10 -04:00
Thomas Harte	29f8dcfb40	Fixes a bunch of (d16, An)-type MOVEs and implements MOVE (XXX).wl, (d16,An)/etc.	2019-04-17 16:13:35 -04:00
Thomas Harte	0c05983617	Shortens impact of MULU on the instruction stream to correct parsing. ... I need to look into this.	2019-04-17 15:15:48 -04:00
Thomas Harte	0bd653708c	Corrects MOVE.bw Dn, (An)[+].	2019-04-17 14:31:20 -04:00
Thomas Harte	41d800cb63	Fixes ADD/SUB Dn,x to use the proper destination value.	2019-04-17 10:23:47 -04:00
Thomas Harte	cadc0bd509	Mental delusion lifted: JSR doesn't look enough like BSR.	2019-04-17 10:02:14 -04:00
Thomas Harte	b64da2710a	Corrects a few MOVE #s.	2019-04-17 10:00:14 -04:00
Thomas Harte	82b08d0e3a	Corrects addressing behaviour of nRd[+-].	2019-04-17 08:53:34 -04:00
Thomas Harte	8f77d1831b	Implements MULU and MULS.	2019-04-16 22:16:43 -04:00
Thomas Harte	be722143e1	Completes addressing modes for ADDI/etc/etc.	2019-04-16 21:34:16 -04:00
Thomas Harte	d8d974e2d7	Consolidates JSR and BSR preparation.	2019-04-16 21:29:37 -04:00
Thomas Harte	9b7ca6f271	Implements the basics of EORI, ORI, ANDI, SUBI and ADDI. ... Also corrects the BSR return address.	2019-04-16 19:50:10 -04:00
Thomas Harte	8ce018dbab	Adds the necessary runtime support for AND, EOR and OR.	2019-04-16 15:17:40 -04:00
Thomas Harte	180062c58c	Finishes fleshing out [ADD/SUB]Q.	2019-04-16 14:28:31 -04:00
Thomas Harte	6076b8df69	Merge branch 'master' into 68000	2019-04-16 14:07:23 -04:00
Thomas Harte	5e65ee79b1	Merge pull request #617 from TomHarte/MSXDisk ... Removes hard-coded assumption about disk ROM list placement.	2019-04-16 11:22:52 -04:00
Thomas Harte	c0861c7362	Removes hard-coded assumption about disk ROM list placement.	2019-04-16 11:22:03 -04:00
Thomas Harte	37656f14d8	Adds basic addressing modes for [ADD/SUB]Q.	2019-04-16 11:19:45 -04:00
Thomas Harte	dec5535e54	Implements (arguably: fixes) BSR.	2019-04-15 23:20:36 -04:00
Thomas Harte	1f0e3b157a	Corrects a couple of JSR and JMP addressing modes.	2019-04-15 22:37:11 -04:00
Thomas Harte	d802e83f49	Fills in further MOVEs.	2019-04-15 22:25:22 -04:00
Thomas Harte	ebcae25762	Adjusts JSR behaviour and further extends MOVE.	2019-04-15 22:02:52 -04:00
Thomas Harte	5330267d16	Implements BCLR.	2019-04-15 18:11:02 -04:00
Thomas Harte	892476973b	Attempts RO{X}[L/R].	2019-04-15 17:31:58 -04:00
Thomas Harte	84f4a25bc9	Completes TST.	2019-04-15 16:28:20 -04:00
Thomas Harte	1460a88bb3	Takes a run at JSR and RTS.	2019-04-15 15:14:38 -04:00
Thomas Harte	62e4c23961	Corrects memory map, causing the RAM test no longer to fail.	2019-04-15 13:03:32 -04:00
Thomas Harte	d25ab35d58	Finally gets setw usage correct.	2019-04-15 12:41:56 -04:00
Thomas Harte	a223cd90a1	Adds predecrement TSTs, increases QL running time, reduces logging.	2019-04-15 12:36:08 -04:00
Thomas Harte	aef92ba29c	Corrects immediate shift count.	2019-04-15 12:25:45 -04:00
Thomas Harte	328d297490	Implements the first few addressing modes for TST.	2019-04-15 10:03:52 -04:00
Thomas Harte	3d240f3f18	Corrects decoding of DBcc.	2019-04-15 09:49:23 -04:00
Thomas Harte	45f35236a7	Corrects decoding of ADDA and SUBA.	2019-04-15 09:44:06 -04:00
Thomas Harte	fba210f7ce	Corrects MOVE.l Dn, (An)[+].	2019-04-15 09:30:49 -04:00
Thomas Harte	8a09e5fc16	Implements Scc.	2019-04-14 22:39:13 -04:00
Thomas Harte	52e33e861c	Starts to introduce the QL as a second source for 68000 testing. ... It's advantageous over the ST in that a commented disassembly of the ROM is available.	2019-04-14 22:15:09 -04:00
Thomas Harte	75d8824e6b	Eliminates implicit type conversion.	2019-04-14 21:02:28 -04:00