 Adrian Conlon
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608fbb55fb
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Couple of small tidy ups
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2026-05-18 20:46:42 +01:00 |
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Adrian Conlon
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98169fd6b8
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Fix Z80 halt implementation
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2026-05-18 20:06:57 +01:00 |
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Adrian Conlon
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741feb4342
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Performance change: avoid dropping Bus.Data return values
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2026-05-18 17:28:41 +01:00 |
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Adrian Conlon
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bc39c230d1
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Add an extra Z80 interrupt test
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2026-05-17 21:31:01 +01:00 |
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Adrian Conlon
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e9603b0e08
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Add Z80 interrupt and pin tests
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2026-05-17 20:48:22 +01:00 |
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Adrian Conlon
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1876a0d1f0
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Fix IM2 again!
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2026-05-17 19:24:55 +01:00 |
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Adrian Conlon
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9a011b3c57
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Start implementing HD6309. Introduction of 32-bit operations has forced me to rename some of "Word" methods to better indicate size
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2026-05-16 21:10:23 +01:00 |
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Adrian Conlon
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e0fffdaa5e
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Some performance improvements. About 50Mhz for Z80 emulator. 275Mhz to 325Mhz. Interesting.
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2026-05-16 11:09:03 +01:00 |
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Adrian Conlon
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ac200d7f76
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Simplify ignored return value handling
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2026-05-12 22:21:13 +01:00 |
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Adrian Conlon
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2bb004598e
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Simplify parity adjustment in block IO repeat code.
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2026-05-03 11:37:02 +01:00 |
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Adrian Conlon
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88d4ab5126
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Fix final 4 opcodes for 100% harte singlestep test compatibility. hurrah!
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2026-05-03 11:27:14 +01:00 |
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Adrian Conlon
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69a0865ee9
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Start work towards WDC 65C02 implementation
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2026-05-02 17:02:36 +01:00 |
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Adrian Conlon
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de12029c13
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Speedup Z80 by encouraging runtime inlining of code
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2026-04-20 18:56:05 +01:00 |
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Adrian Conlon
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699791f7a4
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Simplify intermediate 16-bit register usage
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2026-04-16 13:47:24 +01:00 |
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Adrian Conlon
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53e33b9eef
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Some simplifications
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2026-04-07 12:02:31 +01:00 |
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Adrian Conlon
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bb626b9e9e
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Simplify some memory update calls
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2026-03-27 18:19:08 +00:00 |
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Adrian Conlon
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45a57eea86
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Coupld of small readability changes
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2026-03-21 09:49:09 +00:00 |
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Adrian Conlon
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dcd98e5eb7
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Simplify Z80 IM2 implementation
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2026-03-20 09:55:40 +00:00 |
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Adrian Conlon
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a8ef9aa7db
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simplification and unification of build stuff
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2026-02-16 11:15:58 +00:00 |
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Adrian Conlon
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e1bf58afbc
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More sharing of concepts between all Intel style processors
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2026-01-03 23:17:30 +00:00 |
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Adrian Conlon
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1dfd9621a1
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Share some more common code between Intel style procesors
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2025-10-15 19:46:10 +01:00 |
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Adrian Conlon
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ceacac4741
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Fix up some oddities in the EightBit library
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2025-10-06 13:44:31 +01:00 |
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Adrian Conlon
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3ca62c908c
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Simplify Z80 pn-handling a little
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2025-09-11 08:34:24 +01:00 |
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Adrian Conlon
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2bd50e5cd2
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Fix the single step checker a little
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2025-08-25 23:57:52 +01:00 |
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Adrian Conlon
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17a2b99d6c
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Remove all cycle accurate processing
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2025-08-25 23:56:27 +01:00 |
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Adrian Conlon
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eb23fbe44c
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Correction: the least significant bit is *not* zeroed by an IM 2 interrupt
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2025-08-12 17:19:55 +01:00 |
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Adrian Conlon
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e96a51342a
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Remove unneeded "using"
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2025-08-12 08:28:08 +01:00 |
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Adrian Conlon
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d4775cb266
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Correct assertion failure during refresh cycle
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2025-08-10 12:52:48 +01:00 |
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Adrian Conlon
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558da38f12
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Note commonality between Intel-style processors
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2025-08-10 12:43:34 +01:00 |
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Adrian Conlon
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2e1573b016
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Add support for sub-M-cycle accuracy. Not sure how useful this is!
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2025-08-10 11:32:53 +01:00 |
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Adrian Conlon
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072e38f6ee
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Add a couple of debug assertions
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2025-08-09 15:10:27 +01:00 |
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Adrian Conlon
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b40224b5af
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Correct IM 2 indirection
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2025-08-09 14:52:41 +01:00 |
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Adrian Conlon
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f1febd480e
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Sort out interrupt timing (I think)
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2025-08-09 13:29:57 +01:00 |
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Adrian Conlon
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e8a1e7dc6e
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Sort out Z80/Spectrum pin handling (again!)
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2025-08-08 21:47:48 +01:00 |
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Adrian Conlon
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199d0a77b1
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Disable interrups as the first act of INT handling
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2025-08-08 00:03:21 +01:00 |
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Adrian Conlon
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41be64ad99
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Simplfy interrupts on Z80
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2025-08-07 19:05:41 +01:00 |
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Adrian Conlon
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d332c57e47
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Simplify Z80 port handling
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2025-08-07 09:56:25 +01:00 |
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Adrian Conlon
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350483fcec
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Catch another couple of Z80 timing issues
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2025-08-05 00:14:05 +01:00 |
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Adrian Conlon
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52ea4b3acd
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Last trivial Z80 update
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2025-08-04 18:19:40 +01:00 |
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Adrian Conlon
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9d208de9bb
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Explicitly state order of operations in code, rather than relying upon RAII etc. (for speed. Much faster)
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2025-08-04 15:47:26 +01:00 |
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Adrian Conlon
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319190b7a5
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More Z80 cycle simplifications and fixes
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2025-08-03 21:55:24 +01:00 |
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Adrian Conlon
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6a32d0269d
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Fix the Z80 checker, so that all cycle actions are checked.
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2025-08-03 21:54:05 +01:00 |
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Adrian Conlon
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3ccd9c45ca
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Adjusted for the latest single-step Z80 tests. Simplify memory update access.
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2025-08-02 17:49:18 +01:00 |
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Adrian Conlon
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bfc2355337
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Correct RRD/RLD timing and XHTL ordering (according to latest Z80 single step tests)
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2025-08-02 12:26:53 +01:00 |
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Adrian Conlon
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bb63211f17
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Fix event names
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2025-08-01 22:57:38 +01:00 |
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Adrian Conlon
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a252a74d2d
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Tidy some inconsistencies in z80 emulation
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2025-08-01 14:59:40 +01:00 |
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Adrian Conlon
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2f338c6c46
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Tidy register increment/decrement a little.
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2025-07-25 16:32:30 +01:00 |
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Adrian Conlon
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3bbf300e05
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Simplify switching processor pin handling
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2025-06-22 21:07:02 +01:00 |
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 Adrian Conlon
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e7b025e66e
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Some speed-up refactoring of the Z80 core
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2025-05-12 10:17:39 +01:00 |
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Adrian Conlon
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36e983526e
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Add increment/decrement operations to the Register16 class
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2025-05-11 19:24:40 +01:00 |
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