Commit Graph

107006 Commits

Author SHA1 Message Date
Rafael Espindola
0282239051 These classes only need a StringRef, not a MemoryBuffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215945 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:28:28 +00:00
Rafael Espindola
285133714f Delete unused method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:20:18 +00:00
Robin Morisset
0acd42142a Answer to Philip Reames comments
- add check for volatile (probably unneeded, but I agree that we should be conservative about it).
- strengthen condition from isUnordered() to isSimple(), as I don't understand well enough Unordered semantics (and it also matches the comment better this way) to be confident in the previous behaviour (thanks for catching that one, I had missed the case Monotonic/Unordered).
- separate a condition in two.
- lengthen comment about aliasing and loads
- add tests in GVN/atomic.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215943 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:18:14 +00:00
Robin Morisset
6c0e1e0fa6 Weak relaxing of the constraints on atomics in MemoryDependencyAnalysis
Monotonic accesses do not have to kill the analysis, as long as the QueryInstr is not
itself atomic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215942 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:18:11 +00:00
Lang Hames
08f77a9f42 [MCJIT] Respect target endianness in RuntimeDyldMachO and RuntimeDyldChecker.
This patch may address some of the issues described in http://llvm.org/PR20640.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 21:43:16 +00:00
Kevin Enderby
f759032ccd Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O
file with -macho, the Mach-O specific object file parser option.

After some discussion I chose to do this implementation contained in the logic
of llvm-objdump’s MachODump.cpp using a second disassembler for thumb when
needed and with updates mostly contained in the MachOObjectFile class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215931 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 20:21:02 +00:00
Quentin Colombet
0526d167a9 [X86][Haswell][SchedModel] Tidy up.
<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:56:01 +00:00
Quentin Colombet
48e3a273de [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:59 +00:00
Quentin Colombet
7af88ec907 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:56 +00:00
Quentin Colombet
487ecab8d4 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215921 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:53 +00:00
Quentin Colombet
3d6a30ea3b [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:51 +00:00
Quentin Colombet
25529b337f [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Conversion instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215919 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:49 +00:00
Quentin Colombet
540b4f6c08 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:46 +00:00
Quentin Colombet
7bdfd1b443 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:43 +00:00
Quentin Colombet
0c5071f561 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:41 +00:00
Quentin Colombet
1cb132f921 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215915 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:39 +00:00
Quentin Colombet
84cab94cbb [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215914 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:36 +00:00
Quentin Colombet
f8da7e552c [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215913 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:32 +00:00
Quentin Colombet
435fa2bddf [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215912 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:29 +00:00
Quentin Colombet
a49b463a19 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:26 +00:00
Quentin Colombet
d2ea3168ae [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215910 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:23 +00:00
Quentin Colombet
184c0f8b2f [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Synchronization instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:21 +00:00
Quentin Colombet
2a2fcc1a0e [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: String instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215908 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:19 +00:00
Quentin Colombet
0cccab7515 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Control transfer instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215907 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:16 +00:00
Quentin Colombet
29b31c6eaf [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:13 +00:00
Quentin Colombet
3f17d37327 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:11 +00:00
Quentin Colombet
94ce368a5e [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215904 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:08 +00:00
Robin Morisset
af2fa71a64 Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
Summary:
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
These helper functions are introduced in D4844.
Depends D4844

Test Plan: make check-all passes

Reviewers: jfb

Subscribers: aemerson, llvm-commits, mcrosier, reames

Differential Revision: http://reviews.llvm.org/D4937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 16:48:58 +00:00
Aaron Ballman
71493b7d7c Disabling an MSVC warning ('var' : definition from the for loop is ignored; the definition from the enclosing scope is used) which will trigger false positives more than true positives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 14:54:22 +00:00
Oliver Stannard
eb922109f9 Teach the AArch64 backend to handle f16
This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv
operations on f16 (half-precision) types by promoting to f32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 14:22:39 +00:00
Oliver Stannard
802d420792 [ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage
Externally-defined functions with weak linkage should not be
tail-called on ARM or AArch64, as the AAELF spec requires normal calls
to undefined weak functions to be replaced with a NOP or jump to the
next instruction. The behaviour of branch instructions in this
situation (as used for tail calls) is implementation-defined, so we
cannot rely on the linker replacing the tail call with a return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 12:42:15 +00:00
Elena Demikhovsky
9735ccb7ea AVX-512: Fixed a bug in emitting compare for MVT:i1 type.
Added a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 11:59:06 +00:00
Aaron Ballman
9f92467a53 Silencing an MSVC warning about loop variable conflicting with a variable from an outer scope. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 11:51:41 +00:00
Tim Northover
049ffbbdf2 TableGen: allow use of uint64_t for available features mask.
ARM in particular is getting dangerously close to exceeding 32 bits worth of
possible subtarget features. When this happens, various parts of MC start to
fail inexplicably as masks get truncated to "unsigned".

Mostly just refactoring at present, and there's probably no way to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 11:49:42 +00:00
Abramo Bagnara
56c15de38a Added forgotten noexcept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215886 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 07:48:18 +00:00
Craig Topper
db77b82ed5 Revert "Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size."
Getting a weird buildbot failure that I need to investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215870 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 00:24:38 +00:00
Craig Topper
f06c7072c2 Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 23:47:00 +00:00
Rafael Espindola
6de46b5183 Use copy initialization to initialize std::unique_ptr.
Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 23:38:08 +00:00
Saleem Abdulrasool
4570cfa5e4 ARM: mark missing functions from RTABI
Simply indicate the functions that are part of the runtime library that we do
not setup libcalls for.  This is merely for ease of identification.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:51:04 +00:00
Saleem Abdulrasool
f15492fd72 ARM: improve RTABI 4.2 conformance on Linux
The set of functions defined in the RTABI was separated for no real reason.
This brings us closer to proper utilisation of the functions defined by the
RTABI.  It also sets the ground for correctly emitting function calls to AEABI
functions on all AEABI conforming platforms.

The previously existing lie on the behaviour of __ldivmod and __uldivmod is
propagated as it is beyond the scope of the change.

The changes to the test are due to the fact that we now use the divmod functions
which return both the quotient and remainder and thus we no longer need to
invoke two functions on Linux (making it closer to EABI's behaviour).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:51:02 +00:00
Saleem Abdulrasool
c5b413060c ARM: whitespace
Whitespace fix, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:50:59 +00:00
Rafael Espindola
9f52e1da3c Remove unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:48:55 +00:00
Rafael Espindola
2b861c3a24 Return a std::uinque_ptr. Every caller was already using one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215858 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:37:39 +00:00
Rafael Espindola
b5a6adc30a Convert an ownership comment with std::uinque_ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215855 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 22:20:33 +00:00
Rafael Espindola
822199b9e6 Pass a std::uinque_ptr to ParseAssembly to make the ownership explicit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215852 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 21:36:47 +00:00
Rafael Espindola
283c82abaa getLazyIRModule always takes ownership. Make that explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215851 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 21:22:19 +00:00
Rafael Espindola
40ef1799b8 Return a std::unique_ptr to make the ownership explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 21:11:31 +00:00
Rafael Espindola
9ea1ec3d14 Don't repeat the function name in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215849 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 21:05:08 +00:00
Rafael Espindola
21a2b5fd57 Don't repeat names in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 20:57:50 +00:00
Daniel Sanders
5535fca8bf Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
It causes a number of regressions when -fintegrated-as is enabled. This happens
because there are codegen-only instructions that incorrectly uses the first
operand as the encoding for the $fcc register. The regressions do not occur when
-via-file-asm is also given.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 19:47:47 +00:00