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06626a6924
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159 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
06626a6924 Fix swapped CASA operands. 
Found by SingleSource/UnitTests/AtomicOps.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200130 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-26 06:09:54 +00:00
Jakob Stoklund Olesen
c30791627e Implement atomicrmw operations in 32 and 64 bits for SPARCv9. 
These all use the compare-and-swap CASA/CASXA instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199975 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-24 06:23:31 +00:00
Venkatraman Govindaraju
6a0fffd799 [Sparc] Add support for inline assembly constraints which specify registers by their aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199786 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-22 03:18:42 +00:00
Venkatraman Govindaraju
29b1a24a42 [Sparc] Add support for inline assembly constraint 'I'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199781 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-22 01:29:51 +00:00
Venkatraman Govindaraju
6220c8f960 [Sparc] Do not add PC to _GLOBAL_OFFSET_TABLE_ address to access GOT in absolute code. 
Fixes PR#18521


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199775 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-22 00:13:18 +00:00
Jakob Stoklund Olesen
5b8e04cd71 Always let value types influence register classes. 
When creating a virtual register for a def, the value type should be
used to pick the register class. If we only use the register class
constraint on the instruction, we might pick a too large register class.

Some registers can store values of different sizes. For example, the x86
xmm registers can hold f32, f64, and 128-bit vectors. The three
different value sizes are represented by register classes with identical
register sets: FR32, FR64, and VR128. These register classes have
different spill slot sizes, so it is important to use the right one.

The register class constraint on an instruction doesn't necessarily care
about the size of the value its defining. The value type determines
that.

This fixes a problem where InstrEmitter was picking 32-bit register
classes for 64-bit values on SPARC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199187 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-14 06:18:38 +00:00
Jakob Stoklund Olesen
2d81106fa0 Handle bundled terminators in isBlockOnlyReachableByFallthrough. 
Targets like SPARC and MIPS have delay slots and normally bundle the
delay slot instruction with the corresponding terminator.

Teach isBlockOnlyReachableByFallthrough to find any MBB operands on
bundled terminators so SPARC doesn't need to specialize this function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199061 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-12 19:24:08 +00:00
Jakob Stoklund Olesen
1655be290c The SPARCv9 ABI returns a float in %f0. 
This is different from the argument passing convention which puts the
first float argument in %f1.

With this patch, all returned floats are treated as if the 'inreg' flag
were set. This means multiple float return values get packed in %f0,
%f1, %f2, ...

Note that when returning a struct in registers, clang will set the
'inreg' flag on the return value, so that behavior is unchanged. This
also happens when returning a float _Complex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199028 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-12 04:13:17 +00:00
Venkatraman Govindaraju
50e6d23f0d [Sparc] Add missing processor types: v7 and niagara 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199024 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-11 23:56:13 +00:00
Benjamin Kramer
ccdb9c9483 Fix broken CHECK lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199016 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-11 21:06:00 +00:00
Venkatraman Govindaraju
8104690370 [Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199014 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-11 19:38:03 +00:00
Venkatraman Govindaraju
d0a796e5dd [Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198910 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-10 02:55:27 +00:00
Venkatraman Govindaraju
6e202a960e [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64. 
Fixes PR18356.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198480 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-04 07:17:21 +00:00
Venkatraman Govindaraju
447c3480e5 [Sparc] Handle atomic loads/stores in sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198286 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 22:11:54 +00:00
Venkatraman Govindaraju
924ac6dc0c [SparcV9]: Custom lower UMULO/SMULO so that the arguments are send to __multi3() in correct order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198281 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 20:22:45 +00:00
Venkatraman Govindaraju
ca0ef6fe4f [SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198280 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 19:00:10 +00:00
Venkatraman Govindaraju
a71d72a059 [SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns. 
This is done to avoid spilling the result of the 64-bit instructions to a 4-byte slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198157 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-29 07:15:09 +00:00
Venkatraman Govindaraju
0c67825459 [SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall(). 
This makes the sparc backend to generate Sparc64 ABI compliant code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198149 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-29 04:27:21 +00:00
Venkatraman Govindaraju
5b9918957a [SparcV9]: Implement lowering of long double (fp128) arguments in Sparc64 ABI. 
Also, pass fp128 arguments to varargs through integer registers if necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198145 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-29 01:20:36 +00:00
Venkatraman Govindaraju
76a1dca38d [Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198030 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-26 01:49:59 +00:00
Venkatraman Govindaraju
847b5d976d [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196755 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-09 05:13:25 +00:00
Venkatraman Govindaraju
dc50e9af4b [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196751 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-09 04:02:15 +00:00
Venkatraman Govindaraju
e0dc442801 [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9. 
This fixes PR18150.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196735 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-08 22:06:07 +00:00
Venkatraman Govindaraju
2fee935bba [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195576 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-24 20:23:25 +00:00
Venkatraman Govindaraju
cf09ce3b08 [SparcV9]: Do not emit .register directives for global registers that are clobbered by calls but not used in the function itself. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195574 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-24 18:41:49 +00:00
Venkatraman Govindaraju
591719e304 [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195573 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-24 17:41:41 +00:00
Venkatraman Govindaraju
fcd5e86396 [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 12:28:40 +00:00
Venkatraman Govindaraju
5e45051e0e [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193947 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 08:00:19 +00:00
Venkatraman Govindaraju
11cecbe1a0 [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193941 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 05:59:07 +00:00
Roman Divacky
1d6d49fbb1 SparcV9 doesnt have rem instruction either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193789 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-31 19:22:33 +00:00
Venkatraman Govindaraju
3b73dea538 [Sparc] Disable tail call optimization for sparc64. 
This patch fixes PR17506.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192294 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-09 12:50:39 +00:00
Venkatraman Govindaraju
79c5e0c5ca [Sparc] Do not emit nop after fcmp* instruction with V9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 07:06:44 +00:00
Venkatraman Govindaraju
20b10abf4e [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64. 
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192054 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
bb0ec9840b [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx. 
addx/subx does not modify conditional codes whereas addxcc/subxx does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192053 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 02:11:10 +00:00
Venkatraman Govindaraju
a8147756d6 [Sparc] Use correct alignment while loading/storing fp128 values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192023 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-05 02:29:47 +00:00
Venkatraman Govindaraju
b648122c5f [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192015 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-05 00:31:41 +00:00
Venkatraman Govindaraju
1c9524b624 [Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192006 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-04 23:54:30 +00:00
Manman Ren
e267f04ef5 TBAA: update tbaa format from scalar format to struct-path aware format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191690 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-30 18:17:55 +00:00
Venkatraman Govindaraju
30ec8a3658 [Sparc] Implements exception handling in SPARC with DwarfCFI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191432 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-26 15:11:00 +00:00
Venkatraman Govindaraju
7d052f272d [Sparc] Add support for TLS in sparc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191164 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 06:48:52 +00:00
Venkatraman Govindaraju
ecd4965c13 [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191160 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 01:40:24 +00:00
Venkatraman Govindaraju
c12c8d754d [Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191158 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-22 00:42:30 +00:00
Venkatraman Govindaraju
20b5879e0e [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191154 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-21 23:51:08 +00:00
Venkatraman Govindaraju
1b41835f02 [Sparc] Correctly handle call to functions with ReturnsTwice attribute. 
In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores
the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7)
using the stored %fp and register windows. However, this does not guarantee that the longjmp
will restore the registers, as they were when the setjmp was called. This is because these
registers may be clobbered after returning from setjmp, but before calling longjmp.

This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190033 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 05:32:16 +00:00
Venkatraman Govindaraju
bf34f34642 [Sparc] Fix an assertion failure while lowering fcmp on long double. 
This assertion is triggered because an integer constant is created with wrong
  type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189948 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-04 15:15:20 +00:00
Venkatraman Govindaraju
75ddb2bb34 [Sparc] Add support for soft long double (fp128). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-03 04:11:59 +00:00
Venkatraman Govindaraju
6ee0857bd7 [Sparc] Implement spill and load for long double(f128) registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189768 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-02 18:32:45 +00:00
Venkatraman Govindaraju
2f17d0facf [Sparc] Add long double (f128) instructions to sparc backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189198 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 18:30:06 +00:00
Venkatraman Govindaraju
5ec8afa7cf [Sparc] Added V9's extra floating point registers and their aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189195 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 17:03:02 +00:00
Daniel Dunbar
24ec2e5a72 [tests] Cleanup initialization of test suffixes. 
- Instead of setting the suffixes in a bunch of places, just set one master
   list in the top-level config. We now only modify the suffix list in a few
   suites that have one particular unique suffix (.ml, .mc, .yaml, .td, .py).

 - Aside from removing the need for a bunch of lit.local.cfg files, this enables
   4 tests that were inadvertently being skipped (one in
   Transforms/BranchFolding, a .s file each in DebugInfo/AArch64 and
   CodeGen/PowerPC, and one in CodeGen/SI which is now failing and has been
   XFAILED).

 - This commit also fixes a bunch of config files to use config.root instead of
   older copy-pasted code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188513 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-16 00:37:11 +00:00