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0a57dc1d14
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23459 Commits

Author SHA1 Message Date
Akira Hatanaka
0a57dc1d14 [mips] Refactor load/store left/right and load-link and store-conditional 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170950 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:01:24 +00:00
Akira Hatanaka
16164657d8 [mips] Refactor load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170948 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:58:55 +00:00
Akira Hatanaka
5f5770baae [mips] Remove unnecessary isPseudo parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170947 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:57:26 +00:00
Akira Hatanaka
8e719fac46 [mips] Refactor LUI instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170944 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:46:07 +00:00
Akira Hatanaka
35242e27c5 [mips] Refactor count leading zero or one instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170942 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:43:58 +00:00
Akira Hatanaka
8aaed99a99 [mips] Refactor sign-extension-in-register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170940 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:41:52 +00:00
Akira Hatanaka
7de001b97e [mips] Refactor instructions which copy from and to HI/LO registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170939 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:39:17 +00:00
Akira Hatanaka
2a732ec272 [mips] Refactor logical NOR instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170937 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:35:47 +00:00
Akira Hatanaka
a8215f4ec2 [mips] Move instruction definitions in MipsInstrInfo.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170936 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:33:43 +00:00
Tom Stellard
b06c540f9f R600: Coding style - remove empty spaces from the beginning of functions 
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170923 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:12:02 +00:00
Tom Stellard
eef0d5a0d6 R600: Fix MAX_UINT definition 
Patch by: Vadim Girlin

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170922 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:12:01 +00:00
Tom Stellard
fe13e70f6f R600: Add SHADOWCUBE to TEX_SHADOW pattern 
Patch by: Vadim Girlin

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170921 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:11:59 +00:00
Benjamin Kramer
4e23ebe766 Cleanup compiler warnings on discarding type qualifiers in casts. Switch to C++ style casts. 
Patch by Saleem Abdulrasool!

Differential Revision: http://llvm-reviews.chandlerc.com/D204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 19:09:53 +00:00
Benjamin Kramer
2556c6b4b6 X86: Match pmin/pmax as a target specific dag combine. This occurs during vectorization. 
Part of PR14667.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170908 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 17:46:58 +00:00
Roman Divacky
38b06020db Remove duplicate includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170902 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 17:06:44 +00:00
Tom Stellard
519b456fe1 R600: Expand vec4 INT <-> FP conversions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170901 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 16:33:24 +00:00
Benjamin Kramer
739c7a83e1 X86: Match the SSE/AVX min/max vector ops using a custom node instead of intrinsics 
This is very mechanical, no functionality change. Preparation for PR14667.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170898 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 14:04:55 +00:00
Nadav Rotem
042a9a2666 Add a missing "virtual" keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170842 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 05:02:12 +00:00
Quentin Colombet
e0f1d712f6 Add ARM cortex-r5 subtarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170840 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 04:35:05 +00:00
Nadav Rotem
f5637c3997 Improve the X86 cost model for loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170830 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 01:33:59 +00:00
Nadav Rotem
c2a537bd08 BB-Vectorizer: Check the cost of the store pointer type 
and not the return type, which is void. A number of test
cases fail after adding the assertion in TTImpl.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170828 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 01:24:36 +00:00
Reed Kotler
a40ba2b3b2 Call llvm_unreachable instead of assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170822 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 00:44:59 +00:00
Jakob Stoklund Olesen
be06aacaa9 Add an MF argument to MI::copyImplicitOps(). 
This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170797 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:54:02 +00:00
Jakob Stoklund Olesen
b9efafe54d MachineInstrBuilderize ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170795 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:53:55 +00:00
Jakob Stoklund Olesen
28d53a26cc MachineInstrBuilderize NVPTX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170794 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:53:53 +00:00
Bob Wilson
103b4a571e Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 
This reverts r170694.  The operations can be represented in IR without
adding any new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 21:09:38 +00:00
Evan Cheng
139e407d52 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.

rdar://12892707


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 19:59:30 +00:00
Roman Divacky
6af228a92a Remove MCTargetAsmLexer and its derived classes now that edis, 
its only user, is gone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170699 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 14:43:30 +00:00
Renato Golin
332bd79951 Adding support for llvm.arm.neon.vaddl[su].* and 
llvm.arm.neon.vsub[su].* intrinsics.

Patch by Pete Couperus <pjcoup@gmail.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 13:52:11 +00:00
Reed Kotler
27210d215a Implement cfi_def_cfa_offset. "Make check" test case for this comming in the 
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170674 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:59:37 +00:00
Reed Kotler
0fd8313250 There is one more patch to finish large frames. Make sure we assert 
on code that has large frames which will not yet compile correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:57:00 +00:00
Jyotsna Verma
82a36e2b59 Add constant extender support to GP-relative load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:52:46 +00:00
Jyotsna Verma
39498d1ff0 Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170671 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:45:39 +00:00
Reed Kotler
bacbf1c2cb set register class properly for mips16 here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:06:35 +00:00
Rafael Espindola
399532b25a Undefine PPC harder. 
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170668 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:13:09 +00:00
Reed Kotler
c28ee9622a This assert is overly restrictive and does not work for mips16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:09:15 +00:00
Reed Kotler
1f23239c5b Turn on register scavenger for Mips 16 
We use an unused Mips 32 register for the emergency slot
instead of using the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:44:58 +00:00
Akira Hatanaka
9bf571fe2c [mips] Refactor SLT (set on less than) instructions. Separate encoding 
information from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:27:52 +00:00
Akira Hatanaka
c23061547d [mips] Refactor unconditional branch instruction. Separate encoding information 
from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:22:39 +00:00
Akira Hatanaka
1e7739f614 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:20:09 +00:00
Akira Hatanaka
77e85f367c [mips] Delete definition of CPRESTORE instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:15:30 +00:00
Akira Hatanaka
5c54025645 [mips] Refactor conditional branch instructions with one register operand. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:13:23 +00:00
Akira Hatanaka
c488901355 [mips] Refactor conditional branch instructions with two register operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:10:13 +00:00
Reed Kotler
cef95f702a fix most of remaining issues with large frames. 
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:07:42 +00:00
Akira Hatanaka
68fe665b9a [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:06:06 +00:00
Richard Smith
ba836a2e80 Fix use-before-construction of X86TargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:04:17 +00:00
Akira Hatanaka
2427773f2f [mips] Change the order of template parameters. Move the default parameters to 
the end. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:52:08 +00:00
Akira Hatanaka
cdc0c59d1e [mips] Refactor shift instructions with register operands. Separate encoding 
information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:48:24 +00:00
Akira Hatanaka
0dad34a9bf [mips] Refactor shift immediate instructions. Separate encoding information 
from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:44:41 +00:00
Akira Hatanaka
ab48c503e2 [mips] Refactor arithmetic and logic instructions with immediate operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:40:03 +00:00