Chad Rosier
6762f8f302
VFP2 is required for FP loads. Noticed by inspection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:55:03 +00:00
Chad Rosier
64ac91b4b6
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:32:02 +00:00
Chad Rosier
404ed3c223
Fix 80-column violation and extraneous brackets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:26:05 +00:00
Evan Cheng
ddfd1377d2
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
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to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
prevent IT blocks from being broken apart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:11:42 +00:00
Chad Rosier
8a9bce978f
[fast-isel] Unaligned loads of floats are not supported. Therefore, convert to a regular
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load and then move the result from a GPR to a FPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 19:22:14 +00:00
Evan Cheng
5a96b3dad2
Add bundle aware API for querying instruction properties and switch the code
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generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:15:52 +00:00
Chad Rosier
ed42c5f778
[arm-fast-isel] Doublewords only require word-alignment.
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rdar://10528060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:44:17 +00:00
Bob Wilson
6ce2deacef
Fix 80-column issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 00:52:23 +00:00
Chad Rosier
9eff1e33f6
[arm-fast-isel] Unaligned stores of floats require special care.
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rdar://10510150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 02:21:57 +00:00
Nick Lewycky
8a8d479214
Move global variables in TargetMachine into new TargetOptions class. As an API
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change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 22:16:29 +00:00
Chad Rosier
b74c865841
[arm-fast-isel] After promoting a function parameter be sure to update the
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argument value type. Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 20:25:18 +00:00
Duncan Sands
4c0c5451c7
Silence wrong warnings from GCC about variables possibly being used
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uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145239 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 10:31:27 +00:00
Chad Rosier
424fe0e422
Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work/dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18 01:17:34 +00:00
Chad Rosier
944d82ba06
Add TODO comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144920 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 21:46:13 +00:00
Chad Rosier
2fb82ce75d
Dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 07:24:49 +00:00
Chad Rosier
3bdb3c9b51
Don't unconditionally set the kill flag.
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rdar://10456186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17 01:16:53 +00:00
Chad Rosier
508a1f4db1
Check to make sure we can select the instruction before trying to put the
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operands into a register. Otherwise, we may materialize dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 18:39:44 +00:00
Chad Rosier
f56c60b571
Add FIXME comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 00:32:20 +00:00
Jay Foad
d9190c0f14
Remove some unnecessary includes of PseudoSourceValue.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 07:24:32 +00:00
Chad Rosier
2c42b8c912
Supporting inline memmove isn't going to be worthwhile. The only way to avoid
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violating a dependency is to emit all loads prior to stores. This would likely
cause a great deal of spillage offsetting any potential gains.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 23:04:09 +00:00
Chad Rosier
909cb4f2f2
Add support for inlining small memcpys.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 22:46:17 +00:00
Chad Rosier
e489af8dce
Fix a performance regression from r144565. Positive offsets were being lowered
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into registers, rather then encoded directly in the load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144576 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 22:34:48 +00:00
Chad Rosier
57b2997966
Add support for Thumb load/stores with negative offsets.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 20:22:27 +00:00
Chad Rosier
dc9205d9c2
Add support for ARM halfword load/stores and signed byte loads with negative
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offsets.
rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14 04:09:28 +00:00
Chad Rosier
9eb674880b
The order in which the predicate is added differs between Thumb and ARM mode. Fix predicate when in ARM mode and restore SelectIntrinsicCall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 09:44:21 +00:00
Chad Rosier
a517ab155b
Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 05:14:43 +00:00
Chad Rosier
5be833de76
Fix comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 04:25:02 +00:00
Chad Rosier
b29b950bf2
Add support for emitting both signed- and zero-extend loads. Fix
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SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8
offsets (addressing mode 3). This enables a load followed by an integer
extend to be folded into a single load.
For example:
ldrb r1, [r0] ldrb r1, [r0]
uxtb r2, r1 =>
mov r3, r2 mov r3, r1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-13 02:23:59 +00:00
Chad Rosier
11add26ec2
Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:31:03 +00:00
Chad Rosier
1c47de87c7
Rename variables to avoid confusion. No functionallity change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:27:41 +00:00
Chad Rosier
a07d3fc693
Add support for using immediates with select instructions.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:20:39 +00:00
Chad Rosier
646abbfa30
When loading a value, treat an i1 as an i8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 02:38:59 +00:00
Chad Rosier
4e89d97e3a
Add support for using MVN to materialize negative constants.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:36:21 +00:00
Chad Rosier
16455ce1a4
When in ARM mode, LDRH/STRH require special handling of negative offsets.
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For correctness, disable this for now.
rdar://10418009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 21:09:49 +00:00
Chad Rosier
6cba97c555
For immediate encodings of icmp, zero or sign extend first. Then
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determine if the value is negative and flip the sign accordingly.
rdar://10422026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 01:30:39 +00:00
Chad Rosier
7346347674
The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.
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rdar://10418009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144213 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 21:30:12 +00:00
Chad Rosier
2f2fe417f9
Add support for encoding immediates in icmp and fcmp. Hopefully, this will
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remove a fair number of unnecessary materialized constants.
rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
Chad Rosier
66dc8ca04b
ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this.
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No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 21:12:00 +00:00
Chad Rosier
0eff39f2e2
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
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callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:03:32 +00:00
Chad Rosier
42536af5ce
Add support for passing i1, i8, and i16 call parameters. Also, be sure to
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zero-extend the constant integer encoding. Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-05 20:16:15 +00:00
Chad Rosier
451afbc6a2
Cannot create a result register for non-legal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143749 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 23:45:39 +00:00
Chad Rosier
a4e07270bc
When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit
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in a 16-bit immediate. However, for the shorter non-legal types (i.e., i1, i8,
i16) we should not sign-extend. This prevents us from materializing things
such as 'true' (i.e., i1 1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 23:09:49 +00:00
Chad Rosier
44e895761f
Enable support for materializing i1, i8, and i16 integers via move immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 22:29:00 +00:00
Chad Rosier
8e4a2e4f73
Indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 00:58:10 +00:00
Chad Rosier
f470cbbad2
Add fast-isel support for returning i1, i8, and i16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 00:50:21 +00:00
Chad Rosier
463fe24f1d
Add support for sign-extending non-legal types in SelectSIToFP().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-03 02:04:59 +00:00
Chad Rosier
e07cd5e40a
Add support for comparing integer non-legal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 18:08:25 +00:00
Chad Rosier
87633026d6
Factor out an EmitIntExt function. No functionality change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 17:20:24 +00:00
Chad Rosier
0d7b231c9b
Factor out a SelectTrunc function. No functionality change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 00:18:48 +00:00
Chad Rosier
6d64b3adab
A branch predicated on a constant can just FastEmit an unconditional branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 00:21:16 +00:00