Commit Graph

2302 Commits

Author SHA1 Message Date
Chris Lattner
0b1a85f110 Pull shifts by a constant through multiplies (a form of reassociation),
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 03:44:24 +00:00
Evan Cheng
860771d2d8 Vector ops lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 01:09:54 +00:00
Evan Cheng
1ab7d859cf - Added VConstant as an abstract version of ConstantVec.
- All abstrct vector nodes must have # of elements and element type as their
first two operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26432 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 00:51:13 +00:00
Jim Laskey
45ccae5b7d Add const, volatile, restrict support.
Add array of debug descriptor support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26428 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 20:15:07 +00:00
Chris Lattner
35a9f5a241 Compile:
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 06:49:37 +00:00
Chris Lattner
15045b6973 Fold "and (LOAD P), 255" -> zextload. This allows us to compile:
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 06:35:35 +00:00
Chris Lattner
71d9ebcbc1 fold (sra (sra x, c1), c2) -> (sra x, c1+c2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-28 06:23:04 +00:00
Chris Lattner
22873462c9 Add support for output memory constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 23:45:39 +00:00
Jim Laskey
9a777a3a8e Qualify dwarf namespace inside llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26409 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 22:37:23 +00:00
Jim Laskey
8a8e9756c8 Partial enabling of functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26404 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 20:37:42 +00:00
Jim Laskey
bd76184e67 Supporting multiple compile units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26402 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 17:27:12 +00:00
Jim Laskey
0d086af82b Re-orging file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26401 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 12:43:29 +00:00
Chris Lattner
a6bc5a4d21 Implement bit propagation through sub nodes, this (re)implements
PowerPC/div-2.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 01:00:42 +00:00
Chris Lattner
2d2536c9d7 remove some completed notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:39:31 +00:00
Chris Lattner
81cd35586f Check RHS simplification before LHS simplification to avoid infinitely looping
on PowerPC/small-arguments.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:36:27 +00:00
Chris Lattner
5f0c658aa4 Just like we use the RHS of an AND to simplify the LHS, use the LHS to
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:22:28 +00:00
Chris Lattner
ec665151b8 Add a bunch of missed cases. Perhaps the most significant of which is that
assertzext produces zero bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 23:36:02 +00:00
Evan Cheng
38b7327ec0 Print ConstantPoolSDNode offset field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 08:36:57 +00:00
Evan Cheng
404cb4f9fa Added an offset field to ConstantPoolSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:54:52 +00:00
Chris Lattner
28bad08411 Fix a bug that Evan exposed with some changes he's making, and that was
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:17:31 +00:00
Chris Lattner
47cb7173ea Remove debugging printout :)
Add a minor compile time win, no codegen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:03:40 +00:00
Chris Lattner
540fec6b38 Refactor some code from being inline to being out in a new class with methods.
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 01:51:33 +00:00
Chris Lattner
dd26033002 Use the PrintAsmMemoryOperand to print addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 20:21:58 +00:00
Chris Lattner
daf6bc6347 Pass all the flags to the asm printer, not just the # operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 19:50:58 +00:00
Chris Lattner
fd6d282a71 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.
Add support for addressing modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 19:18:20 +00:00
Chris Lattner
ed18b6896e Refactor operand adding out to a new AddOperand method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 18:54:03 +00:00
Jim Laskey
6990600f93 Add pointer and reference types. Added short-term code to ignore NULL types
(to allow llvm-gcc4 to build.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26355 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 16:46:40 +00:00
Jeff Cohen
7e88103cde Get VC++ building again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 02:52:40 +00:00
Chris Lattner
0e43f2ba11 Implement (most of) selection of inline asm memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 02:13:54 +00:00
Chris Lattner
87bc3bd121 Lower C_Memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:11:24 +00:00
Chris Lattner
2b7401e28e Recognize memory operand codes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:10:46 +00:00
Jim Laskey
434b40b42f Added basic support for typedefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 22:37:30 +00:00
Chris Lattner
9f6637db10 Fix an endianness problem on big-endian targets with expanded operands
to inline asms.  Mark some methods const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:06:57 +00:00
Chris Lattner
c3a9f8d31c Record all of the expanded registers in the DAG and machine instr, fixing
several bugs in inline asm expanded operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 19:21:04 +00:00
Jim Laskey
f4afdd9f41 DwarfWriter reading basic type information from llvm-gcc4 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 16:58:18 +00:00
Chris Lattner
ffab42263a Code cleanups, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 06:44:17 +00:00
Chris Lattner
9b6fb5de49 This fixes a couple of problems with expansion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 23:09:03 +00:00
Chris Lattner
b3befd41b4 Don't return registers from register classes that aren't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 23:00:51 +00:00
Chris Lattner
864635ad7b Change a whole bunch of code to be built around RegsForValue instead of
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 22:37:12 +00:00
Jim Laskey
0420f2aaf9 Coordinate activities with llvm-gcc4 and dwarf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 19:02:11 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
Chris Lattner
0f0b7d4927 Adjust to changes in getRegForInlineAsmConstraint prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:12:12 +00:00
Chris Lattner
4217ca8dc1 Updates to match change of getRegForInlineAsmConstraint prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:11:00 +00:00
Chris Lattner
7d20d39009 Fix a problem Nate and Duraid reported where simplifying nodes can cause
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26291 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-20 06:51:04 +00:00
Chris Lattner
dca7abed91 Fix a problem on itanium with memset. The value to set has been promoted to
i64 before this code, so zero_ext doesn't work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26290 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-20 06:38:35 +00:00
Nate Begeman
003a272319 Add a fold for add that exchanges it with a constant shift if possible, so
that the shift may be more easily folded into other operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 02:43:25 +00:00
Nate Begeman
b0d04a7dea Add checks to make sure we don't create bogus extend nodes, and fix a bug
where we were doing exactly that which was causing failures on x86 and
alpha.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26284 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 02:40:58 +00:00
Chris Lattner
012f241987 Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
exactly the API we wanted to call into.  This fixes the crash on crafty last
night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26269 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 21:58:01 +00:00
Nate Begeman
fb7217bea3 Clean up DemandedBitsAreZero interface
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26263 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 19:54:08 +00:00
Nate Begeman
cd6a6ed0a9 Don't expand sdiv by power of two before legalize, since it will likely
generate illegal nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 07:26:20 +00:00