Commit Graph

54942 Commits

Author SHA1 Message Date
Chandler Carruth
0b8b3ba21e Harden the Unix signals code to be more async signal safe.
This is likely only the tip of the ice berg, but this particular bug
caused any double-free on a glibc system to turn into a deadlock! It is
not generally safe to either allocate or release heap memory from within
the signal handler. The 'pop_back()' in RemoveFilesToRemove was deleting
memory and causing the deadlock. What's worse, eraseFromDisk in PathV1
has lots of allocation and deallocation paths. We even passed 'true' in
a place that would have caused the *signal handler* to try to run the
'system' system call and shell out to 'rm -rf'. That was never going to
work...

This patch switches the file removal to use a vector of strings so that
the exact text needed for the 'unlink' system call can be stored there.
It switches the loop to be a boring indexed loop, and directly calls
unlink without looking at the error. It also works quite hard to ensure
that calling 'c_str()' is safe, by ensuring that the non-signal-handling
code path that manipulates the vector always leaves it in a state where
every element has already had 'c_str()' called at least once.

I dunno exactly how overkill this is, but it fixes the
deadlock-on-double free issue, and seems likely to prevent any other
issues from sneaking up.

Sorry for not having a test case, but I *really* don't know how to test
signal handling code easily....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-16 00:09:41 +00:00
Jakob Stoklund Olesen
af06825460 Remove final verification in RABasic.
We now have a proper machine code verifier pass between register
allocation and rewriting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 23:48:48 +00:00
Jakob Stoklund Olesen
127cdba3eb Print out register number in InlineSpiller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158575 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 23:47:09 +00:00
Jakob Stoklund Olesen
eb06b0b6aa Accept null PhysReg arguments to checkRegMaskInterference.
Calling checkRegMaskInterference(VirtReg) checks if VirtReg crosses any
regmask operands, regardless of the registers they clobber.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158563 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 22:24:22 +00:00
Kevin Enderby
f49a4092bc Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,
iaspr, espr and xpsr which also needed to have 0b10 in their mask encoding bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158560 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 22:14:44 +00:00
Manman Ren
307473dec0 ARM: optimization for sub+abs.
This patch will optimize abs(x-y)
FROM
sub, movs, rsbmi
TO
subs, rsbmi

For abs, we will use cmp instead of movs. This is necessary because we already
have an existing peephole pass which optimizes away cmp following sub.

rdar: 11633193


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158551 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 21:32:12 +00:00
Kay Tiong Khoo
695fd1a455 *fixed to separate mnemonic from operands with tab
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158543 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 21:04:21 +00:00
Andrew Trick
b6b5b7b691 LSR: fix expansion of scaled reg in non-address type formulae.
For non-address users, Base and Scaled registers are not specially
associated to fit an address mode, so SCEVExpander should apply normal
expansion rules. Otherwise we may sink computation into inner loops
that have already been optimized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158537 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 20:07:29 +00:00
Andrew Trick
546f210115 LSR fix: "Special" users are just like "Basic" users but allow -1 scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 20:07:26 +00:00
Bill Wendling
4b8e1fd054 Remove assignments which aren't used afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158535 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 19:30:42 +00:00
Pete Cooper
cbf73908f1 Allow SROA to split up an array of vectors into multiple vectors, even when the vectors are dynamically indexed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 18:07:29 +00:00
Rafael Espindola
2f135d4c14 Some optimizations done by globalopt are safe only for internal linkage, not
linkonce linkage. For example, it is not valid to add unnamed_addr.

This also fixes a crash in g++.dg/opt/static5.C.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158528 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 18:00:24 +00:00
Jakob Stoklund Olesen
d628a587b6 Preserve <undef> flags in ARMExpandPseudo.
This probably mostly shows up in bugpoint-generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 17:46:54 +00:00
Jakob Stoklund Olesen
324143d888 Use regunit liveness in RegisterCoalescer when it is available.
We only do very limited physreg coalescing now, but we still merge
virtual registers into reserved registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 17:36:48 +00:00
Rafael Espindola
aa7a2f2ba3 Factor macro argument parsing into helper methods and add support for .irp.
Patch extracted from a larger one by the PaX team. I added the testcases
and tightened error handling a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158523 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 14:02:34 +00:00
Duncan Sands
cd117f736c Fix issues (infinite loop and/or crash) with self-referential instructions, for
example degenerate phi nodes and binops that use themselves in unreachable code.
Thanks to Charles Davis for the testcase that uncovered this can of worms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158508 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 08:37:50 +00:00
Craig Topper
8e58b3e9b8 Move AVX version of convert instructions that write to GPRs to the Op1 table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158497 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 07:02:58 +00:00
Marshall Clow
45aad162c6 Had a closing brace inside an #ifdef -- oops!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158485 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 01:15:47 +00:00
Marshall Clow
d4d03e09d3 Adding acessors to COFFObjectFile so that clients can get at the (non-generic) bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15 01:08:25 +00:00
Pete Cooper
6399b7c510 Recommit r158407: Allow SROA to look at a vector type and see if the offset is out of range to be replaced with a scalar access. Now with additional fix and test for indexing into a vector inside a struct
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 23:53:53 +00:00
Rafael Espindola
0397729d3b Implement the isSafeToDiscardIfUnused predicate and use it in globalopt and
globaldce. Globaldce was already removing linkonce globals, but globalopt was
not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158476 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 22:48:13 +00:00
Pete Cooper
312091ece3 Move X86::VCVTTSD2SIrr from the 2 operand to 1 operand MemRegOp table.
Can someone with more knowledge of this please look at other entries
to see if others need moved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 22:12:58 +00:00
Akira Hatanaka
864f66085c Fix coding style violations. Remove white spaces and tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 21:10:56 +00:00
Akira Hatanaka
1418045472 1. introduce MipsPat in place of Pat in order to exclude those from
being used by Mips16 or Micro Mips
2. clean up a few lines too long encountered

Patch by Reed Kotler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158470 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 21:03:23 +00:00
Akira Hatanaka
6b0cd9b9c6 Make machine verifier check the first instruction of the last bundle instead of
the last instruction of a basic block.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158468 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 20:51:13 +00:00
Lang Hames
0180694b2f Make comment slightly more helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158467 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 20:37:15 +00:00
Pete Cooper
9e066625b7 Revert r158454: Allow SROA to look at a vector type... Its breaking the vectorise buildbot
This reverts commit 12c1f86ffa731e2952c80d2cc577000c96b8962c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 18:32:52 +00:00
Andrew Trick
42120a2c55 misched: disable SSA check pending PR13112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158461 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 17:48:49 +00:00
Pete Cooper
77fdd3ad4a Recommit r158407: Allow SROA to look at a vector type and see if the offset is out of range to be replaced with a scalar access. Now with additional fix and test for indexing into a vector inside a struct
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158454 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 16:38:13 +00:00
NAKAMURA Takumi
f1ece22612 MipsLongBranch.cpp: Tweak llvm::next() to appease msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 12:29:48 +00:00
Richard Barton
a1c7367a5b Replace assertion failure for badly formatted CPS instrution with error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 10:48:04 +00:00
Jush Lu
efc967e044 Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 06:08:19 +00:00
Manman Ren
7a0575b9a8 InstCombine: fix a bug when combining (fcmp cc0 x, y) && (fcmp cc1 x, y).
uno && ueq was converted to ueq, it should be converted to uno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158441 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 05:57:42 +00:00
Akira Hatanaka
f4f60cbe46 Fix Mips/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158437 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:23:55 +00:00
Akira Hatanaka
a32ccf92c1 Add file MipsLongBranch.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158436 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:22:24 +00:00
Akira Hatanaka
63b37f122d Remove code in MipsAsmPrinter and MipsMCInstLower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158434 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:20:12 +00:00
Akira Hatanaka
9e97587e02 Add long branch expansion pass for MIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158433 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:19:35 +00:00
Akira Hatanaka
91625aab60 Add AT to the list of registers clobbered by branches so that it is available
as a scratch register when they are expanded to long branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158432 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:17:59 +00:00
Akira Hatanaka
c56a7bb051 In MipsRegisterInfo::eliminateFrameIndex, call Mips::loadImmediate
to load an immediate that does not fit into 16-bit. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:17:36 +00:00
Akira Hatanaka
84e09287cb In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediate
to load an immediate that does not fit into 16-bit. Also, take into
consideration the global base register slot on the stack when computing the
stack size. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158430 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:17:13 +00:00
Akira Hatanaka
d4b48b283c Define function MipsInstrInfo::GetInstSizeInBytes, which will be called to
compute the size of basic blocks in a function. Also, define a function which
emits a series of instructions to load an immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:16:45 +00:00
Akira Hatanaka
4654e58a64 In MipsISelDAGToDAG.cpp, store the global base register to a stack frame object.
Long-branches need access to the global base register to get the destination
address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158428 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:16:15 +00:00
Akira Hatanaka
a76220a40c Add methods to MipsFunctionInfo for initializing and accessing the stack frame
object for the global base register.

This is the first of a series of patches which implements long branch expansion
for MIPS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:15:36 +00:00
Akira Hatanaka
158413930f Bundle jump/branch instructions with the instructions in the delay slot in
delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enables machine verification
to be run after delay slot filling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 23:25:52 +00:00
Akira Hatanaka
8782707f50 Implement a DAGCombine in MipsISelLowering.cpp which transforms the following
pattern:

(add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt))

"tjt" is a TargetJumpTable node. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 20:33:18 +00:00
Akira Hatanaka
e193b32583 Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 19:33:32 +00:00
Akira Hatanaka
2bd7e532b4 Simplify CreateLoadLR and CreateStoreLR in MipsISelLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158413 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 19:06:08 +00:00
Akira Hatanaka
777a120285 Implement fastcc calling convention for MIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 18:06:00 +00:00
Richard Osborne
aa08c8b2ba Fix pattern for MKMSK instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158409 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 17:59:12 +00:00
Pete Cooper
e91f926f3b Revert "Allow SROA to look at a vector type and see if the offset is out of range to be replaced with a scalar access"
This reverts commit 51786e0aae.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13 17:55:22 +00:00