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10197 Commits

Author SHA1 Message Date
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc 
argument.  Adjust all callers and overloaded versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275 Get rid of the non-DebugLoc-ified getNOT() method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:03:19 +00:00
Sanjiv Gupta
5af3ee2818 Fixed the comment. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63387 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 09:01:44 +00:00
Sanjiv Gupta
e0ffc92508 Use sublw for comparison with literals instead of subwf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 07:55:25 +00:00
Mon P Wang
7ad9b51278 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of 
an illegal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 07:07:40 +00:00
Sanjiv Gupta
c8d7bc850d Enable emitting of constant values in non-default address space as well. The APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63377 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 04:25:10 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some 
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889 Fixed lowering of v816 shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 23:11:14 +00:00
Duncan Sands
1465d61bdd Rename getAnalysisToUpdate to getAnalysisIfAvailable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 13:14:17 +00:00
Evan Cheng
1632782fe9 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 08:35:02 +00:00
Mon P Wang
3becd093cc Add shuffle splat pattern for x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 08:12:05 +00:00
Evan Cheng
d1e7d9a88b Suppress a compile time warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63161 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 00:53:34 +00:00
Anton Korobeynikov
72bb40229e Treat [1 x i8] zeroinitializer as a C string, placing such stuff into 
mergeable string section. I don't see any bad impact of such decision
(rather then placing it into mergeable const section, as it was before),
but at least Darwin linker won't complain anymore.

The problem in LLVM is that we don't have special type for string constants
(like gcc does). Even more, we have two separate types: ConstatArray for non-null
strings and ConstantAggregateZero for null stuff.... It's a bit weird :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63142 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 22:29:24 +00:00
Dan Gohman
d3f184906d Reformat the allocation-order arrays to a more conventional style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 19:25:38 +00:00
Dan Gohman
9e79091f1a Respect the DisableRedZone flag on PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63119 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 19:19:28 +00:00
Dan Gohman
c03e9a1040 Simplify findNonImmUse; return the result using the return value 
instead of via a by-reference argument. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63118 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 19:04:30 +00:00
Evan Cheng
6a86bd71df Implement multiple with overflow by 2 with an add instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 03:30:42 +00:00
Dan Gohman
e8ecf4876a Eliminate unnecessary operands-list traversals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 02:37:43 +00:00
Dan Gohman
499cb3fcfb Enable the red zone on x86-64 by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63078 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 00:58:47 +00:00
Dan Gohman
336b636dd7 Fix the Red Zone calculation for functions with frame pointers. 
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-27 00:40:06 +00:00
Scott Michel
9de57a9ed2 CellSPU: 
- Update DWARF debugging support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63059 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 22:33:37 +00:00
Scott Michel
210de72cd7 Make the Dwarf macro information section optional; CellSPU's assembler 
doesn't support it. The default is set to 'true', so this should not
impact any other target backends.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63058 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 22:32:51 +00:00
Dan Gohman
92f4f16a19 Implement Red Zone utilization on x86-64. This is currently 
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 22:22:31 +00:00
Evan Cheng
5b2e5893c6 Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 18:43:34 +00:00
Dan Gohman
e7852d0144 Take the next steps in making SDUse more consistent with LLVM Use, and 
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 04:35:06 +00:00
Scott Michel
19c10e658a Untabify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:37:41 +00:00
Scott Michel
c9c8b2a804 CellSPU: 
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:31:40 +00:00
Nate Begeman
5bf4b7556f Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62989 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:54 +00:00
Nate Begeman
c2fd67f697 De-identifying per sabre review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:31 +00:00
Nate Begeman
51a0437b16 Map address space 256 to gs; similar mappings could be supported for the 
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 01:24:32 +00:00
Nate Begeman
740ab03f12 Support pattern matching various x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 00:52:55 +00:00
Chris Lattner
4469c53cfc silence a warning when assertions are disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 23:08:00 +00:00
Torok Edwin
afb564c697 should have removed the + when manually applying a patch! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 20:29:34 +00:00
Torok Edwin
c8ad2d2abf revert this patch for now, because Codegen does still want to generate SSE code, 
for example in the case of va-args. XFAIL associated tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7 If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 17:58:56 +00:00
Evan Cheng
1902a129a5 Private linkage support for PPC / Darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 06:32:01 +00:00
Nate Begeman
9b99485074 Fix an indent and a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-24 22:12:48 +00:00
Torok Edwin
e46a686dc2 add note about possible GEP improvement with fields of size 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62925 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-24 19:30:25 +00:00
Chris Lattner
91387de8ce hopefully address PR3379 by making the P modifier work in x86 inline asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62887 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-23 22:33:40 +00:00
Bob Wilson
4c24546238 Add SelectionDAG::getNOT method to construct bitwise NOT operations, 
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 17:39:32 +00:00
Evan Cheng
536ab130ec Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 09:10:11 +00:00
Chris Lattner
256baa4b1f add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 07:16:03 +00:00
Dan Gohman
dbf5f2557e Recognize inline asm for bswap on x86-64 GLIBC. This allows it 
to be supported in the JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 23:40:54 +00:00
Evan Cheng
a095c972cc Also favors NOT64r. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 19:45:31 +00:00
Chris Lattner
0f2d995fd6 fix warning in release-asserts mode and spelling of assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62699 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 18:38:18 +00:00
Dan Gohman
1ef4d8f7ee Fix a recent regression. ClrOpcode is not set for i8; for i8, if 
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 14:50:16 +00:00
Sanjiv Gupta
2530566acd Fixed build warnings. Restoring changes done in 62600, they were lost in 62655. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62681 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 09:02:46 +00:00
Duncan Sands
9fbc7e2e7a Cleanup whitespace and comments, and tweak some 
prototypes, in operand type legalization.  No
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 09:00:29 +00:00
Sanjiv Gupta
08b9b05218 Implement LowerOperationWrapper for legalizer. 
Also a few signed comparison fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 05:44:05 +00:00
Scott Michel
d1e8d9c0a5 CellSPU: 
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 04:58:48 +00:00
Evan Cheng
aaf414c92c Favors generating "not" over "xor -1". For example. 
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-21 02:09:05 +00:00
Evan Cheng
04ee5a1d92 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-20 19:12:24 +00:00
Dan Gohman
8289b05c4c Add a README entry noticed while investigating PR3216. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-20 01:07:33 +00:00
Evan Cheng
2722e7b139 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 19:06:11 +00:00
Evan Cheng
c1a168a0fc Fix 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 18:57:29 +00:00
Evan Cheng
5fc742d5b2 Handle ISD::DECLARE with PIC relocation model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62516 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 18:31:51 +00:00
Evan Cheng
50c3dfefd9 Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting. 
%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>

The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:19:57 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't 
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:08:22 +00:00
Bill Wendling
030939c87b Extend thi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 07:40:19 +00:00
Evan Cheng
8e27826649 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 07:09:27 +00:00
Bill Wendling
f6a4e2edb0 Temporarily revert my last change. It is causing a bootstrap failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 04:23:51 +00:00
Bill Wendling
8b8a636843 Implement a special algorithm for converting uint_to_fp for i32 values on 
X86. This code:

void f() {
  uint32_t x;
  float y = (float)x;
}

used to be:

     movl     %eax, -8(%ebp)
     movl     [2^52 double], -4(%ebp)
     movsd    -8(%ebp), %xmm0
     subsd    [2^52 double], %xmm0
     cvtsd2ss %xmm0, %xmm0

Is now:

   movsd        [2^52 double], %xmm0
   movsd        %xmm0, %xmm1
   movd         %ecx, %xmm2
   orps         %xmm2, %xmm1
   subsd        %xmm0, %xmm1
   cvtsd2ss     %xmm1, %xmm0

This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 03:56:04 +00:00
Oscar Fuentes
70fd453a02 CMake: Add lib/Target/IA64/IA64Subtarget.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62394 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 01:50:32 +00:00
Evan Cheng
ee5c2b8ba2 Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 22:57:32 +00:00
Dan Gohman
01bbc3e334 Give IA64 a TargetSubtarget subclass, so that it can 
implement getSubtargetImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62369 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 22:49:36 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 19:25:27 +00:00
Evan Cheng
bdfc582edf ARMCompilationCallback should not save / restore vfp registers if vfp is not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62299 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 02:16:37 +00:00
Dan Gohman
2836c283bb Initial hazard recognizer support in post-pass scheduling. This includes 
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62291 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 01:33:36 +00:00
Dan Gohman
fc54c55296 Generalize the HazardRecognizer interface so that it can be used 
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 22:18:12 +00:00
Rafael Espindola
19caec79f2 Fix Alpha test and support for private linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 21:51:46 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 19:20:50 +00:00
Dan Gohman
41b762a75e Add load-folding table entries for BT*ri8 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62267 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:57:09 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:34:08 +00:00
Dan Gohman
73e0914848 Const-qualify getPreIndexedAddressParts and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62259 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 16:29:45 +00:00
Richard Osborne
cfb1ae87c6 Don't fold address calculations which use negative offsets into 
the ADDRspii addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62258 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 11:32:30 +00:00
Richard Osborne
62db116933 Update the operands used when building LDAWSP instructions to match the .td 
changes in the last commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62257 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 11:18:53 +00:00
Scott Michel
94bd57e154 - Convert remaining i64 custom lowering into custom instruction emission 
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
  DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
  that stretches tblgen and the imagination, as well as violating laws of
  several small countries and most southern US states (just kidding, but
  looking at a function with 80+ parameters is really weird and just plain
  wrong.)
- Update tests as needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62254 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 04:41:47 +00:00
Richard Osborne
29cab5f0ee Add pseudo instructions to the XCore for (load|store|load address) of a 
frame index. eliminateFrameIndex will replace these instructions with
(LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use.

This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame
pointer elimination. However since they were marked as implicitly using
SP they could not be rematerialised.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62238 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-14 18:26:46 +00:00
Nuno Lopes
bb6382e32d fix memleaks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:35:49 +00:00
Dan Gohman
0746392cc2 BT appears to be available on all >= i386 chips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c Don't use a BT instruction if the AND has multiple uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:25:30 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks 
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:23:30 +00:00
Dan Gohman
4afe15b131 Add bt instructions that take immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:33:23 +00:00
Dan Gohman
0c89b7e61e Fix a few more JIT encoding issues in the BT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62179 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:32:45 +00:00
Sanjiv Gupta
1b04694116 Checking in conditionals, function call, arrays and libcalls implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62174 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 19:18:47 +00:00
Chris Lattner
acca9559f4 make -march=cpp handle the nocapture attribute, make it assert if it 
sees attributes it doesn't know.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62155 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 07:22:22 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 00:35:13 +00:00
Duncan Sands
ceb4d1aecb Rename getABITypeSize to getTypePaddedSize, as 
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-12 20:38:59 +00:00
Evan Cheng
f2accb5c9e 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-10 03:33:22 +00:00
Misha Brukman
9b8f542e27 Removed trailing whitespace from Makefiles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 16:44:42 +00:00
Dan Gohman
5446274bd2 Add load-folding table entries for MOVDQA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:40:34 +00:00
Dan Gohman
b134709a58 Whitespace and other minor adjustments to make SSE instructions have 
the same formatting as their corresponding SSE2 instructions, for
consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61971 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:27:34 +00:00
Devang Patel
eb3fc28914 Convert DwarfWriter into a pass. 
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 23:40:34 +00:00
Chris Lattner
9fee08fce7 add some more crazy strlen and memcpy stuff I noticed in spec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61918 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 07:34:55 +00:00
Chris Lattner
ffb08f569b add some notes about strlen craziness in eon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61917 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 06:52:57 +00:00
Misha Brukman
93c65c8378 Fix off-by-one error in traversing an array; this fixes a test. 
The error was reported by gcc-4.3.0 during compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61896 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 23:07:29 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded 
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 01:00:24 +00:00
Dan Gohman
b33fc7b063 Add load-folding table entries for cmovno too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61841 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:44:53 +00:00