Chris Lattner
f6cd147471
now that tblgen is smarter, use integers directly. This should help Andrew too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
8be1fa5dc5
Convert these cases to patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394
Woo, it kinda works. We now generate this atrociously bad, but correct,
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code for long long foo(long long a, long long b) { return a + b; }
_foo:
or r2, r3, r3
or r3, r4, r4
or r4, r5, r5
or r5, r6, r6
rldicr r2, r2, 32, 31
rldicl r3, r3, 0, 32
rldicr r4, r4, 32, 31
rldicl r5, r5, 0, 32
or r2, r3, r2
or r3, r5, r4
add r4, r3, r2
rldicl r2, r4, 32, 32
or r4, r4, r4
or r3, r2, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:12:32 +00:00
Nate Begeman
da32c9eed6
Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
...
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.
Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG. Something wll have to be
figured out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:05:37 +00:00
Chris Lattner
841d12d9ac
Fix the JIT encoding of LWA, LD, STD, and STDU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Nate Begeman
1d9d7427c4
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
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purely mechanical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Chris Lattner
e0b2e6372f
Add a pattern for FSQRTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
f379997adc
Rename PowerPC*.td -> PPC*.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:40:39 +00:00
Chris Lattner
7cb6491a0d
Add patterns for FP round/extend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:50 +00:00
Chris Lattner
7b1fe15de0
These definitions have been moved to common code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:01:00 +00:00
Chris Lattner
dff06f4348
add patterns for float binops and fma ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:46:28 +00:00
Chris Lattner
43f07a4bbc
another solution to the fsel issue. Instead of having 4 variants, just force
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the comparison to be 64-bits. This is fine because extensions from float
to double are free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7
fsel can take a different FP type for the comparison and for the result. As such
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split the FSEL family into 4 things instead of just two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:58:23 +00:00
Chris Lattner
919c032fa4
Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
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These are used to represent float and double values, and the two regclasses
contain the same physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Chris Lattner
67ab118a6d
Add a bunch of patterns for F64 FP ops, add some more integer ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 23:34:24 +00:00
Chris Lattner
c7a37a52cd
tblgen autogens this pattern now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23530 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 22:37:24 +00:00
Chris Lattner
221e53caea
now that tblgen is smarter, this pattern is not needed. Also, tblgen
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now inverts commuted versions of ANDC/ORC with the current .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23527 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-29 19:29:15 +00:00
Chris Lattner
79d0e9f3d1
Codegen ADD X, IMM -> addis/addi if needed.
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This implements PowerPC/fold-li.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23514 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 23:07:13 +00:00
Chris Lattner
e025574370
add a patter for SUBFIC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23509 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:47:06 +00:00
Chris Lattner
0648ccf1e9
Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative but
...
not associative. Add [SU]REM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23508 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:38:27 +00:00
Chris Lattner
a5cac6f6eb
Mark associative nodes as associative
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23503 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 20:58:39 +00:00
Chris Lattner
645992f595
Nate pointed out that mulh[us] are commutative as well. Thanks!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23500 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 19:01:44 +00:00
Chris Lattner
6bcf1b7eed
expose commutativity information
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23498 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 18:27:58 +00:00
Chris Lattner
cfc828a3d0
add support for missed eqv tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23496 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 18:10:51 +00:00
Chris Lattner
91da8623be
learn to codegen not as NOR instead of xoris/xori
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23490 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 17:13:15 +00:00
Chris Lattner
30e21a46f0
minor pattern shuffling
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23458 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-26 22:20:16 +00:00
Chris Lattner
ea874f3306
Teach the dag isel generator how to construct arbitrary immediates. The
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generated isel now tries li then lis, then lis+ori.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23418 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-24 00:41:58 +00:00
Chris Lattner
4ac85b3e94
disable this for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23366 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-15 21:44:00 +00:00
Chris Lattner
43ef1318c6
give all operands names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 21:10:24 +00:00
Chris Lattner
4345a4a452
Fix some issues exposed by more testing. XORIS had the wrong operands
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specified. The various *imm operands defined by PPC are really all i32,
even though the actual immediate is restricted to a smaller value in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23352 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 20:53:05 +00:00
Chris Lattner
c36d065dce
Fix some bugs noticed by new checking code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23350 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 18:18:39 +00:00
Chris Lattner
043870dd85
Teach the code generator that rlwimi is commutable if the rotate amount
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is zero. This lets the register allocator elide some copies in some cases.
This implements CodeGen/PowerPC/rlwimi-commute.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23292 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 18:17:41 +00:00
Chris Lattner
2eb2517fbe
Introduce two new concepts:
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1. Add support for defining Pattern's, which can match expressions when there
is no instruction that directly implements something. Instructions usually
implicitly define patterns.
2. Add support for defining SDNodeXForm's, which are node transformations.
This seperates the concept of a node xform out from the existing predicate
support.
Using this new stuff, we add a few instruction patterns, one for testing, and
two for OR/XOR by an arbitrary immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23286 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 00:39:56 +00:00
Chris Lattner
b85c64c4d8
whitespace/comment changes, no functionality diffs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23283 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 23:17:26 +00:00
Chris Lattner
47f01f1b44
Add a bunch of stuff needed for node type inference. Move 'BLR' down with
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the rest of the instructions, add comment markers to seperate portions of
the file into logical parts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23277 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 19:50:41 +00:00
Chris Lattner
bfde080ce0
add patterns for x?oris?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23268 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 17:40:49 +00:00
Chris Lattner
3e63ead49b
add patterns to the addi/addis/mulli etc instructions. Define predicates
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for matching signed 16-bit and shifted 16-bit ppc immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23267 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 17:33:10 +00:00
Chris Lattner
d1cdc7028c
Add patterns for some new instructions, allowing the use of the ineg fragment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23266 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-08 17:01:54 +00:00
Chris Lattner
e147ceb2fa
explicitly specify an operands list for patterns with inputs (e.g. neg)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23240 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-03 01:28:40 +00:00
Chris Lattner
7cd09cf942
rearrange logical ops to group them together more consistently.
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Define the PatFrag class which can be used to define subpatterns to match
things with. Define 'not', and use it to define the patterns for andc,
nand, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-03 00:21:51 +00:00
Chris Lattner
6159fb20c2
Add AND/OR/XOR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23232 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 22:35:53 +00:00
Chris Lattner
218a15d02c
Add some initial patterns to simple binary instructions, though they
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currently don't do anything. This elides patterns for binary operators
that ping on the carry flag, since we don't model it yet.
This patch also removes PPC::SUB, because it is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23230 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 21:18:00 +00:00
Chris Lattner
e3f1c97734
The condition register being branched on may not be cr0, as such, print it.
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This fixes: UnitTests/2005-07-17-INT-To-FP.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23112 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 23:42:05 +00:00
Chris Lattner
28b9cc2d13
allow code using mtcrf to assemble
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23107 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 22:05:54 +00:00
Nate Begeman
a0df5d8da5
Remove operand type 'crbit', since it is no longer used
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23106 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 22:04:17 +00:00
Chris Lattner
8a2d3ca7df
implement SELECT_CC fully for the DAG->DAG isel!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23101 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 21:23:58 +00:00
Nate Begeman
6718f11feb
Fix JIT encoding of conditional branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23076 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 04:11:42 +00:00
Chris Lattner
fdf8366ecc
LFS/STFS load and store FP values, not integer ones. This change allows us
...
to codegen this: float foo() { return 1.245; }
into this:
_foo:
lis r2, ha16(.CPI_foo_0)
lfs f1, lo16(.CPI_foo_0)(r2)
blr
instead of this:
_foo:
lis r2, ha16(.CPI_foo_0)
lfs r2, lo16(.CPI_foo_0)(r2) <-- ouch
or f1, r2, r2 <-- ouch
blr
with the dag isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23033 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 00:26:22 +00:00
Chris Lattner
2b54400f08
Split IMPLICIT_DEF into IMPLICIT_DEF_GPR and IMPLICIT_DEF_FP, so that the
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instructions take a consistent reg class. Implement ISD::UNDEF in the dag->dag
selector to generate this, fixing UnitTests/2003-07-06-IntOverflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23028 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 23:08:16 +00:00
Nate Begeman
354df0ae6d
Remove some instructions we no longer generate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22976 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 01:16:46 +00:00