Commit Graph

50397 Commits

Author SHA1 Message Date
Eric Christopher
0f691977d7 Spacing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 22:58:58 +00:00
Bill Wendling
c83693f5b0 N.B. This is with the new EH scheme:
The blocks with invokes have branches to the dispatch block, because that more
correctly models the behavior of the CFG. The dispatch of course has edges to
the landing pads. Those landing pads could contain invokes, which then have
branches back to the dispatch. This creates a loop. The machine LICM pass looks
at this loop and thinks it can hoist elements out of it. But because the
dispatch is an alternate entry point into the program, the hoisted instructions
won't be executed.

I wasn't able to get a testcase which was small and could reproduce all of the
time. The function_try_block.cpp in llvm-test was where this showed up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 22:42:31 +00:00
Akira Hatanaka
68ad5673e8 Fix function isUnalignedLoadStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 22:04:01 +00:00
Jim Grosbach
2bd0118472 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:55:36 +00:00
Akira Hatanaka
d8212b2916 Remove unused PatLeaf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141720 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:53:08 +00:00
Akira Hatanaka
7cc037a137 Change the names of 64-bit logical instructions so that they match the names of
the real instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:48:01 +00:00
Bill Wendling
e575499d83 Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:40:47 +00:00
Akira Hatanaka
395d76c5a3 Remove redundancy in setcc patterns using multiclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141715 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:40:01 +00:00
Cameron Zwarich
c055a8782e Fix PR11106 by correcting a typo that has been in the code for over a year. This
would have never worked, since the element type of a vector type is never a
vector type. Also fix the conditional to be more direct in checking whether
EltTy is a vector type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:26:40 +00:00
Akira Hatanaka
b07a3d6897 Use sltiu instead of sltu when a register operand and immediate are compared.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 20:44:43 +00:00
Jim Grosbach
2cf8dd384e ARM addressing mode cleanup for LDC/STC.
We parse at least some forms of the instructions now. Encoding is
pretty screwed up, still, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 20:17:35 +00:00
Daniel Dunbar
2c607b665d Clean up a few references to System/. We still have docs/SystemLibrary.html
lying around...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141703 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 20:02:52 +00:00
Akira Hatanaka
06f8231bfb Add patterns for conditional branches with 64-bit register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 19:09:09 +00:00
Akira Hatanaka
8191f34797 Add support for 64-bit set-on-less-than instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:53:46 +00:00
Akira Hatanaka
3e3427a5c3 Add support for conditional branch instructions with 64-bit register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:49:17 +00:00
Devang Patel
2e35047947 Add dominance check for the instruction being hoisted.
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 18:09:58 +00:00
Owen Anderson
f7c93a3867 Expose MachOObjectFile externally, like we do for COFF. First step in reducing the amount of special-purpose code needed for llvm-objdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 17:32:27 +00:00
Jim Grosbach
57dcb85a30 ARM parse alignment specifier for NEON load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 17:29:55 +00:00
Jim Grosbach
e53c87b302 ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 15:59:20 +00:00
Nadav Rotem
6fe4e51547 Add support for legalization of vector SHL/SRA/SRL instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 14:36:35 +00:00
Richard Osborne
6c6f28ffe4 Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks.
This fixes an assert due to the operands of the DBG_VALUE instruction not
being as expected (PR11105).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 12:55:35 +00:00
Kalle Raiskila
56354d48bb Fix a iterator out of bounds error, that triggers rarely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 12:55:18 +00:00
Nadav Rotem
884b918c2d Add support for legalization of vector trunc-store where the saved scalar type is illegal (for example, v2i16 on systems where the smallest store size is i32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 11:25:16 +00:00
Nadav Rotem
c2b2e1333d Cleanup the trunc-store legalization code and add asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 10:04:25 +00:00
Craig Topper
c48b301fb0 Add HasPOPCNT predicate to the POPCNT instructions. Also mark POPCNT as modifying EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 07:13:09 +00:00
Craig Topper
227358e93c Make Ivy Bridge 16-bit floating point conversion instructions require AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 07:01:37 +00:00
Craig Topper
37f2167f15 Add X86 LZCNT instruction. Including instruction selection support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141651 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:44:02 +00:00
Cameron Zwarich
446d95224b Remove a lot of the fancy scalar replacement code for dealing with llvm-gcc's
lowering of NEON code. It provides little-to-no benefit now and only introduces
additional complexity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:10:30 +00:00
Craig Topper
29480fd798 Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 04:34:23 +00:00
Nick Lewycky
7aabcb1fc0 Also create a shndx even if there are no symbols. This lets us test
.symtab_shndx reading and writing together, and finally we have a testcase for
r141440.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 03:54:50 +00:00
Nick Lewycky
bfbbe32837 Reapply r141605 with fixes for appropriate handling of reserved section numbers
in st_shndx fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 03:18:58 +00:00
Nick Lewycky
15c3f727ae Add support for .symtab_shnidx. Unfortunately, doing this required breaking a
layer of abstraction around SymbolRef where you can read its private
SymbolPimpl member.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 02:57:48 +00:00
Andrew Trick
a02bfced06 Add experimental -enable-lsr-phielim option.
I'm not sure we will need it in the long run, but the option is
currently useful for checking if the output of LSR is "clean".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 02:30:45 +00:00
Andrew Trick
204494149b Move replaceCongruentIVs into SCEVExapander and bias toward "expanded"
IVs.

Indvars previously chose randomly between congruent IVs. Now it will
bias the decision toward IVs that SCEVExpander likes to create. This
was not done to fix any problem, it's just a welcome side effect of
factoring code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 02:28:51 +00:00
Akira Hatanaka
1acb7df498 Make changes necessary for supporting floating point load and store instructions
that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 01:12:52 +00:00
Jakob Stoklund Olesen
142bd1a54e Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo().
The VMOVS widening needs to look at the implicit COPY operands.  Trying
to dig out the COPY instruction from an iterator in copyPhysReg() is the
wrong approach.

The expandPostRAPseudo() hook gets to look at COPY instructions before
they are converted to copyPhysReg() calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:59:06 +00:00
Akira Hatanaka
a5903acd6b Modify lowering of GlobalAddress so that correct code is emitted when target is
Mips64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:55:05 +00:00
Lang Hames
4ad06e61c0 Fixed natural stack alignment for Linux x86-32. Thanks Eli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141616 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:51:36 +00:00
Akira Hatanaka
381e97dcf6 Modify MipsDAGToDAGISel::SelectAddr so that it can handle 64-bit pointers too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141615 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:44:20 +00:00
Nick Lewycky
fb05d3d686 Revert r141605 as it broke tests for llvm-nm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141614 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:38:56 +00:00
Akira Hatanaka
43aed32e20 Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141613 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:37:28 +00:00
Akira Hatanaka
7bd19bd519 Add definitions of 64-bit loads and stores. Add a patterns for unaligned
zextloadi32 for which there is no corresponding pseudo or real instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:27:28 +00:00
Tanya Lattner
f1f1a4f161 Make it possible to use the linker without destroying the source module. This is so the source module can be linked to multiple other destination modules. For all that used LinkModules() before, they will continue to destroy the source module as before.
This line, and those below, will be ignored--

M    include/llvm/Linker.h
M    tools/bugpoint/Miscompilation.cpp
M    tools/bugpoint/BugDriver.cpp
M    tools/llvm-link/llvm-link.cpp
M    lib/Linker/LinkModules.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:24:54 +00:00
Nick Lewycky
fad138dd79 Add support for reading many-section ELF files.
If you want to tackle adding the testcase, let me know. It's a 4.2MB ELF file
and I'll be happy to mail it to you.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141605 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:15:42 +00:00
Akira Hatanaka
d55bb38ddc Change definitions of classes LoadM and StoreM in preparation for adding support
for 64-bit load and store instructions. Add definitions of 64-bit memory operand
and 16-bit immediate operand.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:11:12 +00:00
Bill Wendling
3f56d4b957 Simplify check that optional def is there and is CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 00:10:41 +00:00
Lang Hames
bb5b3f3359 Add a natural stack alignment field to TargetData, and prevent InstCombine from
promoting allocas to preferred alignments that exceed the natural
alignment. This avoids some potentially expensive dynamic stack realignments.

The natural stack alignment is set in target data strings via the "S<size>"
option. Size is in bits and must be a multiple of 8. The natural stack alignment
defaults to "unspecified" (represented by a zero value), and the "unspecified"
value does not prevent any alignment promotions. Target maintainers that care
about avoiding promotions should explicitly add the "S<size>" option to their
target data strings.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 23:42:08 +00:00
Michael J. Spencer
15565ad758 Fix warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 23:36:56 +00:00
Devang Patel
db7334dbc5 Revert r141569 and r141576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 23:18:02 +00:00
Jim Grosbach
f6c35c59f5 Simplify operand Kind checks a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 23:06:42 +00:00