Commit Graph

12421 Commits

Author SHA1 Message Date
Chris Lattner
8609c7c931 pass machinemoduleinfo down into getSymbolForDwarfGlobalReference,
currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82157 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 18:49:52 +00:00
Sean Callanan
9a86f10875 Added the LODS (load byte into register, usually
as part string parsing) instructions to the Intel
instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 22:59:28 +00:00
Sean Callanan
358f1ef765 Added the LAR (load segment access rights)
instructions to the Intel instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82084 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 21:55:34 +00:00
Sean Callanan
7e6d727c9b Added the LOOP family of instructions to the Intel
instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 21:50:07 +00:00
Sean Callanan
d2125a03af Added an alternate form of register-register CMP
to the Intel instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 21:11:23 +00:00
Bob Wilson
0696fdf322 Expand vector floating-point conversions not supported by NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 20:20:44 +00:00
Kevin Enderby
0d6cd00dbe Fix incorrect assert that should be a user error for code like 'mov $0, %%eax'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 17:18:29 +00:00
Chris Lattner
dc62ea0f1c move FnStubs/GVSTubs/HiddenGVStub handling out of the X86 asmprinter
and use MachineModuleInfoMachO instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 06:25:03 +00:00
Chris Lattner
29cf5557b2 revert a hunk of r82018 that wasn't supposed to go in yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 06:04:53 +00:00
Chris Lattner
686cb3df6a add a new MachineModuleInfoMachO class, which is the per-module
stuff common across all macho targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 06:03:48 +00:00
Chris Lattner
e1e533437a tidy up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 05:25:43 +00:00
Chris Lattner
a76e3fc131 rearrange X86ATTAsmPrinter::doFinalization, making a scan of
the global variable list only happen for COFF targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 05:20:33 +00:00
Chris Lattner
4edd187ddd remove the AsmPrinter::printMCInst hook hack now that
we have MCInstPrinter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 04:57:15 +00:00
Shantonu Sen
11189220e6 fix cmake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81999 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 04:44:00 +00:00
Nate Begeman
206a357684 Do not try and sink a load whose chain result has more than one use, when
trying to create RMW opportunities in the x86 backend.  This can cause a 
cycle to appear in the graph, since the other uses may eventually feed into
the TokenFactor we are sinking the load below.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 03:20:46 +00:00
Sean Callanan
8d70854dd8 Added the ENTER instruction, which sets up a stack
frame, to the Intel instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 02:57:13 +00:00
Sean Callanan
13cf8e9b82 Added the definitions for one-bit left shifts to
the Intel instruction tables.

The patterns will stay blank because ADD reg, reg
is faster, but having the encoding available is
useful for the disassembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 02:28:43 +00:00
Sean Callanan
60b995418f Removed a few instructions that were already
covered by other definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 01:54:38 +00:00
Chris Lattner
8c6ed05157 Big change #1 for personality function references:
Eliminate the PersonalityPrefix/Suffix & NeedsIndirectEncoding
fields from MAI: they aren't part of the asm syntax, they are
related to the structure of the object file.

To replace their functionality, add a new 
TLOF::getSymbolForDwarfGlobalReference method which asks targets
to decide how to reference a global from EH in a pc-relative way.

The default implementation just returns the symbol.  The default
darwin implementation references the symbol through an indirect
$non_lazy_ptr stub.  The bizarro x86-64 darwin specialization
handles the weird "foo@GOTPCREL+4" hack.

DwarfException.cpp now uses this to emit the reference to the
symbol in the right way, and this also eliminates another 
horrible hack from DwarfException.cpp:

-    if (strcmp(MAI->getPersonalitySuffix(), "+4@GOTPCREL"))
-      O << "-" << MAI->getPCSymbol();



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 01:46:41 +00:00
Sean Callanan
5ab9403bc2 Added a variety of floating-point and SSE instructions.
All of these do not have patterns (they're for the
disassembler).

Many of the floating-point instructions will probably
be rolled into definitions that have patterns, and may
eventually be superseded by mdefs.  So I put them
together and left a comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 01:13:52 +00:00
Bob Wilson
642b329104 Expand some more vector operations not supported by Neon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 00:32:15 +00:00
Bob Wilson
1633076c47 Neon does not support vector divide or remainder. Expand them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81966 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 00:17:28 +00:00
Chris Lattner
8deedba841 eliminate the PPC backend's implementation of EmitExternalGlobal
and use PersonalityPrefix/Suffix to achieve the same effect (like
the x86 backend).

This changes the code generated for ppc static mode, but guess what,
we were generating this before:

	.byte	0x9B                                        ; Personality (indirect pcrel sdata4)
	.long	___gxx_personality_v0-.                     ; Personality

which is not correct! (it is not an 'indirect' reference).
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-16 00:14:19 +00:00
Bob Wilson
74dc72e89b Expand all v2f64 arithmetic operations for Neon.
Radar 7200803.  (This should also fix the
SingleSource/UnitTests/Vector/sumarray-dbl test.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 23:55:57 +00:00
Sean Callanan
356aed540c Added far return instructions (that is, returns to
code in other segments) to the Intel instruction
tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 23:37:51 +00:00
Sean Callanan
62c28e3f91 Updated comments per Eli's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81923 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 21:43:27 +00:00
Sean Callanan
37be5903a6 Added register-to-register ADD instructions to the
Intel tables, where the source operand is
specified by the R/M field and the destination
operand by the Reg field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 20:53:57 +00:00
Sean Callanan
38fee0edcf Added a new register class for segment registers
to the Intel register table.
Added 16- and 64-bit MOVs to and from the segment
registers to the Intel instruction tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:47:29 +00:00
Dale Johannesen
7d1a7c0417 Change the marker byte for stubs from 0xcd to 0xce (another form of
interrupt instruction, which shouldn't arise any other way).  0xcd is
also used by JITMemoryManager to initialize the buffer to garbage,
which means it could appear following a noreturn call even when
that is not a stub, confusing X86CompilationCallback2.  PR 4929.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:32:14 +00:00
Chris Lattner
dffb6e5aee fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement
values to machineinstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:27:02 +00:00
Chris Lattner
ea7fd96698 add missing file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81881 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:03:13 +00:00
Bob Wilson
e4863f4759 Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs for
VLDM/VSTM instructions, and without this check, the code assumes that an
offset is allowed, as it would be with VLDR/VSTR.  The asm printer,
however, silently drops the offset, producing incorrect code.  Since the
address register in this case is either the stack or frame pointer, the
spill location ends up conflicting with some other stack slot or with
outgoing arguments on the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 17:56:18 +00:00
Sandeep Patel
85111a9c07 Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 17:53:11 +00:00
Chris Lattner
db486a6d53 several major improvements to the sparc backend: support for weak linkage
and PIC codegen.  Patch by Venkatraman Govindaraju!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 17:46:24 +00:00
Ted Kremenek
83d255e43e Remove invalid add_dependencies line to unbreak the CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 04:06:36 +00:00
Dan Gohman
1e038a8494 Don't pull a load through a callseq_start if the load's chain
has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81821 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 01:22:01 +00:00
Sean Callanan
76f14be685 Modified the Intel instruction tables to include
versions of CALL and JMP with segmented addresses
provided in-line, as pairs of immediates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81818 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:35:17 +00:00
Kevin Enderby
ca9c42c4da Added the first bits of the ARM target assembler to llvm-mc. For now it only
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:27:25 +00:00
Dan Gohman
907355caf8 On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit of
its result if the condition is false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:14:11 +00:00
Jim Grosbach
a672403993 trivial whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81773 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 17:27:35 +00:00
Chris Lattner
c2b0d484dc add PR#
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81770 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 16:49:26 +00:00
Chris Lattner
662316c997 PIC16 does allow colon after MBB labels, simplify EmitBasicBlockStart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 03:15:54 +00:00
Chris Lattner
90edac0e8b Change MCAsmStreamer to take an MCInstPrinter instead of a
full AsmPrinter, and change TargetRegistry to keep track
of registered MCInstPrinters.

llvm-mc is still linking in the entire
target foo to get the code emitter stuff, but this is an
important step in the right direction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 03:02:37 +00:00
Chris Lattner
c493fb2f4d Give MCInstPrinter a MCAsmInfo member, make X86ATTInstPrinter
be a MCInstPrinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 01:49:26 +00:00
Chris Lattner
f92c95f307 tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-14 01:34:40 +00:00
Chris Lattner
56d77c7022 add some special case handling for strangely named x86 registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 22:41:48 +00:00
Daniel Dunbar
f5382ab518 Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 21:31:07 +00:00
Chris Lattner
762ccea600 remove all but one reference to TargetRegisterDesc::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 20:31:40 +00:00
Chris Lattner
d95148f073 the tblgen produced 'getRegisterName' method does not access
the object, make it static instead of const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 20:19:22 +00:00
Chris Lattner
c510f4cb6e switch the x86 asmprinters to use getRegisterName instead
of getting it from TRI, inst printing now is codegen context
free!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 20:15:16 +00:00