Commit Graph

21836 Commits

Author SHA1 Message Date
Michael Liao
239ffb30b0 Enhance the fix of PR17631
- The fix to PR17631 fixes part of the cases where 'vzeroupper' should
  not be issued before 'call' insn. There're other cases where helper
  calls will be inserted not limited to epilog. These helper calls do
  not follow the standard calling convention and won't clobber any YMM
  registers. (So far, all call conventions will clobber any or part of
  YMM registers.)
  This patch enhances the previous fix to cover more cases 'vzerosupper' should
  not be inserted by checking if that function call won't clobber any YMM
  registers and skipping it if so.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196261 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 09:17:32 +00:00
Renato Golin
07fc4841b1 Disable Remote MCJIT tests on ARM
The communication protocol is unstable on ARM when compiled
with Clang, which is disrupting the self-hosting buildbots that
are going to be added this week. I'm working on a solution, but
remote MCJIT is not high-priority for ARM at the moment, so it
might take a while.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196257 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 08:39:15 +00:00
Daniel Jasper
ee4dd7c8d4 Further fix to llvm-cov test.
It turns out that in some build systems, tests are executed in a
non-writable directory. Hopefully, this finally fixes the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196256 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 08:21:14 +00:00
Daniel Jasper
5e4142170e Fix llvm-cov test as suggested in r196228's post commit review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196255 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 07:56:23 +00:00
Daniel Jasper
5004f51a33 Copy input files to test directory.
With r196184, llvm-cov creates a new file right next to the input file.
However, the Inputs-directory can't simply be assumed to be writable
under all build systems.

Also, this prevents a new source file from showing up in the source tree
if the test aborts before the call to "rm".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196228 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 07:35:32 +00:00
Hao Liu
1296bb3ba6 [AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196210 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 06:06:55 +00:00
Hao Liu
5025a48f68 AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 05:58:30 +00:00
NAKAMURA Takumi
6379a82d7c llvm-cov.test: Resurrect part of r194694 for win32 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196207 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 05:40:25 +00:00
Hao Liu
3d69ff4d07 AArch64: Add missing scalar pair intrinsics.
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196198 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 03:39:47 +00:00
NAKAMURA Takumi
7af2eb1ab4 llvm/test/Transforms/SampleProfile/syntax.ll: Relax an expression, not to check locale-dependent message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196195 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 02:20:53 +00:00
Jiangning Liu
bbc450c5cf Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196192 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 01:33:52 +00:00
Jiangning Liu
7f1f8d4146 Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 01:29:32 +00:00
Yuchen Wu
6cd7a3fa79 llvm-cov: Removed output to STDOUT/specified file.
Instead of asking the user to specify a single file to output coverage
info and defaulting to STDOUT, llvm-cov now creates files for each
source file with a naming system of: <source filename> + ".llcov".

This is what gcov does and although it can clutter the working directory
with numerous coverage files, it will be easier to hook the llvm-cov
output to tools which operate on this assumption (such as lcov).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196184 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 00:57:11 +00:00
Manman Ren
7d318bd116 Debug Info: drop debug info via upgrading path if version number does not match.
Add a helper function getDebugInfoVersionFromModule to return the debug info
version number for a module.

"Verifier/module-flags-1.ll" checks for verification errors.
It will seg fault when calling getDebugInfoVersionFromModule because of the
incorrect format for module flags in the testing case. We make
getModuleFlagsMetadata more robust by checking for error conditions.

PR17982


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196158 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 21:29:56 +00:00
Manman Ren
3d6225b7eb Update Ocaml/vmcore.ml to emit a "Debug Info Version" module flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 21:25:56 +00:00
Chad Rosier
d4809bb0e3 [AArch64] Implemented vcopy_lane patterns using scalar DUP instruction.
Patch by Ana Pazos!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 21:05:16 +00:00
David Blaikie
fab3e599b0 DebugInfo: Type Units: Propagate the correct DW_AT_language into type units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 18:44:29 +00:00
Kay Tiong Khoo
4e5f6e64f1 Conservative fix for PR17827 - don't optimize a shift + and + compare sequence where the shift is logical unless the comparison is unsigned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 18:43:59 +00:00
Vincent Lejeune
7043c7a35e R600: Workaround for cayman loop bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196121 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 17:29:37 +00:00
Diego Novillo
e40c77d191 Add tests for profile sample file parsing.
The profile file parser needed some tests for its parsing actions.
This adds tests for each of the error messages emitted by the parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 15:12:50 +00:00
Rafael Espindola
dfb31b6cac Output .eh_frames on COFF too now that the integrated as is used on mingw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196104 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 14:59:34 +00:00
Tim Northover
ad249171e4 ARM: decide whether to use movw/movt based on "minsize" attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196102 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 14:46:26 +00:00
Robert Lytton
f19c6f5763 XCore target: Make handling of large frames not dependent upon an FP.
eliminateFrameIndex() has been reworked to handle both small & large frames
with either a FP or SP.
An additional Slot is required for Scavenging spills when not using FP for large frames.
Reworked the handling of Register Scavenging.

Whether we are using an FP or not, whether it is a large frame or not,
and whether we are using a large code model or not are now independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196091 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 11:05:28 +00:00
Tim Northover
f715d51769 ARM: add pseudo-instructions for lit-pool global materialisation
These are used by MachO only at the moment, and (much like the existing
MOVW/MOVT set) work around the fact that the labels used in the actual
instructions often contain PC-dependent components, which means that repeatedly
materialising the same global can't be CSEed.

With small modifications, it could be adapted to how ELF finds the address of
_GLOBAL_OFFSET_TABLE_, which would give similar benefits in PIC mode there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:35:41 +00:00
Robert Lytton
41d4ed4ed0 XCore target: fix large code model 'select' indirect address handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196088 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:18:37 +00:00
Robert Lytton
883abacb5b XCore target: Add large code model
When using large code model:
Global objects larger than 'CodeModelLargeSize' bytes are placed in sections named with a trailing ".large"
The folded global address of such objects are lowered into the const pool.

During inspection it was noted that LowerConstantPool() was using a default offset of zero.
A fix was made, but due to only offsets of zero being generated, testing only verifies the change is not detrimental.

Correct the flags emitted for explicitly specified sections.

We assume the size of the object queried by getSectionForConstant() is never greater than CodeModelLargeSize.
To handle greater than CodeModelLargeSize, changes to AsmPrinter would be required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:18:31 +00:00
Robert Lytton
7112fa0523 XCore target: extend tests in preparation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196086 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:18:24 +00:00
Robert Lytton
25464b948f XCore target: Fix eliminateFrameIndex() to handle large frames
Large frame offsets are loaded from the ConstantPool.
Where possible, offsets are encoded using the smaller MKMSK instruction.
Large frame offsets can only be used when there is a frame-pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196085 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:18:19 +00:00
Robert Lytton
1326c6f14b XCore target: Enable frames larger than 65535 to be lowered
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196084 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 10:18:14 +00:00
Kostya Serebryany
dfb74a58c5 [tsan] fix instrumentation of vector vptr updates (https://code.google.com/p/thread-sanitizer/issues/detail?id=43)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 08:07:15 +00:00
Alp Toker
5c2a1a302f Rename test with misspelt filename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 04:31:36 +00:00
Rafael Espindola
ba7cb02009 Also test the created stubs on 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-01 21:24:30 +00:00
Andrew Trick
1561e8381f Add -mcpu to stackmap.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196051 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-01 18:17:05 +00:00
Tim Northover
e54f6dca50 ARM: fix bug in -Oz stack adjustment folding
Previously, we clobbered callee-saved registers when folding an "add
sp, #N" into a "pop {rD, ...}" instruction. This change checks whether
a register we're going to add to the "pop" could actually be live
outside the function before doing so and should fix the issue.

This should fix PR18081.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196046 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-01 14:16:24 +00:00
Michael Kuperstein
75ba25834c Ensure bitcode encoding of linkage types stays stable. Patch by Boaz Ouriel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196042 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-01 10:16:35 +00:00
Hal Finkel
6e1de2e63e Convert a PPC test from grep to FileCheck
Convert this test to FileCheck, and improve it to check for the instructions it
is trying to exclude instead of checking for register use (especially because
grepping for r1 can be thrown off, for example, by a use of r12).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 20:04:33 +00:00
Hal Finkel
7373abd81e Desensitize a couple of PPC regression tests
Use CHECK-DAG to make these regression tests more resilient against changes in
instruction scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 19:52:28 +00:00
Hal Finkel
36e5511188 Update the cpu specified on some PPC regression tests
Some of these tests did not specify a cpu but were also sensitive to
instruction scheduling and/or register assignment choices. A few others
similarly-sensitive tests specified a cpu (often the POWER7), and while the P7
currently uses the default model for PPC64, this will soon change. For those
tests which should not really be cpu-dependent anyway, the cpu is set to the
generic 'ppc64'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 19:39:27 +00:00
Zoran Jovanovic
082ac1ffdb Test case for issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 19:13:15 +00:00
Daniel Sanders
6fdef5ecd7 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 13:47:57 +00:00
Juergen Ributzka
1baf0c0924 Force CPU type to unbreak unit tests on Haswell machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 03:07:16 +00:00
Reed Kotler
dcb0422f25 Part 1 of 3 patches that completes very long conditional branches
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195968 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 22:32:56 +00:00
Zoran Jovanovic
eb47ca4561 Revert revision 195965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 22:10:02 +00:00
Petar Jovanovic
bc5c8eeed2 mips: XFAIL llvm-cov test
XFAIL llvm-cov.test for MIPS until big-endian issues are fixed for llvm-cov.
The test does pass on MIPS little-endian.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 21:59:09 +00:00
Zoran Jovanovic
ee7f913c98 Fixed issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 21:41:24 +00:00
Hao Liu
7fd70e7b0c AArch64: The pattern match should check the range of the immediate value.
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 02:11:22 +00:00
Jiangning Liu
d4685468fd Add missing test case for bsl_f64 support of AArch64 NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 01:38:08 +00:00
Kevin Qin
9224192321 [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 01:29:16 +00:00
Stephen Canon
e9f8ce8cde Rein in overzealous InstCombine of fptrunc(OP(fpextend, fpextend)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 21:38:05 +00:00
Hao Liu
cdd732cdd3 AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195903 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 01:07:45 +00:00