HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
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list that have internal linkage; the linker doesn't need
or want this. (These objects must still be preserved
at compile time, so just removing them from the llvm.used
list doesn't work.) Should affect only Darwin.
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and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.
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attributes on functions, based on the result of
alias analysis. It's not hardwired to use
GlobalsModRef even though this is the only (AFAIK)
alias analysis that results in this pass actually
doing something. Enable as follows:
opt ... -globalsmodref-aa -markmodref ...
Advantages of this pass: (1) records the result
of globalsmodref in the bitcode, meaning it is
available for use by later passes (currently
the pass manager isn't smart enough to magically
make an advanced alias analysis available to all
later passes), which may expose more optimization
opportunities; (2) hopefully speeds up compilation
when code is optimized twice, for example when a
file is compiled to bitcode, then later LTO is done
on it: marking functions readonly/readnone when
producing the initial bitcode should speed up alias
analysis during LTO; (3) good for discovering that
globalsmodref doesn't work very well :)
Not currently turned on by default.
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assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
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/// lookup - Return the entry for the specified key, or a default
/// constructed value if no such entry exists.
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ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
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works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
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the details of materializing constants and other values into
registers, and make use of it in several places.
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
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str() mirrors the same method in std::ostringstream.
str() flushes the buffered stream contents to string and returns a reference to the string.
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Adding one include file and correct one declaration from class to struct in order to make llvm compile on VC2005.
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use raw_ostream instead of std::ostream. Among other goodness,
this speeds up llvm-dis of kc++ with a release build from 0.85s
to 0.49s (88% faster).
Other interesting changes:
1) This makes Value::print be non-virtual.
2) AP[S]Int and ConstantRange can no longer print to ostream directly,
use raw_ostream instead.
3) This fixes a bug in raw_os_ostream where it didn't flush itself
when destroyed.
4) This adds a new SDNode::print method, instead of only allowing "dump".
A lot of APIs have both std::ostream and raw_ostream versions, it would
be useful to go through and systematically anihilate the std::ostream
versions.
This passes dejagnu, but there may be minor fallout, plz let me know if
so and I'll fix it.
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all the power and risk of fprintf format strings. Use them like this:
OS << format("%10.4f", 42.0) << "\n" << format("%x", 42) << '\n';
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process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
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handled correctly, and change a few SmallVector uses to use
size 0 to more clearly reflect their intent.
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
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and the slow-path cases out of line. This speeds up instcombine
a bit in real world cases. Patch contributed by m-s.
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alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.
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an ostream, which is just weird.
Rename SC_DEBUG -> ST_DEBUG
Remove static indentation strangeness from WriteConstantInt. This makes it
so that large structs are not broken down and printed on multiple lines. If
there is demand for this to return, there are better ways to implement this.
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in so far as it compiles and, in theory, works, but does not take advantage of recent advancements. For instance, it could be improved by using
MachineRegisterInfo::use_iterator.
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In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:
Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)
Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/
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returning an std::string by value, it fills in a SmallString/SmallVector
passed in. This significantly reduces string thrashing in some cases.
More specifically, this:
- Adds an operator<< and a print method for APInt that allows you to
directly send them to an ostream.
- Reimplements APInt::toString to be much simpler and more efficient
algorithmically in addition to not thrashing strings quite as much.
This speeds up llvm-dis on kc++ by 7%, and may also slightly speed up the
asmprinter. This also fixes a bug I introduced into the asmwriter in a
previous patch w.r.t. alias printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54873 91177308-0d34-0410-b5e6-96231b3b80d8
a simple adaptor class to give raw output capabilities to
something that wants to write to an ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54865 91177308-0d34-0410-b5e6-96231b3b80d8
can *only* output data (no seeking, reading, etc). This is adapted from the
clang "-E outputter", and is roughly 10% faster than stdio on darwin and 30%
(or more) faster than std::ostream.
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- Creates uninitialized APInt.
- Prevents need for embedding arbitrary constants when used as an out
parameter, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54757 91177308-0d34-0410-b5e6-96231b3b80d8
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
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This may be used as the second IRBuilder template
parameter, the idea being that people learning LLVM
may find it helpful (several people asked on IRC
if it was possible to turn off constant folding
because it made it hard for them to see what was
going on). Compiles, but otherwise completely
untested.
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folding policies with IRBuilder. The default,
provided by ConstantFolder, is to do minimal
folding like now: what ConstantExpr provides.
An alternative is to use TargetFolder, which
uses target information to fold constants more.
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type lattice value for an Argument*, giving clients the opportunity to
use something other than Top for it if they choose to."
Patch by John McCall!
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Evan broke it in r54523 by adding a parameter in the implementation without
updating the header correspondingly.
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FPROUND_F80_F32, FPROUND_PPCF128_F32,
FPROUND_F80_F64, FPROUND_PPCF128_F64
Support for soften float fp_round operands is added, Mips
needs this to round f64->f32.
Also added support to soften float FABS result, Mips doesn't
support double fabs results while in 'single float only' mode.
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- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
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switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
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to different address spaces. This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
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which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.
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a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
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parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
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multiple-valued return values, so that the name CreateRet is just for
creating plain ret statements.
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and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.
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Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
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live intervals itself to use an instruction count approximation that is
not affected by inserting empty indices.
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folded. Remove code that handled the case where they aren't
folded, and remove bitcode reader/writer support for them.
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SelectionDAG graph writer to make use of them. Now, nodes with multiple
values are displayed as such, with incoming edges pointing to the
specific value they use.
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that include useful information like the name of the
block being viewed and the current phase of compilation.
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used for the graph "title" and the graph "label", as there
are differences in interpretation of these strings
between viewers.
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generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
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Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53746 91177308-0d34-0410-b5e6-96231b3b80d8
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
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difference in purpose of TargetInstrInfo and TargetInstrDesc,
which isn't immediately obvious from the name.
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use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.
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SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.
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in Value, to make use of some otherwise unused space. Use this
field to shrink LoadSDNode and StoreSDNode by moving the
addressing mode and ext/trunc fields there.
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Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on. While there,
be nice to 16 bit machines and support expansion of
i32 too.
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- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.
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makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.
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class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53361 91177308-0d34-0410-b5e6-96231b3b80d8
bc files for modules with a target triple that indicates they are for
darwin. The reader unconditionally handles this, and the writer could
turn this on for more targets if we care.
This change has two benefits for darwin:
1) it allows us to encode the cpu type of the file in an easy to read
place that doesn't require decoding the bc file.
2) it works around a bug (IMO) in darwin's AR where it is incapable of
handling files that are not a multiple of 8 bytes long. BC files
are only guaranteed to be multiples of 4 bytes long.
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available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
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and reused across SelectionDAGs.
This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.
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for handling bookkeeping for deleted objects, as well as the alist class
template, for keeping lists of objects allocated from Recyclers, and some
related utilities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53210 91177308-0d34-0410-b5e6-96231b3b80d8
properly track dead nodes that are on the original SDNode's operand
list but not the new one, and have no other uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53201 91177308-0d34-0410-b5e6-96231b3b80d8
