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27b4c23b80
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9757 Commits

Author SHA1 Message Date
Nate Begeman
27b4c23b80 Fixed version of optimized integer divide is now fixed. Calculate the 
quotient, not the remainder.  Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21111 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:44:57 +00:00
Duraid Madina
b70c2f3ef7 lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take 
care of this ourselves


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:18:36 +00:00
Duraid Madina
4ee131ffa8 make sure 'special' registers don't get allocated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:17:54 +00:00
Chris Lattner
8db0af1c8d Add (untested) support for MULHS and MULHU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21107 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:21:07 +00:00
Chris Lattner
1e6a71524e add signed versions of the extra precision multiplies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:19:22 +00:00
Nate Begeman
8f52980f03 Turn off the div -> mul optimization until it works correctly 100% of the 
time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21105 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 03:36:33 +00:00
Nate Begeman
815d6dac1e Add support for MULHS and MULHU nodes 
Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21104 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 00:25:27 +00:00
Nate Begeman
c105e19864 Expand SREM and UREM for targets that claim not to have them, like PowerPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21103 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 00:23:54 +00:00
Nate Begeman
1867054643 Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b 
multiply.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21102 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 22:36:56 +00:00
Andrew Lenharth
2513ddc239 added lowerargs support for varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21101 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 20:51:46 +00:00
Nate Begeman
ad5f65c74b Behold, rlwinm with certain immediate arguments is printed as the much more 
readable slwi or srwi (shift left/right word immediate).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21099 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 18:19:50 +00:00
Nate Begeman
a3829d5580 Fix cut & paste errors (32->64), and codegen float->int more optimally. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21098 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 17:32:30 +00:00
Tanya Lattner
ac6e2dbf52 Updated to use dep analyzer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21097 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 16:36:44 +00:00
Nate Begeman
d3e6b94020 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21096 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 08:51:15 +00:00
Nate Begeman
c8c5c8f0fa Back out the previous change to SelectBranchCC, since there are cases it 
could miscompile.  A correct solution will be found in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21095 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 04:32:16 +00:00
Nate Begeman
439b444cad Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better 
indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 04:22:58 +00:00
Chris Lattner
bd135c7706 do not crash when using -debug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21092 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 01:12:03 +00:00
Nate Begeman
80196b1331 Implement SDIV by power of 2 as srawi/addze rather than load imm, divw 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-05 00:15:08 +00:00
Nate Begeman
93075ec0a5 Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 23:40:36 +00:00
Nate Begeman
178bb34ee5 Add support for multiply-add, multiply-sub, and their negated versions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21089 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 23:01:51 +00:00
Chris Lattner
8a9763c3cd do not dereference an extra layer of pointers to determine if an external 
call can modify a memory location.  This fixes
test/Regression/Analysis/Andersens/modreftest.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21088 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 22:23:21 +00:00
Nate Begeman
d860aa62ac Make sure that arg regs used by the call instruction are marked as such, so 
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 22:17:48 +00:00
Nate Begeman
04ec80173b Remove unnecessary register copy now that regalloc is fixed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 21:48:13 +00:00
Chris Lattner
886dd9136f Make sure to notice that explicit physregs are used in the function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21084 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 21:35:34 +00:00
Nate Begeman
c3e2db407e i1 loads should also be from the low byte of the argument word. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 09:09:00 +00:00
Nate Begeman
e584668f04 Fix i64 return, fix CopyFromReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 06:52:38 +00:00
Duraid Madina
6e02e6842a fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is 
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21075 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 05:05:52 +00:00
Duraid Madina
09c61b9c19 add implicit use op 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21074 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 04:50:57 +00:00
Nate Begeman
79e46acd35 Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC when 
you have something like i16 = truncate i64.  This fixes Regression/C/casts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21073 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 00:57:08 +00:00
Chris Lattner
06098e0e9b Fix sign_extend and zero_extend of promoted value types to expanded value 
types.  This occurs when casting short to long on PPC for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21072 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 23:41:52 +00:00
Nate Begeman
6644d4c933 Full varargs support. All of UnitTests now passes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 23:11:17 +00:00
Nate Begeman
4ec0cbdf15 Pass the correct value for the chain to the store 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 22:22:56 +00:00
Nate Begeman
fa55470e39 Fix SHL_PARTS 
Start implementation of integer varargs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 22:13:27 +00:00
Andrew Lenharth
63b720ac7c is this simpler? I think it is simpler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21064 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 20:35:21 +00:00
Andrew Lenharth
500d025bd9 fix 101 regressions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21063 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 18:24:50 +00:00
Duraid Madina
162a837f63 .bss is no problem here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21061 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 14:52:01 +00:00
Nate Begeman
aa73a9f16f Keeping up with the Joneses. 
Implement not, nor, nand, and eqv


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 11:20:20 +00:00
Andrew Lenharth
10c085b525 Select optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21051 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 22:32:39 +00:00
Andrew Lenharth
0eaf6ce2ef Try several things. 1) drop /i from FP ops 2) factor out FP to Int moves and provide 21264 support for those 3) match not 4) match ornot andnot xornot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21046 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 21:06:51 +00:00
Chris Lattner
1231aa3fa6 fix some VC compilation problems, thanks to Jeff C for pointing this out! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21044 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 20:17:09 +00:00
Chris Lattner
0700123431 EquivClassGraphs is now in DataStructure.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21042 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 20:08:17 +00:00
Chris Lattner
2ccc5f1081 use a callee_iterator typedef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21038 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 20:02:41 +00:00
Chris Lattner
021decc82d Change the ActualCallees callgraph from hash_multimap<Instruction,Function> 
to std::set<std::pair<Inst,Func>> to avoid duplicate entries.

This speeds up the CompleteBU pass from 1.99s to .15s on povray and the
eqgraph passes from 1.5s to .16s on the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21031 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 19:17:18 +00:00
Andrew Lenharth
7332f3e05d FNEG/FABS/UNDEF 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21029 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 19:11:07 +00:00
Andrew Lenharth
30b46d41bc FNEG/FABS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21028 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 19:04:58 +00:00
Duraid Madina
32c46f33b7 ia64 asmprinter fixes: 
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21025 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 12:30:47 +00:00
Duraid Madina
855a519741 add support for prefix/suffix strings to go around GlobalValue(s) 
(which may or be function pointers) in the asmprinter. For the moment,
this changes nothing, except the IA64 backend which can use this to write:

  data8.ua  @fptr(blah__blah__mangled_function_name)

  (by setting FunctionAddrPrefix/Suffix to "@fptr(" / ")")


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21024 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 12:21:51 +00:00
Duraid Madina
75c9fcbdcc support IDEF, fnegabs (thanks sampo) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 10:33:53 +00:00
Duraid Madina
5c156b7473 add fnegabs op 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21022 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 10:06:27 +00:00
Nate Begeman
27eeb00a1a Set shift amount to Extend 
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:59:34 +00:00