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7653 Commits

Author SHA1 Message Date
Dale Johannesen
23c968478e remove unused variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36585 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
0a1817392d Enable protected visibility on ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36583 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-30 00:23:51 +00:00
Dale Johannesen
8593e41855 Rewrite of Thumb constant islands handling (exact allowance for padding 
around islands and jump tables).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-29 19:19:30 +00:00
Dale Johannesen
8650199fbb Make ARM-specific version of getInlineAsmLength 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36572 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-29 19:17:45 +00:00
Anton Korobeynikov
6f9896fcc8 Implement protected visibility. This partly implements PR1363. Linker 
should be taught to deal with protected symbols.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36565 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-29 18:35:00 +00:00
Dale Johannesen
caa8055cf5 change per review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36519 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-28 00:36:37 +00:00
Dale Johannesen
25c1f9e125 Prevent Thumb code from generating ARM instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36518 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
4c6d20a096 add parenthesis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36514 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 20:10:08 +00:00
Evan Cheng
185ea1e2aa Doh. ARM::LEApcrel is a single instruction MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36513 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
fdc9692f97 In Thumb mode, the frame register must be R7. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
64f4fa5e0e ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 13:54:47 +00:00
Evan Cheng
b1df8f2750 Darwin runtime library does not have these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 08:15:43 +00:00
Evan Cheng
768c9f725b Special handling of LEApcrel and tLEApcrel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36504 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 08:14:15 +00:00
Evan Cheng
eec041a037 Back out previous check-in. Incorrect. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36503 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 07:50:02 +00:00
Evan Cheng
33fdc983fd tLEApcrel is a AddrModeTs, i.e. pc relative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36502 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 07:37:22 +00:00
Dan Gohman
2a3250cd23 Fix PR1339 and CodeGen/X86/dollar-name.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36495 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 21:07:05 +00:00
Bill Wendling
bff35d11f1 Have MMX registers clobbered in x86-64 too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36494 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 21:06:48 +00:00
Evan Cheng
faa510726f Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 19:00:32 +00:00
Evan Cheng
a24ddddf68 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36456 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-26 01:09:28 +00:00
Evan Cheng
6c087e5585 Match MachineFunction::UsedPhysRegs changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 22:13:27 +00:00
Bill Wendling
3f3a17dd62 Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers 
clobbered by a call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36448 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 21:31:48 +00:00
Chris Lattner
7c6eefa5f1 do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36442 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 17:23:53 +00:00
Lauro Ramos Venancio
305b8a5f62 remember to emit weak reference in one more case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36438 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 14:50:40 +00:00
Anton Korobeynikov
8b0a8c84da Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part 
will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36435 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 14:27:10 +00:00
Evan Cheng
1e341729dd Relex assertions to account for additional implicit def / use operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 07:12:14 +00:00
Chris Lattner
ea84c5ee95 support for >4G stack frames 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36425 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 04:30:24 +00:00
Chris Lattner
618078016d support >4G stack frames 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36423 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 04:25:10 +00:00
Chris Lattner
6c2d260161 Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36410 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 22:51:03 +00:00
Bill Wendling
a2c38ae90d Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36407 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:20:03 +00:00
Bill Wendling
b53e98eb30 Add the PADDQ to the list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36406 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:19:14 +00:00
Bill Wendling
69dc5332de Add the final MMX instructions. Correct a few wrong patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36405 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:18:37 +00:00
Bill Wendling
6dd29e08f7 Remove some invalid instructions from this check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36404 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:17:46 +00:00
Bill Wendling
2f9bb1a0a4 Support for the special case of a vector with the canonical form: 
vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36403 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:16:55 +00:00
Dale Johannesen
56c42ef3e4 Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining 
BBOffsets and BBSizes when adjusting conditional branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36372 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 20:09:04 +00:00
Dale Johannesen
bd24f3f398 add Align field, and use when generating function alignment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 20:07:25 +00:00
Dale Johannesen
24fb52da3c add isThumb (unused as yet) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36370 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 20:04:35 +00:00
Dale Johannesen
3bb6283eea Fix generic getInlineAsmLength 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36369 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 20:00:17 +00:00
Lauro Ramos Venancio
ede1d78969 X86 TLS: optimize the implementation of "local exec" model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36359 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
7d2cc2b983 X86 TLS: fix and optimize the implementation of "initial exec" model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36355 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 22:50:52 +00:00
Christopher Lamb
a7f0d3ce22 Support alignment queries for degenerate (length 1) vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36352 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 21:54:13 +00:00
Lauro Ramos Venancio
0ae4a3357a Implement PIC for arm-linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 00:04:12 +00:00
Lauro Ramos Venancio
2c5c111b6c X86 TLS: Implement review feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 20:56:26 +00:00
Jeff Cohen
09b362cee6 Comment out usage of write() for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36287 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio
b3a0417cad Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 21:38:10 +00:00
Evan Cheng
ba647becb9 Specify S registers as D registers' sub-registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36280 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 21:20:10 +00:00
Evan Cheng
6120433e9e Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36279 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 21:15:21 +00:00
Evan Cheng
3cafbf7e5f Add sub-registers sets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36278 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 21:13:46 +00:00
Chris Lattner
93305bc462 add a crazy idea 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36273 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 20:18:43 +00:00
Jeff Cohen
5d4d7f1580 Make Microsoft assembler and linker happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36265 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-20 00:33:54 +00:00
Chris Lattner
3e1b03f98d Fix a message, patch by Christopher Lamb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36264 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-19 18:42:38 +00:00
Lauro Ramos Venancio
267bfb553e Fix a bug in getFrameRegister. 
Reported by Raul Herbster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-19 14:09:38 +00:00
Dan Gohman
23420c09c0 Fix the spelling of the prefetchnta instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36256 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 14:09:14 +00:00
Evan Cheng
7be6368cac Oops. Didn't mean to check in a quick hack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36227 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 23:33:39 +00:00
Chris Lattner
120fba91a3 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36222 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 22:39:58 +00:00
Evan Cheng
eff03db46d Change getAllocatableSet() so it returns allocatable registers for a specific register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36215 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 20:23:34 +00:00
Anton Korobeynikov
e060b5385f Add comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36213 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 19:34:00 +00:00
Chris Lattner
3c30d10b04 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 18:03:00 +00:00
Chris Lattner
d15dff24c6 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36196 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov
57fc00d5cf Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 09:20:00 +00:00
Andrew Lenharth
15b7823006 Use this nifty Constraints thing and fix the inverted conditional moves 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36191 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 04:07:59 +00:00
Chris Lattner
56ecbf3013 SSE4 is apparently public now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36185 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 00:02:37 +00:00
Jeff Cohen
c398709525 In the event that some really old non-Intel or -AMD CPU is encountered... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36177 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-16 21:59:44 +00:00
Jeff Cohen
22114c319a Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36173 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-16 21:48:58 +00:00
Anton Korobeynikov
bed2946a96 Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-16 18:10:23 +00:00
Reid Spencer
2b85c4595e For PR1336: 
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-16 14:06:19 +00:00
Chris Lattner
7c162645ae add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36028 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 23:06:09 +00:00
Jeff Cohen
614408dc48 Silence VC++ warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35975 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 22:52:03 +00:00
Chris Lattner
5a3d40d88f arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 06:50:55 +00:00
Reid Spencer
57c5b1815d Implement review feedback .. don't double search a set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35957 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 21:57:15 +00:00
Reid Spencer
69f80a63a2 Provide support for intrinsics that lower themselves to a function body. 
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35954 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
26ca64c884 Implement Thread Local Storage (TLS) in CBackend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35951 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 18:42:08 +00:00
Chris Lattner
6c284d716e Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 04:14:49 +00:00
Chris Lattner
a1b253f58e Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 22:29:46 +00:00
Chris Lattner
e11529438c Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 16:17:12 +00:00
Chris Lattner
b062000c23 done 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35884 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:34:00 +00:00
Reid Spencer
18da072088 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35877 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 02:44:20 +00:00
Bill Wendling
bb1ee05253 Add support for our first SSSE3 instruction "pmulhrsw". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-10 22:10:25 +00:00
Chris Lattner
bae3bd7c19 new micro optzn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35867 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-10 21:14:01 +00:00
Chris Lattner
eb13d1b710 restore support for negative strides 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-10 03:48:29 +00:00
Chris Lattner
37caf8c68e remove dead target hooks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 23:33:39 +00:00
Chris Lattner
eb8c74ddf2 remove some dead hooks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35845 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 23:31:19 +00:00
Chris Lattner
b445d0cbb9 remove some dead target hooks, subsumed by isLegalAddressingMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 22:27:04 +00:00
Chris Lattner
7c7ba9d2d5 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35835 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 22:10:05 +00:00
Jeff Cohen
44f5fb46b0 When the number of elements is zero, don't malloc 32GB on 64-bit systems. 
Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35828 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 19:26:30 +00:00
Reid Spencer
5694b6e90e For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35814 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 06:17:21 +00:00
Chris Lattner
0f65cad57f move a bunch of register constraints from being handled by 
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35804 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 05:49:22 +00:00
Chris Lattner
e5a24ec782 implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values 
used with x constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35803 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 05:31:48 +00:00
Chris Lattner
ad043e85f8 implement CodeGen/X86/inline-asm-x-scalar.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35799 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 05:11:28 +00:00
Reid Spencer
6733a1661a Squelch a warning about mismatch between sign of constant and sign of return 
type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35674 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-04 22:07:24 +00:00
Evan Cheng
e21e39666e Implement inline asm modifier P. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35640 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-04 00:13:29 +00:00
Evan Cheng
0a7baa24d1 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-04 00:06:07 +00:00
Bill Wendling
71bfd11c67 Adding more MMX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:48:32 +00:00
Chris Lattner
8ceb0fd2d3 make a new missing features section 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35637 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:41:34 +00:00
Evan Cheng
ed884f3a2f Remove unused constant pool entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35635 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:39:48 +00:00
Bill Wendling
92ca81601c Updated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35634 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:37:20 +00:00
Evan Cheng
b03eacdbf3 Fixed a bug that causes codegen of noop like add r0, r0, #0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35627 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 21:31:21 +00:00
Nicolas Geoffray
0111999a88 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
ec58d9f9dd The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35624 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
cfcd8da70b Addition to the previous commit for getCalleeSavedRegClasses: 
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35623 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 10:57:49 +00:00
Nicolas Geoffray
ef3c030e0e The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 10:27:07 +00:00