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7653 Commits

Author SHA1 Message Date
Evan Cheng
3c5ad82ba2 Inverted logic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35619 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 06:44:25 +00:00
Bill Wendling
c9c9d2d554 Changed to new MMX_ recipes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35617 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 06:18:31 +00:00
Bill Wendling
823efee633 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 06:00:37 +00:00
Chris Lattner
b2c594f350 Arm supports negative strides as well, add them. This lets us compile: 
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35609 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 00:13:57 +00:00
Dale Johannesen
d959aa421a fix off by 1 error in displacement computation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35602 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 20:31:06 +00:00
Chris Lattner
6e0784da77 fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales 
to be folded into non-store instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35601 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 18:51:18 +00:00
Chris Lattner
c4e3f8e736 add support for the 'w' inline asm register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 17:24:08 +00:00
Chris Lattner
aa43e9f73b Fix a bug which caused us to never be able to use signed comparisons for 
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35590 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 05:59:42 +00:00
Lauro Ramos Venancio
9996663fc6 - Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35573 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 01:30:03 +00:00
Chris Lattner
3e9f1d09c0 fix breakage from last night, simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35560 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-01 20:49:36 +00:00
Evan Cheng
3074d9df96 Add i16 address mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-01 08:06:46 +00:00
Andrew Lenharth
a697b8d83d Readme 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35533 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 15:05:44 +00:00
Anton Korobeynikov
ad7baee241 Consistency with native compilers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35532 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 13:11:52 +00:00
Bill Wendling
577c7d9dca Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35531 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 09:36:12 +00:00
Chris Lattner
fcb1e61a43 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35530 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 07:06:25 +00:00
Bill Wendling
db5c993121 Match GCC's MMX calling convention. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35523 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 01:03:53 +00:00
Chris Lattner
c9addb7488 implement the new addressing mode description hook. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 23:15:24 +00:00
Bill Wendling
e2501b303c Add MMX calling conventions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35489 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 00:35:22 +00:00
Evan Cheng
87c6c9abb3 New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35480 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-29 21:40:13 +00:00
Evan Cheng
5e3c203cfd Can't re-materialize mov r, imm in thumb since mov would clobber the condition code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35479 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-29 21:38:31 +00:00
Jeff Cohen
e2cd2a0b4b MS C does have inlining after all, just uses _inline instead of inline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35467 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-29 17:42:21 +00:00
Evan Cheng
616cc663da Add support for hidden visibility to darwin/arm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35448 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-29 07:49:34 +00:00
Jeff Cohen
ab47895c6b Fix C Backend to generate code that works with Microsoft C for the benefit of 
front ends that do not depend on the GCC runtime (someday...).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35441 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 23:08:37 +00:00
Bill Wendling
03179060ee Made this into a bug report: PR1286 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35439 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 19:07:34 +00:00
Anton Korobeynikov
f6e9353e1a Oops :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35438 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:38:33 +00:00
Anton Korobeynikov
33bf8c44dd Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35437 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:36:33 +00:00
Chris Lattner
6ef3307062 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35435 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:17:19 +00:00
Chris Lattner
995f55036f Compile CodeGen/X86/lea-3.ll:test2 to: 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:12:31 +00:00
Chris Lattner
e9a61234ce Dan pointed out that this is done, remove it! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35430 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 17:26:52 +00:00
Scott Michel
6461bbfc50 First test check-in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35429 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 17:04:43 +00:00
Evan Cheng
caaf69107e Remove isLegalAddressImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:53:55 +00:00
Bill Wendling
a80d7bd665 Remove cruft I put in there... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:02:54 +00:00
Chris Lattner
f2177b89a1 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:58:40 +00:00
Bill Wendling
826f36ff80 Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:57:11 +00:00
Bill Wendling
6dc29ece6e Add the "unpack low packed data" instructions. This should be the last of 
the MMX instructions that are needed...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35389 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 21:20:36 +00:00
Bill Wendling
ccc44add81 Fix so that pandn is emitted instead of an xor/and combo. Add integer 
comparison operators.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 20:22:40 +00:00
Lauro Ramos Venancio
1baa1971a6 "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:33:08 +00:00
Lauro Ramos Venancio
b8a93a45f8 bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:19:21 +00:00
Evan Cheng
f6fa5ee5c2 findRegisterUseOperand() changed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:41:48 +00:00
Bill Wendling
ab5b49d92e Promote to v1i64 type... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 08:03:33 +00:00
Bill Wendling
aadcea33d1 Updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35352 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:55:58 +00:00
Bill Wendling
eebc8a1bc5 Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:53:08 +00:00
Anton Korobeynikov
4be4e51a50 Fix authorship 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35337 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 13:44:26 +00:00
Chris Lattner
86c9c341e9 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35334 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:10:46 +00:00
Chris Lattner
013e051aac add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35330 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:46:28 +00:00
Chris Lattner
b6ead97b7e Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:44:03 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00
Chris Lattner
1439352ece Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35320 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:01:03 +00:00
Chris Lattner
188b9fe834 enforce the proper range for the i386 N constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 01:57:35 +00:00
Chris Lattner
7cd5e07f3d Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35318 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 01:44:57 +00:00
Chris Lattner
1a77a556cd add a bad case evan though of. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35296 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-24 06:01:32 +00:00
Anton Korobeynikov
3b5ee73a13 Autodetect MMX & SSE stuff for AMD processors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35292 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-23 23:46:48 +00:00
Bill Wendling
b8440a0c39 PR1260: 
Add final support to get the QT example to compile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-23 22:35:46 +00:00
Bill Wendling
02ced83ce7 We generate a shufflevector instruction, so we don't need the builtin 
intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde Support added for shifts and unpacking MMX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-22 18:42:45 +00:00
Dale Johannesen
fa4bce2b76 repair x86 performance, dejagnu problems from previous change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:51:52 +00:00
Anton Korobeynikov
3070cd7e80 Add TODO list for MSIL backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35244 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:48:59 +00:00
Anton Korobeynikov
099883f7eb Let the new backend begin! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35242 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:38:25 +00:00
Dale Johannesen
aceaf5d26e add generation of unnecessary push/pop around calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:16:39 +00:00
Nicolas Geoffray
82d4264c1f Protect R31's frame offset from being used by callee-saved registers, when R31 
is the frame pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35233 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 16:44:14 +00:00
Evan Cheng
768143547b Mark re-materializable instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 00:16:56 +00:00
Evan Cheng
a125cbe839 Updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 22:32:39 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
64c88d741e bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: 
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 17:57:23 +00:00
Evan Cheng
c70d1849b7 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:09:38 +00:00
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0 fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 02:25:53 +00:00
Dale Johannesen
80dae195c7 fix obvious comment bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 00:30:56 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6 Special LDR instructions to load from non-pc-relative constantpools. These are 
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417 Constant generation instructions are re-materializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f Added isReMaterializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 06:22:07 +00:00
Chris Lattner
d435dbcbf9 fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 00:39:32 +00:00
Chris Lattner
11a3a9d27d minor updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37 This is implemented. We now generate: 
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 14:37:20 +00:00
Devang Patel
84f7fd2483 Support 'I' inline asm constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4 Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 22:54:16 +00:00
Bill Wendling
1b7a81d3ae And now support for MMX logical operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 09:44:46 +00:00
Evan Cheng
2770747216 Added isLegalAddressExpression(). Only allows X +/- C for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 08:43:56 +00:00
Bill Wendling
74027e98f1 Multiplication support for MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-15 21:24:36 +00:00
Evan Cheng
ba693005e9 Under X86-64 large code model, do not emit 32-bit pc relative calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b Notes about codegen issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769 Oops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863 X86-64 JIT is in large code model. Need stubs for direct calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e x86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b Preliminary support for X86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:44:30 +00:00
Evan Cheng
a13fd108f2 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8 Zero is always a legal AM immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 20:37:59 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 15:02:46 +00:00
Evan Cheng
e8308df0b9 Implement getTargetLowering() or else LSR won't be using ARM specific hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 01:20:42 +00:00
Evan Cheng
b01fad6d19 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:28:50 +00:00
Evan Cheng
37e8856f74 Stupid bug: SSE2 supports v2i64 add / sub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 22:58:52 +00:00
Bill Wendling
c1fb0473ed Adding more arithmetic operators to MMX. This is an almost exact copy of 
the addition. Please let me know if you have suggestions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-10 09:57:05 +00:00
Evan Cheng
1a9da0d66c Minor stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0 Add comments about LSR / ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193 Unfinished work and ideas related to register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:34:51 +00:00
Dale Johannesen
818c085232 apply comments from review of last patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 17:58:17 +00:00
Evan Cheng
23a9570494 Implement inline asm modifier c. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:42:46 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:09:11 +00:00
Evan Cheng
b582b1b1fc Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 21:59:30 +00:00
Evan Cheng
032953d747 Putting more constants which do not contain relocations into .literal{4|8|16} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 08:31:54 +00:00
Evan Cheng
bf822eb6a3 Change register allocation order to Dale's suggestion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 02:56:40 +00:00
Evan Cheng
11788fde93 Bug fix. Not advancing the register scavenger iterator correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 02:55:08 +00:00
Evan Cheng
98ded765c2 For Darwin, put constant data into .const, .const_data, .literal{4|8|16} 
sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35017 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:25:25 +00:00
Evan Cheng
f0b5d56efd Put constant data to .const, .const_data, .literal{4|8|16} sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35016 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:07:07 +00:00
Evan Cheng
be346c9476 Add ReadOnlySection directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35015 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:00:38 +00:00
Evan Cheng
603b83ebcd Only safe to use a call-clobbered or spilled callee-saved register as scratch register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35010 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 20:30:36 +00:00
Bill Wendling
c32a7f98ab Remove useless pattern fragments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35009 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 18:23:09 +00:00
Anton Korobeynikov
d0b82b301d Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 16:25:09 +00:00
Bill Wendling
bc9bffa27b Properly support v8i8 and v4i16 types. It now converts them to v2i32 for 
load and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35002 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 05:43:18 +00:00
Anton Korobeynikov
a6199c87c2 Fix DWARF debugging information on x86/Linux and (hopefully) 
Mingw32/Cygwin targets. This fixes PR978


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35000 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:47:57 +00:00
Evan Cheng
cb20998b3f ARM always use register scavenger. No longer reserves R12. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34999 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:46:23 +00:00
Evan Cheng
0ea12ec848 Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34998 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:38:05 +00:00
Evan Cheng
3d06cf4584 Fix one more Thumb eliminateFrameIndex bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34990 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 00:12:18 +00:00
Evan Cheng
e6257632fc Register scavenging is now on by default for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34987 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 22:02:53 +00:00
Evan Cheng
a90f3408b3 Make load / store optimizer use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34986 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 21:59:20 +00:00
Bill Wendling
a31bd27f12 Add LOAD/STORE support for MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34978 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 18:53:42 +00:00
Evan Cheng
cc1c427266 Code clean up. Prepare to use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34976 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 18:02:41 +00:00
Evan Cheng
28b3c45109 Minor interface change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34967 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 10:05:14 +00:00
Evan Cheng
140e33cfd1 Scavenge a register using the register scavenger when needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 10:03:56 +00:00
Anton Korobeynikov
1d9baccc9b Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 08:12:33 +00:00
Chris Lattner
b9a7bea99c Switch PPC return lower to use an autogenerated CC description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 00:59:59 +00:00
Bill Wendling
229baffc4e Add the emms intrinsic for MMX support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 23:09:45 +00:00
Lauro Ramos Venancio
6d7dd8ef46 Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. 
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34931 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 17:59:58 +00:00
Jeff Cohen
ca5183d445 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34917 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 00:00:42 +00:00
Chris Lattner
569bdc7bb7 add missing braces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34905 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 06:13:52 +00:00
Reid Spencer
bdc75089ab Make sure that when we store a value it is masked to its correct bit 
width. This helps CBE work with non-standard integer bit widths.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34885 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-03 16:33:33 +00:00
Nick Lewycky
f54949dc49 Emit low/high immediate loads properly for Linux/PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34871 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-03 05:29:51 +00:00
Evan Cheng
ae6421935b X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34857 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 23:16:35 +00:00
Anton Korobeynikov
f7dcfa81c5 Simplify things 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34849 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 21:50:27 +00:00
Chris Lattner
82932a5e4a argument lowering should copy from the vreg shadows of live-in arguments 
passed in registers, not directly from the pregs themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34838 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 05:12:29 +00:00
Chris Lattner
9b6f57c303 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34837 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 05:04:52 +00:00
Dale Johannesen
9f8e50d4ed eliminate unnecessary reset of SP in epilog on darwin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34824 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 01:17:17 +00:00
Reid Spencer
1ede29c951 Wrap a long line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34799 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 19:48:16 +00:00
Anton Korobeynikov
9dd9abd87f Ensure that fastcall'ed function is correctly mangled & stack is 
properly aligned


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34788 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 16:29:22 +00:00
Nicolas Geoffray
43c6e7cd9b Implemented the frameaddress intrinsic for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 13:11:38 +00:00
Evan Cheng
c1c2de0ae7 Use a spilled free callee-saved register as scratch register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 08:57:52 +00:00
Evan Cheng
f49407b790 - Track which callee-saved registers are spilled. 
- Some code clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34783 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 08:26:31 +00:00
Evan Cheng
cda067bad9 Switch from std::vector<bool> to BitVector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34781 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 07:52:44 +00:00
Bill Wendling
f1d6006ad6 Get rid of verboten <iostream> include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34777 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 06:05:39 +00:00
Dale Johannesen
b71aa2b6ca Changes requested in review of last pass. Also pulled isThumb into a 
member, instead of resetting in every function that uses it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34764 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 23:20:38 +00:00
Evan Cheng
ad78ef2154 Doh. ARM::PC is obvious a reserved register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 23:12:34 +00:00
Dale Johannesen
f1b214d3ca Add intelligence about where to break large blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:41:23 +00:00
Chris Lattner
eac6607d7c remove dead option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34754 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:39:53 +00:00
Chris Lattner
70500805d5 bugfix: fastcall does not require the first two params to be marked 'inreg', 
they always get registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34748 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:35:11 +00:00
Nate Begeman
fec910c3b9 More Mach-O writer improvements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34740 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:40:50 +00:00
Chris Lattner
e32bbf61c0 use high-level functions in CCState 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:09:55 +00:00
Chris Lattner
638402b253 make use of helper functions in CCState for analyzing formals and calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34737 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:00:42 +00:00
Chris Lattner
f5d280a0a6 switch LowerFastCCCallTo over to using the new fastcall description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:26:33 +00:00
Chris Lattner
fc664c1bc0 switch LowerFastCCArguments over to using the autogenerated Fastcall description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34733 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:21:19 +00:00
Chris Lattner
011bcc8cdd add new CC_X86_32_FastCall calling conv, which describes fastcall on win32. 
Factor out a CC_X86_32_Common convention, which is the part shared between
ccc, stdcall and fastcall


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34732 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:20:01 +00:00
Chris Lattner
fcf1a3de7a rearrange code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34731 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:10:12 +00:00
Chris Lattner
2db39b865e remove fastcc (not fastcall) support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34730 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:05:16 +00:00
Chris Lattner
f39f771b02 switch LowerCCCArguments over to using autogenerated CC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34729 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:46:49 +00:00
Chris Lattner
c0bdf3460c simplify sret handling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:39:26 +00:00
Chris Lattner
423c5f44f8 switch LowerCCCCallTo over to using an autogenerated callingconv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:31:48 +00:00
Chris Lattner
370bdda526 rename stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34726 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:30:29 +00:00
Chris Lattner
62247f62ce rename some CCActions, add CCIfInReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34725 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:29:33 +00:00
Chris Lattner
59ed56b9ee switch return value passing and the x86-64 calling convention information 
over to being autogenerated from the X86CallingConv.td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34722 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 04:55:35 +00:00
Chris Lattner
3d5591038a make subtarget references work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34721 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 04:51:41 +00:00
Evan Cheng
36230cdda4 Make requiresRegisterScavenging determination on a per MachineFunction basis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:59:19 +00:00
Evan Cheng
41a4d562f7 Temporary: make R12 available in ARM mode if RegScavenger is being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34709 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:22:44 +00:00
Evan Cheng
1b051fc6a4 Start making use of RegScavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34708 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:21:58 +00:00
Evan Cheng
5e6df4647e PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:21:17 +00:00
Evan Cheng
15991bf775 Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34701 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 23:03:55 +00:00
Chris Lattner
3e8a541bf4 reenable generation of CC info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 22:12:19 +00:00
Evan Cheng
3fae29acef Back out previous commit temporarily. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34694 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 21:47:22 +00:00
Evan Cheng
5ef9226f30 Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34692 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 21:12:35 +00:00
Chris Lattner
f45803012c implement CCMatchIfCC in terms of CCMatchIf 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34685 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 20:45:02 +00:00
Chris Lattner
8bcc4aea47 build cc info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34684 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 20:44:31 +00:00
Chris Lattner
dbec2d9dcf a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34670 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 17:21:09 +00:00
Nicolas Geoffray
05c180b347 Fix parenthesis for BCTRL_{ELF|Macho} test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34668 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 13:10:41 +00:00
Nicolas Geoffray
63f8fb1993 Differentiate between the MachO and the ELF ABI the CALL instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34667 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 13:01:19 +00:00
Jim Laskey
d313a9b148 Duplicate use of LR, take 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34666 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 11:55:45 +00:00
Chris Lattner
d637a8b436 Add calling convention info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34661 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 06:59:52 +00:00
Chris Lattner
00836648ae move target independent calling convention stuff to TargetCallingConv.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34659 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 05:57:32 +00:00
Chris Lattner
d50110d8dc fill in some holes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34658 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 05:51:05 +00:00
Chris Lattner
9774c915f1 switch x86-64 return value lowering over to using same mechanism as argument 
lowering uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34657 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 05:28:59 +00:00
Chris Lattner
13513b7a50 Minor refactoring of CC Lowering interfaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 05:13:54 +00:00
Chris Lattner
362e98a5f5 move CC Lowering stuff to its own public interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34655 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 04:43:02 +00:00
Chris Lattner
9c71ab77cd refactor x86-64 argument lowering yet again, this time eliminating templates, 
'clients', etc, and adding CCValAssign instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34654 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 04:18:15 +00:00
Evan Cheng
3d3d627513 Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping 
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34652 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 02:55:29 +00:00
Chris Lattner
caddd44be7 always lower to RETFLAG, never leave it as just ret. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34639 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 19:44:02 +00:00
Chris Lattner
bffc1b3c4e fix attribution 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34637 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 18:56:07 +00:00
Chris Lattner
31c8a6d511 Add a description of the X86-64 calling convention and the return 
conventions.  This doesn't do anything yet, but may in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34636 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 18:17:14 +00:00
Chris Lattner
6e50f8cfe9 switch to smallvector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34633 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 07:59:53 +00:00
Chris Lattner
14dd4c9735 initial hack at splitting the x86-64 calling convention info out from the 
mechanics that process it.  I'm still not happy with this, but it's a step
in the right direction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34631 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 07:50:02 +00:00
Chris Lattner
cc7b07a0ff the truncate must always be done, it's only the assert that is conditional. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34628 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 05:21:05 +00:00
Chris Lattner
54e3efde46 add an accessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 04:01:25 +00:00
Chris Lattner
df5cdb5288 in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input. 
Capture this so that downstream zext/sext's are optimized out.  This
compiles:
  int test(short X) { return (int)X; }

to:

_test:
        movl %edi, %eax
        ret

instead of:

_test:
        movswl %di, %eax
        ret


GCC produces this bizarre code:

_test:
        movw    %di, -12(%rsp)
        movswl  -12(%rsp),%eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34623 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 03:18:56 +00:00
Chris Lattner
c30654cc96 Fix an X86-64 abi bug. We now compile: 
void foo(short);
void bar(unsigned short A) {
  foo(A);
}

into:

_bar:
        subq $8, %rsp
        movswl %di, %edi
        call _foo
        addq $8, %rsp
        ret

instead of:

_bar:
        subq $8, %rsp
        call _foo
        addq $8, %rsp
        ret

Testcase here: test/CodeGen/X86/x86-64-shortint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34615 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 23:10:46 +00:00
Chris Lattner
7e22977c0f fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last 
night:  fastcc returns should only go in XMM0 if we have SSE2 or above.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34613 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 22:23:46 +00:00
Chris Lattner
4ddf7a4ca6 no really, this is the right patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34605 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 20:01:40 +00:00
Chris Lattner
640c0ac01d always promote float varargs to double. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34604 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 19:59:18 +00:00