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296 Commits

Author SHA1 Message Date
Dale Johannesen
79217064c6 Disable a couple more things for ppcf128. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43267 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-23 23:20:14 +00:00
Evan Cheng
3311876c3c Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43228 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-22 19:46:19 +00:00
Chris Lattner
26cb2862e9 comment fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43168 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 04:08:28 +00:00
Dale Johannesen
fabd32deb0 More ppcf128 issues (maybe the last)? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 00:59:18 +00:00
Chris Lattner
1de7c1dd6f Change LowerFP_TO_SINT to create the specific code it needs instead of 
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43005 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-15 20:14:52 +00:00
Dale Johannesen
296c176141 Fix type mismatch error in PPC Altivec (only causes 
a problem when asserts are on).  From vecLib.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42959 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-14 01:58:32 +00:00
Dan Gohman
a3f269f7f6 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42904 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 14:08:57 +00:00
Dan Gohman
f96e4de403 Set ISD::FPOW to Expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 23:21:31 +00:00
Dale Johannesen
6eaeff29b8 Next PPC long double bits: ppcf128->i32 conversion. 
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-10 01:01:31 +00:00
Dan Gohman
3ce990dc05 When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in 
target-indepenent lowering, don't use them on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 17:28:24 +00:00
Dale Johannesen
638ccd52b9 Next powerpc long double bits. Comparisons work, 
although not well, and shortening FP converts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 01:24:11 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:04:43 +00:00
Duncan Sands
f7331b3dd7 Fold the adjust_trampoline intrinsic into 
init_trampoline.  There is now only one
trampoline intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 14:10:23 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 04:06:50 +00:00
Dale Johannesen
eaf089430e Enhance APFloat to retain bits of NaNs (fixes oggenc). 
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 04:03:46 +00:00
Bill Wendling
b8a80f03bf Use i64 on a PPC64 machine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41590 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 00:59:19 +00:00
Chris Lattner
48884cd80b rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-25 00:47:38 +00:00
Evan Cheng
66ffe6be0c Vector fneg must be expanded into fsub -0.0, X. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40586 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-30 07:51:22 +00:00
Duncan Sands
36397f5034 Support for trampolines, except for X86 codegen which is 
still under discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 12:58:54 +00:00
Lauro Ramos Venancio
75ce010f7b Assert when TLS is not implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-11 17:19:51 +00:00
Dan Gohman
532dc2e1f2 Change getCopyToParts and getCopyFromParts to always use target-endian 
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 20:59:04 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-22 14:59:07 +00:00
Chris Lattner
3ee774091b describe an argument, hide it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37650 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 05:46:06 +00:00
Chris Lattner
52387be1e0 If a function is vararg, never pass inreg arguments in registers. Thanks to 
Anton for half of this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37641 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 00:13:10 +00:00
Dan Gohman
51eaa86758 Rename MVT::getVectorBaseType to MVT::getVectorElementType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-14 22:58:02 +00:00
Dan Gohman
f5135be3fc Apply this patch: 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37240 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 23:21:46 +00:00
Chris Lattner
9f5d5783ec fix some subtle inline asm selection issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37067 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:31:05 +00:00
Chris Lattner
7c7ba9d2d5 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35835 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 22:10:05 +00:00
Nicolas Geoffray
0111999a88 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
ec58d9f9dd The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35624 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
ef3c030e0e The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 10:27:07 +00:00
Chris Lattner
c9addb7488 implement the new addressing mode description hook. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 23:15:24 +00:00
Lauro Ramos Venancio
1baa1971a6 "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:33:08 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 15:02:46 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:29:01 +00:00
Chris Lattner
b9a7bea99c Switch PPC return lower to use an autogenerated CC description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 00:59:59 +00:00
Nicolas Geoffray
43c6e7cd9b Implemented the frameaddress intrinsic for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 13:11:38 +00:00
Nicolas Geoffray
63f8fb1993 Differentiate between the MachO and the ELF ABI the CALL instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34667 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 13:01:19 +00:00
Chris Lattner
caddd44be7 always lower to RETFLAG, never leave it as just ret. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34639 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 19:44:02 +00:00
Chris Lattner
4ddf7a4ca6 no really, this is the right patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34605 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 20:01:40 +00:00
Chris Lattner
640c0ac01d always promote float varargs to double. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34604 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 19:59:18 +00:00
Chris Lattner
9f0bc659c8 implement support for the linux/ppc function call ABI. Patch by 
Nicolas Geoffray!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-25 05:34:32 +00:00
Jim Laskey
2ad9f17fee Simplify lowering and selection of exception ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Chris Lattner
dee5a5a52c Fix ixaddrs as well, allowing ppc64 to compile to: 
_test2:
        li r2, 0
        lis r3, 1
        std r2, 9024(r3)
        blr

instead of:

_test2:
        lis r2, 1
        li r3, 0
        ori r2, r2, 9024
        std r3, 0(r2)
        blr

This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34373 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 06:57:26 +00:00
Chris Lattner
bc681d6af4 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: 
_test:
        lis r2, 743
        li r3, 0
        stw r3, 32751(r2)
        blr

instead of:

_test:
        li r2, 0
        stw r2, 32751(48693248)
        blr

Implement support for ppc64 as well, allowing it to produce better code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 06:44:03 +00:00
Nate Begeman
bcc5f36765 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 22:58:52 +00:00
Anton Korobeynikov
b10308e440 Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-28 13:31:35 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00