Dan Gohman
e26bff22db
Fix typos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34456 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-20 20:52:03 +00:00
Jim Laskey
1ee2925742
Make LABEL a builtin opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Evan Cheng
e77d10df41
Comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33114 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 07:25:16 +00:00
Chris Lattner
fa326c709f
add a new field needed by the code emitter generator.
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2006-11-15 22:55:04 +00:00
Chris Lattner
60a09a5d6d
initial steps to getting the predicate on PPC::BLR right.
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2006-11-03 23:52:18 +00:00
Chris Lattner
e69c436e6f
remove dead var
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2006-11-03 23:50:15 +00:00
Evan Cheng
2f15c063ba
Add constraints to Instruction class.
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2006-11-01 00:26:27 +00:00
Chris Lattner
33e4869ba0
Move the Imp tblgen class from the X86 backend to common code.
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2006-10-12 17:49:27 +00:00
Evan Cheng
e6f32034db
Add code size to target instruction use it as the 3rd isel sorting tie-breaker.
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2006-07-19 00:24:41 +00:00
Evan Cheng
ffd4364bb0
Added a Flags field to TargetOperandInfo. Currently the only flag is
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M_LOOK_UP_PTR_REG_CLASS which allows the register class of the operand to be
resolved via a callback at runtime.
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2006-05-18 20:44:26 +00:00
Evan Cheng
0cfd73a9c1
Remove CalleeSavedRegisters from class Target.
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2006-05-18 00:09:53 +00:00
Evan Cheng
c01d497255
Remove PointerType from class Target
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2006-05-17 21:20:27 +00:00
Vladimir Prus
e438c2a466
Replace "../whatever.td" with "whatever.td", so that out-of-tree backends
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can just add lib/Target to TableGen includes.
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2006-05-16 06:39:36 +00:00
Chris Lattner
94ae9d3d2d
Improve comment, patch provided by Vladimir Prus!
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2006-05-15 18:35:02 +00:00
Chris Lattner
506efdaef6
Update comment.
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2006-05-14 02:05:19 +00:00
Chris Lattner
de321a8014
Put PHI/INLINEASM into the correct namespace.
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2006-05-01 17:00:49 +00:00
Evan Cheng
f5e1dc278b
Renamed AddedCost to AddedComplexity.
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2006-04-19 20:38:28 +00:00
Evan Cheng
5941320c0d
Allow "let AddedCost = n in" to increase pattern complexity.
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2006-04-19 18:07:24 +00:00
Jim Laskey
8da17b242f
Add support for dwarf register numbering.
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2006-03-24 21:13:21 +00:00
Chris Lattner
da10f19d5c
Shuffle some includes around
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2006-03-24 18:52:35 +00:00
Chris Lattner
a8309ae1cb
Split the valuetypes out of Target.td into ValueTypes.td
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2006-03-03 01:55:26 +00:00
Evan Cheng
f338dd881f
New type v2f32.
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2006-03-01 01:06:22 +00:00
Evan Cheng
aea20f50e5
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
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packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
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2006-02-20 22:34:53 +00:00
Evan Cheng
19c9550744
Subtarget feature can now set any variable to any value
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2006-01-27 08:09:42 +00:00
Chris Lattner
cedc6f4b30
PHI and INLINEASM are now built-in instructions provided by Target.td
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2006-01-27 01:46:15 +00:00
Evan Cheng
6da8d99f70
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
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2006-01-09 18:28:21 +00:00
Evan Cheng
2b4ea795a2
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
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2005-12-26 09:11:45 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
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2005-12-23 22:14:32 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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2005-12-14 22:02:59 +00:00
Evan Cheng
f8ac814957
* Added instruction property hasCtrlDep for those which r/w control-flow
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chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
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2005-12-04 08:13:17 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
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2005-12-01 04:51:06 +00:00
Nate Begeman
6a648614e8
Add the majority of the vector machien value types we expect to support,
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and make a few changes to the legalization machinery to support more than
16 types.
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2005-11-29 05:45:29 +00:00
Chris Lattner
eedf3b57cb
refix typo
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2005-11-29 00:42:30 +00:00
Chris Lattner
46ec78646b
revert my change for the time being, which broke the build
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2005-11-29 00:24:08 +00:00
Chris Lattner
0ba7d71213
fix a typo :)
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2005-11-28 22:42:15 +00:00
Chris Lattner
be7a2ff2dd
Capture more operand info, patch by Evan Cheng
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2005-11-19 07:00:10 +00:00
Nate Begeman
69a2cf421b
Also add the new vector value type here, for completeness.
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2005-11-18 00:53:32 +00:00
Jim Laskey
f0c2be4d2b
Add attribute name and type to SubtargetFeatures.
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2005-10-26 17:28:23 +00:00
Jim Laskey
f5fc2cbd6b
Plugin new subtarget backend into the build.
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2005-10-21 19:05:19 +00:00
Jim Laskey
538421411a
Added InstrSchedClass to each of the PowerPC Instructions.
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Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
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2005-10-19 19:51:16 +00:00
Jim Laskey
0de8796e68
Push processor descriptions to the top of target and add command line info.
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2005-10-19 13:34:52 +00:00
Chris Lattner
17f2cf05b3
Pull DAG ISel generation nodes out of the PowerPC backend to where they
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can be used by other targets. For those targets that want to use it,
have at. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:00:30 +00:00
Chris Lattner
ccc8ed7bb5
Add a forward def
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2005-10-04 05:09:20 +00:00
Chris Lattner
ef242b1ccc
Now that self referential classes are supported, get rid of a work-around.
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2005-09-30 04:13:23 +00:00
Chris Lattner
e3cbf823f0
spell this right
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23099 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 20:55:40 +00:00
Chris Lattner
0efa0f9ee9
Add a flag
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2005-08-26 20:29:01 +00:00
Chris Lattner
a64d4cddf5
add an enum value
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23048 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 17:07:09 +00:00
Chris Lattner
ecbce617ca
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
1ff9540c17
Require that targets specify a namespace for their register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:48:48 +00:00
Chris Lattner
329cdc3801
Add a new flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22881 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:17:07 +00:00