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Author SHA1 Message Date
Akira Hatanaka
94ccee2222 Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is 
inserted after the shift-left-logical node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157937 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 17:46:29 +00:00
Roman Divacky
fd42ed676e Implement local-exec TLS on PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157935 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 17:36:38 +00:00
Hans Wennborg
70a07c7fc4 MIPS TLS: use the model selected by TargetMachine::getTLSModel(). 
This was mostly done already in r156162, but I missed one place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157929 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 14:02:08 +00:00
Nadav Rotem
fcb2c3cf5e Remove the "-promote-elements" flag. This flag is now enabled by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 11:27:21 +00:00
Hans Wennborg
d01d693c0b Better comments for TLS-related X86 MachineOperand flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157920 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 09:55:36 +00:00
Craig Topper
caea5e28b2 Add intrinsic forms for FMA instructions to opcode folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 07:46:16 +00:00
Duncan Sands
a757a0d52a getAllOnesValue also works for vectors of integers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157915 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 07:18:12 +00:00
Craig Topper
fc5ab24493 Add VFMADDSUB and VFMSUBADD FMA instructions to folding tables. Also add 213 forms of scalar FMA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157914 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 07:08:21 +00:00
Hal Finkel
77a9e0f318 Fix a copy-and-paste duplication error in the PPC 440 and A2 schedules (no functionality change). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157912 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 02:39:52 +00:00
Hal Finkel
77838f9ca9 Enable generating PPC pre-increment (r+imm) instructions by default. 
It seems that this no longer causes test suite failures on PPC64 (after r157159),
and often gives a performance benefit, so it can be enabled by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157911 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-04 02:21:00 +00:00
Rafael Espindola
761cb06756 Represent .rept as an anonymous macro. This removes the need for the ActiveRept 
vector. No functionality change.
Extracted from a patch by the PaX Team.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157909 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 23:57:14 +00:00
Rafael Espindola
28c1f666bf Add a typedef to simplify the code a bit. Not functionality change. 
Part of a patch by the PaX Team.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157908 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 22:41:23 +00:00
Craig Topper
a15f9d5311 Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157903 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 18:58:46 +00:00
Craig Topper
bb6e61cf6b Simplify the fma4 renaming code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157902 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 16:48:52 +00:00
NAKAMURA Takumi
13776d3fc8 IntRange: Restore the copy constuctor explicitly to appase buildbot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157901 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 15:42:12 +00:00
Craig Topper
7678de45b2 Autoupgrade support the rename of x86.fma4 intrinsics to x86.fma from r157898. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157899 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 08:07:25 +00:00
Craig Topper
529ce07c5f Rename fma4 intrinsics to just fma since they are now used for both FMA4 and FMA3. Autoupgrade support coming in a separate commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157898 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 07:26:46 +00:00
Manman Ren
c73ea9102b Revert r157831 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157896 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 03:14:24 +00:00
Craig Topper
57ae246a6a Use sse_load_f32/64 for scalar FMA3 intrinsic patterns instead of 128-bit loads to match instruction behavior. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157895 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 01:40:43 +00:00
Craig Topper
60dda38008 Add neverHasSideEffects and mayLoad to FMA3 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157894 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-03 00:30:49 +00:00
Benjamin Kramer
1222c5c121 Use access(2) instead of stat(2) to check if a file exists. 
Apart from being slightly cheaper, this fixes a real bug that hits 32 bit
linux systems. When passing a file larger than 2G to be linked (which isn't
that uncommon with large projects such as WebKit), clang's driver checks
if the file exists but the file size doesn't fit in an off_t and stat(2)
fails with EOVERFLOW. Clang then says that the file doesn't exist instead
of passing it to the linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157891 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 16:28:09 +00:00
Stepan Dyatkovskiy
31219d2cec Added unittests for IntegersSubset and IntegersSubsetMapping. 
- Fixed IntegersSubsetGeneric copy/assignment behaviour. 
- Fixed IntegersSubsetGeneric::getSize/getSingleValue methods.
- Fixed IntegersSubsetGeneric::verify method.

Also IntegersSubset.h and IntegersSubsetMapping.h headers was fixed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157887 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 13:47:12 +00:00
Benjamin Kramer
d9b0b02561 Fix typos found by http://github.com/lyda/misspell-check 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 10:20:22 +00:00
Stepan Dyatkovskiy
43eb31bfae PR1255: case ranges. 
IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()"



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157884 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 09:42:43 +00:00
Benjamin Kramer
0fa2b7b90d Add move semantics to APInt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157883 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 08:39:08 +00:00
Stepan Dyatkovskiy
4524dd7518 Additional change for 157881. Forget to fix another IntegerSubset constructor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157882 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 08:03:34 +00:00
Stepan Dyatkovskiy
e2c53188ea Small fix due to buildbot failures on mingw32. Fixed call of parent constructor for case when parent is template. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157881 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 07:44:19 +00:00
Stepan Dyatkovskiy
4319a552ac PR1255: case ranges. 
IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157880 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 07:26:00 +00:00
Manman Ren
be4258adc5 ARM: add testing case for struct byval 
rdar://9877866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157876 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 05:37:44 +00:00
Akira Hatanaka
3309dbab30 Add another test case which tests Mips' unaligned load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157874 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 01:13:10 +00:00
Akira Hatanaka
55a105160d Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG. 
Check that the SDValue TargetLowering::LowerOperation returns is not null
before replacing the original node with the returned node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157873 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 01:10:34 +00:00
Chris Lattner
00edc3dea2 remove an unused variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157872 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 01:03:42 +00:00
Akira Hatanaka
bdd26783b8 Fix test cases in test/CodeGen/Mips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157868 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:05:45 +00:00
Akira Hatanaka
4c8acecfe3 Remove code which is no longer needed in MipsAsmPrinter and MipsMCInstLower. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157867 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:05:11 +00:00
Akira Hatanaka
7664f05326 Set operation actions for load/store nodes in the Mips backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157866 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:04:42 +00:00
Akira Hatanaka
4d70ceed33 Add definitions of 32/64-bit unaligned load/store instructions for Mips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157865 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:04:19 +00:00
Akira Hatanaka
1cd0ec007a Define functions MipsTargetLowering::LowerLOAD and LowerSTORE which 
custom-lower unaligned load and store nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157864 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:03:49 +00:00
Akira Hatanaka
b6f1dc2f09 Define Mips specific unaligned load/store nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157863 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:03:12 +00:00
Akira Hatanaka
f66b7b1ff6 Expand unaligned i16 loads/stores for the Mips backend. 
This is the first of a series of patches which make changes to the backend to
emit unaligned load/store instructions (lwl,lwr,swl,swr) during instruction
selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157862 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:02:45 +00:00
Akira Hatanaka
bed5b0db45 In MipsMCInstLower::LowerSymbolOperand, get offset from symbol if 
the MachineOperand type has a valid offset. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157861 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:02:11 +00:00
Jakob Stoklund Olesen
22de91aec5 Remove the old register list functions from MCRegisterInfo. 
These functions exposed the layout of the underlying data tables as
null-terminated uint16_t arrays.

Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator
classes instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157855 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 23:28:34 +00:00
Jakob Stoklund Olesen
396618b43a Switch all register list clients to the new MC*Iterator interface. 
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 23:28:30 +00:00
Bill Wendling
4a8fefaf83 Register the gcov "writeout" at init time. Don't list this as a d'tor. Instead, 
inject some code in that will run via the "__mod_init_func" method that
registers the gcov "writeout" function to execute at exit time.

The problem is that the "__mod_term_func" method of specifying d'tors is
deprecated on Darwin. And it can lead to some ambiguities when dealing with
multiple libraries.
<rdar://problem/11110106>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157852 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 23:14:32 +00:00
Jakob Stoklund Olesen
0984461dfb Remove physreg support from adjustCopiesBackFrom and removeCopyByCommutingDef. 
After physreg coalescing was disabled, these functions can't do anything
useful with physregs anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157849 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 22:38:19 +00:00
Jakob Stoklund Olesen
8c70ea47fa Simplify some more getAliasSet callers. 
MCRegAliasIterator can include Reg itself in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 22:38:17 +00:00
Rafael Espindola
2090766f6e Use dominates(Instruction, Use) in the verifier. 
This removes a bit of context from the verifier erros, but reduces code
duplication in a fairly critical part of LLVM and makes dominates easier to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157845 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 21:56:26 +00:00
Chad Rosier
bbff4ee92d [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0 
then DestReg is undefined.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157840 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 21:12:31 +00:00
Jakob Stoklund Olesen
f152fe8d48 Switch some getAliasSet clients to MCRegAliasIterator. 
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157837 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 20:36:54 +00:00
Manman Ren
73c2f7f5ed X86: peephole optimization to remove cmp instruction 
This patch will optimize the following:
  sub r1, r3
  cmp r3, r1 or cmp r1, r3
  bge L1
TO
  sub r1, r3
  bge L1 or ble L1

If the branch instruction can use flag from "sub", then we can eliminate
the "cmp" instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157831 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 19:49:33 +00:00
Manman Ren
68f25571e7 ARM: properly handle alignment for struct byval. 
Factor out the expansion code into a function.
This change is to be enabled in clang.

rdar://9877866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157830 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-01 19:33:18 +00:00