Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
code for long long foo(long long a, long long b) { return a + b; }
_foo:
or r2, r3, r3
or r3, r4, r4
or r4, r5, r5
or r5, r6, r6
rldicr r2, r2, 32, 31
rldicl r3, r3, 0, 32
rldicr r4, r4, 32, 31
rldicl r5, r5, 0, 32
or r2, r3, r2
or r3, r5, r4
add r4, r3, r2
rldicl r2, r4, 32, 32
or r4, r4, r4
or r3, r2, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.
Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG. Something wll have to be
figured out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
option. Currently the only way to enable this is to specify the
64bitregs mattr flag. It is never enabled by default on any config yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
is faster and uses less stack space. This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
classes on PPC. We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced. This fixes Regression/CodeGen/PowerPC/fpcopy.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
helps but not enough.
Start pulling cases out of PPC32DAGToDAGISel::Select. With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes). Pulling this first function out gets us down to 8224. More
to come :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23647 91177308-0d34-0410-b5e6-96231b3b80d8
